From 33613a85afc4b1481367fbe92a17ee59c240250b Mon Sep 17 00:00:00 2001 From: Sven Eisenhauer Date: Fri, 10 Nov 2023 15:11:48 +0100 Subject: add new repo --- Bachelor/Digitaltechnik 2/SS07/P6/abel.ex3.html | 158 ++++++++++++++++++++++++ 1 file changed, 158 insertions(+) create mode 100644 Bachelor/Digitaltechnik 2/SS07/P6/abel.ex3.html (limited to 'Bachelor/Digitaltechnik 2/SS07/P6/abel.ex3.html') diff --git a/Bachelor/Digitaltechnik 2/SS07/P6/abel.ex3.html b/Bachelor/Digitaltechnik 2/SS07/P6/abel.ex3.html new file mode 100644 index 0000000..75bb32e --- /dev/null +++ b/Bachelor/Digitaltechnik 2/SS07/P6/abel.ex3.html @@ -0,0 +1,158 @@ + + + + + Example of a Mealy Machine: string recognizer + + +

+University of Pennsylvania

+ +Department of Electrical Engineering + + + +Finite State Machine implemented as a Synchronous +Mealy Machine: + + + +a non-resetting sequence recognizer. + + +

The following state diagram (Fig. 1) describes the same finite state +machine as in the previous example: a sequence +detector with one input X and one output Z. The FSM asserts its output +Z when it recognizes the following input bit sequence: "1011". The machine +will keep checking for the proper bit sequence and does not reset to the +initial state after it has recognized the string. In contrast to the previous +example, the machine will be implemented as a synchronous Mealy Machine. +This will ensure that the output changes at the clock transition and will +prevent glitches which were possible with the Mealy Machine implementation +(see previous example). +

+ + + +

+ + +

Figure 1: State diagram, describing the sequence detector ("1011") implemented +as a Mealy machine. The number in italics underneath the states indicate +which part of the sequence the state remembers. + +

This state diagram can be defined in ABEL code given in Listing 1. The +output is described with the "With" keyword +to indicate that the output will change when the input goes to one. The +difference with the regular Mealy machine, is that the output Z is now +also clocked (see e.g. the statement, [Q1,Q0,Z].CLK +=CLOCK). Also, in the State Diagram section, the "WITH Z:=0" +makes use of the registered assignment ":=" operator. + +

Listing 1: ABEL source code for the Mealy Machine +implementation of the sequence detector described in Fig. 1 +

module Syncdet1

+ +

Title 'Sequence +Detector 1011 with a Synchronous Mealy Machine'

Declarations +
"Input and +output signals + +

X, CLOCK, RST +PIN; +
Z PIN istype +'reg'; +
Q1, Q0 PIN +istype 'reg'; + +

"State register +definitions +
" and assignments +of state values + +

SREG = [Q1,Q0]; +
S0 = [0,0]; +
S1 = [0,1]; +
S2 = [1,0]; +
S3 = [1,1]; + +

Equations +
"Define the +clock signal for the state machine + +

[Q1,Q0,Z].AR += RST; +
[Q1,Q0,Z].CLK +=CLOCK; + +

"Define state +diagram + +

STATE_DIAGRAM +SREG + +

STATE S0: IF +X THEN S1 ELSE S0; +
STATE S1: +IF X THEN S1 ELSE S2; +
STATE S2: +IF X THEN S3 ELSE S0; +
STATE S3: +IF X THEN S1 WITH Z:=1; ELSE S2; + +

end Syncdet1

+The ouput is specified with the "With" keyword. The corresponding simulation +is shown in Figure 2. + + + + + + +

+ + + +Figure 2: Simulation of the sequence detector for "1011" described +with the state diagram of Fig. 1, implemented as a synchronous Mealy machine. +(Screen clip from Xilinx XACTstep(TM) Foundation software) + + +

Notice that the output Z is valid after the positive clock edge (in +response to the input value just before the positive clock edge). The output +asserts at the positive clock edge when the input has gone through the +sequence "1011". Notice also that the glitch which was present in the non-synchronous +Mealy machine is gone. + +

This timing in a synchronous Mealy machine is thus less critical than +in a non-synchronous machine. The price one pays for this, is additional +hardware. Making the output synchronous requires additional flip-flops +as is illustrated by the blue box (Output Registers) in the generic block +diagram of a synchronous Mealy machine in Figure 3. +

+ +

+ + + +Figure 3: Synchronous Mealy Machine. + + +

Created by J. Van der +Spiegel: December 30, 1997; Updated by J. Van der Spiegel: December +30, 1997. + + \ No newline at end of file -- cgit v1.2.3