From 33613a85afc4b1481367fbe92a17ee59c240250b Mon Sep 17 00:00:00 2001 From: Sven Eisenhauer Date: Fri, 10 Nov 2023 15:11:48 +0100 Subject: add new repo --- .../ARM202U/EXAMPLES/BASICASM/EXAMPLE.APJ | Bin 0 -> 81 bytes .../ARM202U/EXAMPLES/BASICASM/EXAMPLE.S | 14 ++++++++ .../ARM202U/EXAMPLES/BASICASM/GCD1.APJ | Bin 0 -> 78 bytes .../ARM202U/EXAMPLES/BASICASM/GCD1.S | 21 +++++++++++ .../ARM202U/EXAMPLES/BASICASM/GCD2.APJ | Bin 0 -> 78 bytes .../ARM202U/EXAMPLES/BASICASM/GCD2.S | 17 +++++++++ .../ARM202U/EXAMPLES/BASICASM/JUMP.APJ | Bin 0 -> 78 bytes .../ARM202U/EXAMPLES/BASICASM/JUMP.S | 40 +++++++++++++++++++++ .../ARM202U/EXAMPLES/BASICASM/LOADCON1.APJ | Bin 0 -> 82 bytes .../ARM202U/EXAMPLES/BASICASM/LOADCON1.S | 15 ++++++++ .../ARM202U/EXAMPLES/BASICASM/LOADCON2.APJ | Bin 0 -> 82 bytes .../ARM202U/EXAMPLES/BASICASM/LOADCON2.S | 26 ++++++++++++++ .../ARM202U/EXAMPLES/BASICASM/LOADCON3.APJ | Bin 0 -> 82 bytes .../ARM202U/EXAMPLES/BASICASM/LOADCON3.S | 14 ++++++++ .../ARM202U/EXAMPLES/BASICASM/LOADCON4.APJ | Bin 0 -> 82 bytes .../ARM202U/EXAMPLES/BASICASM/LOADCON4.S | 29 +++++++++++++++ .../ARM202U/EXAMPLES/BASICASM/STRCOPY1.APJ | Bin 0 -> 88 bytes .../ARM202U/EXAMPLES/BASICASM/STRCOPY1.S | 20 +++++++++++ .../ARM202U/EXAMPLES/BASICASM/STRCOPY2.APJ | Bin 0 -> 82 bytes .../ARM202U/EXAMPLES/BASICASM/STRCOPY2.S | 20 +++++++++++ 20 files changed, 216 insertions(+) create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/EXAMPLE.APJ create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/EXAMPLE.S create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/GCD1.APJ create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/GCD1.S create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/GCD2.APJ create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/GCD2.S create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/JUMP.APJ create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/JUMP.S create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON1.APJ create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON1.S create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON2.APJ create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON2.S create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON3.APJ create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON3.S create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON4.APJ create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON4.S create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/STRCOPY1.APJ create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/STRCOPY1.S create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/STRCOPY2.APJ create mode 100644 Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/STRCOPY2.S (limited to 'Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM') diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/EXAMPLE.APJ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/EXAMPLE.APJ new file mode 100644 index 0000000..ea94b2c Binary files /dev/null and b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/EXAMPLE.APJ differ diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/EXAMPLE.S b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/EXAMPLE.S new file mode 100644 index 0000000..c93e244 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/EXAMPLE.S @@ -0,0 +1,14 @@ + AREA Example, CODE, READONLY ; name this block of code + ENTRY ; mark first instruction + ; to execute +start + MOV r0, #15 ; Set up parameters + MOV r1, #20 + BL firstfunc ; Call subroutine + SWI 0x11 ; terminate + +firstfunc ; Subroutine firstfunc + ADD r0, r0, r1 ; r0 = r0 + r1 + MOV pc, lr ; Return from subroutine + ; with result in r0 + END ; mark end of file diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/GCD1.APJ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/GCD1.APJ new file mode 100644 index 0000000..b2853cb Binary files /dev/null and b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/GCD1.APJ differ diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/GCD1.S b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/GCD1.S new file mode 100644 index 0000000..fec499f --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/GCD1.S @@ -0,0 +1,21 @@ + AREA gcd1, CODE, READONLY ; name this block of code + ENTRY ; mark first instruction + ; to execute +start + MOV r0, #1 ; Set up parameters + MOV r1, #2 + BL gcd ; Call subroutine + SWI 0x11 ; terminate + +gcd + CMP r0, r1 + BEQ end + BLT less + SUB r0, r0, r1 + BAL gcd +less + SUB r1, r1, r0 + BAL gcd +end MOV pc,lr + + END ; mark end of file \ No newline at end of file diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/GCD2.APJ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/GCD2.APJ new file mode 100644 index 0000000..30403da Binary files /dev/null and b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/GCD2.APJ differ diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/GCD2.S b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/GCD2.S new file mode 100644 index 0000000..8fbc660 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/GCD2.S @@ -0,0 +1,17 @@ + AREA gcd2, CODE, READONLY ; name this block of code + ENTRY ; mark first instruction + ; to execute +start + MOV r0, #1 ; Set up parameters + MOV r1, #2 + BL gcd ; Call subroutine + SWI 0x11 ; terminate + +gcd + CMP r0, r1 + SUBGT r0, r0, r1 + SUBLT r1, r1, r0 + BNE gcd + MOV pc,lr + + END ; mark end of file \ No newline at end of file diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/JUMP.APJ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/JUMP.APJ new file mode 100644 index 0000000..7728951 Binary files /dev/null and b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/JUMP.APJ differ diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/JUMP.S b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/JUMP.S new file mode 100644 index 0000000..fbcb4eb --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/JUMP.S @@ -0,0 +1,40 @@ + AREA ArithGate, CODE ; name this block of code + ENTRY ; mark the first instruction to call +main + MOV r0, #2 ; set up three parameters + MOV r1, #5 + MOV r2, #15 + BL arithfunc ; call the function + SWI 0x11 ; terminate + +arithfunc ; label the function + CMP r0, #4 ; Treat code as unsigned integer + BHI ReturnA1 ; If code > 4 then return first + ; argument + ADR r3, JumpTable ; Load address of the jump table + LDR pc,[r3,r0,LSL #2] ; Jump to appropriate routine + +JumpTable + DCD ReturnA1 + DCD ReturnA2 + DCD DoAdd + DCD DoSub + DCD DoRsb + +ReturnA1 + MOV r0, r1 ; Operation 0, >4 + MOV pc,lr +ReturnA2 + MOV r0, r2 ; Operation 1 + MOV pc,lr +DoAdd + ADD r0, r1, r2 ; Operation 2 + MOV pc,lr +DoSub + SUB r0, r1, r2 ; Operation 3 + MOV pc,lr +DoRsb + RSB r0, r1, r2 ; Operation 4 + MOV pc,lr + + END ; mark the end of this file diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON1.APJ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON1.APJ new file mode 100644 index 0000000..7641f19 Binary files /dev/null and b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON1.APJ differ diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON1.S b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON1.S new file mode 100644 index 0000000..0cfc12a --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON1.S @@ -0,0 +1,15 @@ + AREA loadcon1, CODE + ENTRY ; mark first instruction + + MOV r0, #0 ; => MOV r0, #0 + MOV r1, #0xFF000000 ; => MOV r1, #0xFF, 8 + MOV r2, #0xFFFFFFFF ; => MVN r2, #0 + MVN r0, #1 ; => MVN r0, #1 + MOV r1, #0xFC000003 ; => MOV r1, #0xFF, 6 + MOV r2, #0x03FFFFFC ; => MVN r2, #0xFF, 6 + ;MOV r3, #0x55555555 ; Reports an error (it cannot + ; be constructed) + + SWI 0x11 ; terminate + END + diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON2.APJ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON2.APJ new file mode 100644 index 0000000..08e91df Binary files /dev/null and b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON2.APJ differ diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON2.S b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON2.S new file mode 100644 index 0000000..53deb76 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON2.S @@ -0,0 +1,26 @@ + AREA Loadcon2, CODE + ENTRY ; Mark first instruction + BL func1 ; Branch to first subroutine + BL func2 ; Branch to second subroutine + SWI 0x11 ; Terminate +func1 + LDR r0, =42 ; => MOV R0, #42 + LDR r1, =0x55555555 ; => LDR R1, [PC, #offset to Literal + ; Pool 1] + LDR r2, =0xFFFFFFFF ; => MVN R2, #0 + MOV pc, lr + + LTORG ; Literal Pool 1 contains + ; literal &55555555 +func2 + LDR r3, =0x55555555 ; => LDR R3, [PC, #offset to Literal + ; Pool 1] + ; LDR r4, =0x66666666 ; If this is uncommented it will + ; fail, as Literal Pool 2 is not + ; accessible (out of reach) + MOV pc, lr + +LargeTable % 4200 ; Clears a 4200 byte area of memory, + ; starting at the current location, + ; to zero. + END ;Literal Pool 2 is empty diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON3.APJ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON3.APJ new file mode 100644 index 0000000..4b82261 Binary files /dev/null and b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON3.APJ differ diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON3.S b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON3.S new file mode 100644 index 0000000..425c1de --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON3.S @@ -0,0 +1,14 @@ + AREA Example, CODE + ENTRY ; Mark first instruction +Start + ADR r0, Start ; => SUB r0, PC, #offset to Start + ADR r1, DataArea ; => ADD r1, PC, #offset to DataArea + ; ADR r2, DataArea+4300 ; This would fail as the offset is + ; cannot be expressed by operand2 + ; of an ADD + ADRL r3, DataArea+4300 ; => ADD r2, PC, #offset1 + ; ADD r2, r2, #offset2 + SWI 0x11 ; Terminate +DataArea % 8000 + + END diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON4.APJ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON4.APJ new file mode 100644 index 0000000..575662f Binary files /dev/null and b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON4.APJ differ diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON4.S b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON4.S new file mode 100644 index 0000000..5f046c9 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON4.S @@ -0,0 +1,29 @@ + AREA Loadcon4, CODE + ENTRY ; Mark first instruction +Start + BL func1 ; Branch to first subroutine + BL func2 ; Branch to second subroutine + SWI 0x11 ; Terminate + +func1 + LDR r0, =Start ; => LDR R0,[PC, #offset to + ; Litpool 1] + LDR r1, =Darea +12 ; => LDR R1,[PC, #offset to + ; Litpool 1] + LDR r2, =Darea + 6000 ; => LDR R2, [PC, #offset to + ; Litpool 1] + MOV pc,lr ; Return + + LTORG ; Literal Pool 1 contains 3 literals + +func2 + LDR r3, =Darea +6000 ; => LDR r3, [PC, #offset to + ; Litpool 1] + ; (sharing with previous literal) + ; LDR r4, =Darea +6004 ; If uncommented will produce an + ; error as Litpool 2 is out of range + MOV pc, lr ; Return + +Darea % 8000 + END ; Literal Pool 2 is out of range of + ; the LDR instructions above diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/STRCOPY1.APJ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/STRCOPY1.APJ new file mode 100644 index 0000000..1e19af0 Binary files /dev/null and b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/STRCOPY1.APJ differ diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/STRCOPY1.S b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/STRCOPY1.S new file mode 100644 index 0000000..d719799 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/STRCOPY1.S @@ -0,0 +1,20 @@ + AREA StrCopy1, CODE + ENTRY ; mark the first instruction +main + ADR r1, srcstr ; pointer to first string + ADR r0, dststr ; pointer to second string + BL strcopy ; copy the first into second + SWI 0x11 ; and exit + +srcstr DCB "This is my first (source) string",0 +dststr DCB "This is my second (destination) string",0 + + ALIGN ; realign address to word boundary + +strcopy + LDRB r2, [r1], #1 ; load byte, then update address + STRB r2, [r0], #1 ; store byte, then update address + CMP r2, #0 ; check for zero terminator + BNE strcopy ; keep going if not + MOV pc, lr ; return + END diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/STRCOPY2.APJ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/STRCOPY2.APJ new file mode 100644 index 0000000..174fca4 Binary files /dev/null and b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/STRCOPY2.APJ differ diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/STRCOPY2.S b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/STRCOPY2.S new file mode 100644 index 0000000..aa3e954 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/STRCOPY2.S @@ -0,0 +1,20 @@ + AREA StrCopy2, CODE + ENTRY ; mark the first instruction +main + LDR r1, =srcstr ; pointer to first string + LDR r0, =dststr ; pointer to second string + BL strcopy ; copy the first into second + SWI 0x11 ; and exit + +srcstr DCB "This is my first (source) string",0 +dststr DCB "This is my second (destination) string",0 + + ALIGN ; realign address to word boundary + +strcopy + LDRB r2, [r1], #1 ; load byte, then update address + STRB r2, [r0], #1 ; store byte, then update address + CMP r2, #0 ; check for zero terminator + BNE strcopy ; keep going if not + MOV pc, lr ; return + END -- cgit v1.2.3