diff options
| author | Sven Eisenhauer <sven@sven-eisenhauer.net> | 2023-11-10 15:11:48 +0100 |
|---|---|---|
| committer | Sven Eisenhauer <sven@sven-eisenhauer.net> | 2023-11-10 15:11:48 +0100 |
| commit | 33613a85afc4b1481367fbe92a17ee59c240250b (patch) | |
| tree | 670b842326116b376b505ec2263878912fca97e2 /Bachelor/Mikroprozessorsysteme/MIC-Simulator/S80515N.SFR | |
| download | Studium-33613a85afc4b1481367fbe92a17ee59c240250b.tar.gz Studium-33613a85afc4b1481367fbe92a17ee59c240250b.tar.bz2 | |
Diffstat (limited to 'Bachelor/Mikroprozessorsysteme/MIC-Simulator/S80515N.SFR')
| -rw-r--r-- | Bachelor/Mikroprozessorsysteme/MIC-Simulator/S80515N.SFR | 188 |
1 files changed, 188 insertions, 0 deletions
diff --git a/Bachelor/Mikroprozessorsysteme/MIC-Simulator/S80515N.SFR b/Bachelor/Mikroprozessorsysteme/MIC-Simulator/S80515N.SFR new file mode 100644 index 0000000..5abd05b --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme/MIC-Simulator/S80515N.SFR @@ -0,0 +1,188 @@ +D:80H P0
+D:81H SP
+D:82H DPL
+D:83H DPH
+D:87H PCON
+D:88H TCON
+D:89H TMOD
+D:8AH TL0
+D:8BH TL1
+D:8CH TH0
+D:8DH TH1
+D:90H P1
+D:98H SCON
+D:99H SBUF
+
+D:A0H P2
+D:A8H IEN0
+D:A9H IP0
+D:B0H P3
+D:B8H IEN1
+D:B9H IP1
+
+D:C0H IRCON
+D:C1H CCEN
+D:C2H CCL1
+D:C3H CCH1
+D:C4H CCL2
+D:C5H CCH2
+D:C6H CCL3
+D:C7H CCH3
+D:C8H T2CON
+D:CAH CRCL
+D:CBH CRCH
+D:CCH TL2
+D:CDH TH2
+D:D0H PSW
+D:D8H ADCON
+D:D9H ADDAT
+D:DAH DAPR
+
+D:E0H ACC
+D:E8H P4
+D:F0H B
+D:F8H P5
+
+B:80H.0 P0.0
+B:80H.1 P0.1
+B:80H.2 P0.2
+B:80H.3 P0.3
+B:80H.4 P0.4
+B:80H.5 P0.5
+B:80H.6 P0.6
+B:80H.7 P0.7
+
+B:88H.0 IT0
+B:88H.1 IE0
+B:88H.2 IT1
+B:88H.3 IE1
+B:88H.4 TR0
+B:88H.5 TF0
+B:88H.6 TR1
+B:88H.7 TF1
+
+B:90H.0 P1.0
+B:90H.1 P1.1
+B:90H.2 P1.2
+B:90H.3 P1.3
+B:90H.4 P1.4
+B:90H.5 P1.5
+B:90H.6 P1.6
+B:90H.7 P1.7
+
+B:98H.0 RI
+B:98H.1 TI
+B:98H.2 RB8
+B:98H.3 TB8
+B:98H.4 REN
+B:98H.5 SM2
+B:98H.6 SM1
+B:98H.7 SM0
+
+B:A0H.0 P2.0
+B:A0H.1 P2.1
+B:A0H.2 P2.2
+B:A0H.3 P2.3
+B:A0H.4 P2.4
+B:A0H.5 P2.5
+B:A0H.6 P2.6
+B:A0H.7 P2.7
+
+B:A8H.0 EX0
+B:A8H.1 ET0
+B:A8H.2 EX1
+B:A8H.3 ET1
+B:A8H.4 ES
+B:A8H.5 ET2
+B:A8H.6 WDT
+B:A8H.7 EAL
+
+B:B0H.0 P3.0
+B:B0H.1 P3.1
+B:B0H.2 P3.2
+B:B0H.3 P3.3
+B:B0H.4 P3.4
+B:B0H.5 P3.5
+B:B0H.6 P3.6
+B:B0H.7 P3.7
+
+B:B8H.0 EADC
+B:B8H.1 EX2
+B:B8H.2 EX3
+B:B8H.3 EX4
+B:B8H.4 EX5
+B:B8H.5 EX6
+B:B8H.6 SWDT
+B:B8H.7 EXEN2
+
+B:C0H.0 IADC
+B:C0H.1 IEX2
+B:C0H.2 IEX3
+B:C0H.3 IEX4
+B:C0H.4 IEX5
+B:C0H.5 IEX6
+B:C0H.6 TF2
+B:C0H.7 EXF2
+
+B:C8H.0 T2I0
+B:C8H.1 T2I1
+B:C8H.2 T2CM
+B:C8H.3 T2R0
+B:C8H.4 T2R1
+B:C8H.5 I2FR
+B:C8H.6 I3FR
+B:C8H.7 T2PS
+
+B:D0H.0 P
+B:D0H.1 F1
+B:D0H.2 OV
+B:D0H.3 RS0
+B:D0H.4 RS1
+B:D0H.5 F0
+B:D0H.6 AC
+B:D0H.7 CY
+
+B:D8H.0 MX0
+B:D8H.1 MX1
+B:D8H.2 MX2
+B:D8H.3 ADM
+B:D8H.4 BSY
+
+B:D8H.6 CLK
+B:D8H.7 BD
+
+B:E0H.0 ACC.0
+B:E0H.1 ACC.1
+B:E0H.2 ACC.2
+B:E0H.3 ACC.3
+B:E0H.4 ACC.4
+B:E0H.5 ACC.5
+B:E0H.6 ACC.6
+B:E0H.7 ACC.7
+
+B:E8H.0 P4.0
+B:E8H.1 P4.1
+B:E8H.2 P4.2
+B:E8H.3 P4.3
+B:E8H.4 P4.4
+B:E8H.5 P4.5
+B:E8H.6 P4.6
+B:E8H.7 P4.7
+
+B:F0H.0 B.0
+B:F0H.1 B.1
+B:F0H.2 B.2
+B:F0H.3 B.3
+B:F0H.4 B.4
+B:F0H.5 B.5
+B:F0H.6 B.6
+B:F0H.7 B.7
+
+B:F8H.0 P5.0
+B:F8H.1 P5.1
+B:F8H.2 P5.2
+B:F8H.3 P5.3
+B:F8H.4 P5.4
+B:F8H.5 P5.5
+B:F8H.6 P5.6
+B:F8H.7 P5.7
|
