diff options
| author | Sven Eisenhauer <sven@sven-eisenhauer.net> | 2023-11-10 15:11:48 +0100 |
|---|---|---|
| committer | Sven Eisenhauer <sven@sven-eisenhauer.net> | 2023-11-10 15:11:48 +0100 |
| commit | 33613a85afc4b1481367fbe92a17ee59c240250b (patch) | |
| tree | 670b842326116b376b505ec2263878912fca97e2 /Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON1.S | |
| download | Studium-master.tar.gz Studium-master.tar.bz2 | |
Diffstat (limited to 'Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON1.S')
| -rw-r--r-- | Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON1.S | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON1.S b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON1.S new file mode 100644 index 0000000..0cfc12a --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/ARM202U/EXAMPLES/BASICASM/LOADCON1.S @@ -0,0 +1,15 @@ + AREA loadcon1, CODE
+ ENTRY ; mark first instruction
+
+ MOV r0, #0 ; => MOV r0, #0
+ MOV r1, #0xFF000000 ; => MOV r1, #0xFF, 8
+ MOV r2, #0xFFFFFFFF ; => MVN r2, #0
+ MVN r0, #1 ; => MVN r0, #1
+ MOV r1, #0xFC000003 ; => MOV r1, #0xFF, 6
+ MOV r2, #0x03FFFFFC ; => MVN r2, #0xFF, 6
+ ;MOV r3, #0x55555555 ; Reports an error (it cannot
+ ; be constructed)
+
+ SWI 0x11 ; terminate
+ END
+
|