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diff --git a/Bachelor/Digitaltechnik 2/SS07/P6/abel.ex3.html b/Bachelor/Digitaltechnik 2/SS07/P6/abel.ex3.html new file mode 100644 index 0000000..75bb32e --- /dev/null +++ b/Bachelor/Digitaltechnik 2/SS07/P6/abel.ex3.html @@ -0,0 +1,158 @@ +<html><head> + + <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1"> + <meta name="GENERATOR" content="Mozilla/4.04 (Macintosh; I; PPC) [Netscape]"> + <meta name="Author" content="J. Van der Spiegel"><title>Example of a Mealy Machine: string recognizer</title></head><body> + +<center> +<h1> +<i><font size="+1">University of Pennsylvania</font></i></h1></center> + +<center><i><font size="+1">Department of Electrical Engineering</font></i></center> + +<center></center> + +<center><b>Finite State Machine implemented as a <font color="#0500e8">Synchronous</font> +Mealy Machine:</b></center> + +<center></center> + +<center><b>a non-resetting sequence recognizer.</b></center> + + +<p>The following state diagram (Fig. 1) describes the same finite state +machine as in the <a href="http://www.ese.upenn.edu/rca/software/abel/abel.ex1.html">previous example:</a> a sequence +detector with one input X and one output Z. The FSM asserts its output +Z when it recognizes the following input bit sequence: "1011". The machine +will keep checking for the proper bit sequence and does not reset to the +initial state after it has recognized the string. In contrast to the previous +example, the machine will be implemented as a synchronous Mealy Machine. +This will ensure that the output changes at the clock transition and will +prevent glitches which were possible with the Mealy Machine implementation +(see previous example). +</p><center> </center> + +<center></center> + +<center><img src="abel.ex3-Dateien/abel.gif" height="101" width="262"></center> + + +<p>Figure 1: State diagram, describing the sequence detector ("1011") implemented +as a Mealy machine. The number in italics underneath the states indicate +which part of the sequence the state remembers. + +</p><p>This state diagram can be defined in ABEL code given in Listing 1. The +output is described with the "<font face="Courier">With</font>" keyword +to indicate that the output will change when the input goes to one. The +difference with the regular Mealy machine, is that the output Z is now +also clocked (see e.g. the statement, <font color="#000000"><font face="Courier"><font size="-1">[Q1,Q0,Z].CLK +=CLOCK). </font></font>Also, in the State Diagram section, the "WITH Z:=0" +makes use of the registered assignment ":=" operator.</font> + +</p><p><font color="#000000">Listing 1: ABEL source code for the Mealy Machine +implementation of the sequence detector described in Fig. 1</font> +</p><ul><font size="-1"><font face="Courier"><font color="#000000">module Syncdet1</font></font></font></ul> + +<ul><font face="Courier"><font color="#000000"><font size="-1">Title 'Sequence +Detector 1011 with a Synchronous Mealy Machine'</font></font></font> + +<p><font face="Courier"><font color="#000000"><font size="-1">Declarations</font></font></font> +<br><font face="Courier"><font color="#000000"><font size="-1">"Input and +output signals</font></font></font> + +</p><p><font size="-1"><font face="Courier"><font color="#000000">X, CLOCK, RST +PIN;</font></font></font> +<br><font size="-1"><font face="Courier"><font color="#000000">Z PIN istype +'reg';</font></font></font> +<br><font size="-1"><font face="Courier"><font color="#000000">Q1, Q0 PIN +istype 'reg';</font></font></font> + +</p><p><font size="-1"><font face="Courier"><font color="#000000">"State register +definitions</font></font></font> +<br><font size="-1"><font face="Courier"><font color="#000000">" and assignments +of state values</font></font></font> + +</p><p><font size="-1"><font face="Courier"><font color="#000000">SREG = [Q1,Q0];</font></font></font> +<br><font size="-1"><font face="Courier"><font color="#000000">S0 = [0,0];</font></font></font> +<br><font size="-1"><font face="Courier"><font color="#000000">S1 = [0,1];</font></font></font> +<br><font size="-1"><font face="Courier"><font color="#000000">S2 = [1,0];</font></font></font> +<br><font face="Courier"><font color="#000000"><font size="-1">S3 = [1,1];</font></font></font> + +</p><p><font face="Courier"><font color="#000000"><font size="-1">Equations</font></font></font> +<br><font face="Courier"><font color="#000000"><font size="-1">"Define the +clock signal for the state machine</font></font></font> + +</p><p><font size="-1"><font face="Courier"><font color="#000000">[Q1,Q0,Z].AR += RST;</font></font></font> +<br><font face="Courier"><font color="#000000"><font size="-1">[Q1,Q0,Z].CLK +=CLOCK;</font></font></font> + +</p><p><font size="-1"><font face="Courier"><font color="#000000">"Define state +diagram</font></font></font> + +</p><p><font size="-1"><font face="Courier"><font color="#000000">STATE_DIAGRAM +SREG</font></font></font> + +</p><p><font size="-1"><font face="Courier"><font color="#000000">STATE S0: IF +X THEN S1 ELSE S0;</font></font></font> +<br><font size="-1"><font face="Courier"><font color="#000000">STATE S1: +IF X THEN S1 ELSE S2;</font></font></font> +<br><font size="-1"><font face="Courier"><font color="#000000">STATE S2: +IF X THEN S3 ELSE S0;</font></font></font> +<br><font face="Courier"><font color="#000000"><font size="-1">STATE S3: +IF X THEN S1 WITH Z:=1; ELSE S2;</font></font></font> + +</p><p><font face="Courier"><font color="#000000"><font size="-1">end Syncdet1</font></font></font></p></ul> +The ouput is specified with the "With" keyword. The corresponding simulation +is shown in Figure 2. +<center> </center> + +<center> </center> + +<center></center> + +<center><img src="abel.ex3-Dateien/abel_002.gif" height="253" width="535"></center> + +<center></center> + +<center>Figure 2: Simulation of the sequence detector for "1011" described +with the state diagram of Fig. 1, implemented as a synchronous Mealy machine. +(Screen clip from Xilinx XACTstep(TM) Foundation software)</center> + + +<p>Notice that the output Z is valid after the positive clock edge (in +response to the input value just before the positive clock edge). The output +asserts at the positive clock edge when the input has gone through the +sequence "1011". Notice also that the glitch which was present in the non-synchronous +Mealy machine is gone. + +</p><p>This timing in a synchronous Mealy machine is thus less critical than +in a non-synchronous machine. The price one pays for this, is additional +hardware. Making the output synchronous requires additional flip-flops +as is illustrated by the blue box (Output Registers) in the generic block +diagram of a synchronous Mealy machine in Figure 3. +</p><center></center> + +<center><img src="abel.ex3-Dateien/abel_003.gif" height="121" width="333"></center> + +<center></center> + +<center>Figure 3: Synchronous Mealy Machine.</center> + + +<p> +</p><hr width="100%"><font size="-1">Back to ABEL Primer <a href="http://www.ee.upenn.edu/rca/software/abel/abel.primer.html#Contents">Contents</a> +| To to <a href="http://www.ee.upenn.edu/rca/software/xilinx/foundation/commistakes.html">Common +Mistakes</a> list | Go to the <a href="http://www.ee.upenn.edu/rca">EE +Undergraduate Lab</a> Homepage | Go to <a href="http://www.ee.upenn.edu/rca/software/xilinx.html">Xilinx +Lab Tutorial</a> Homepage | Go to the <a href="http://www.ee.upenn.edu/rca/software/xilinx/foundation/foundation.sch1.html">Foundation +Tutorial</a> page | Go to <a href="http://www.seas.upenn.edu/%7Eee200/">EE200 +</a>or <a href="http://www.seas.upenn.edu/%7Eee200/lab/lab.html">EE200 Lab</a> +Homepage |</font> + +<p> +</p><hr width="100%">Created by <a href="mailto:%20jan@ee.upenn.edu">J. Van der +Spiegel</a>: December 30, 1997; Updated by J. Van der Spiegel: December +30, 1997. + +</body></html>
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