1 files changed, 26 insertions, 0 deletions
diff --git a/Bachelor/Digitaltechnik 2/SS07/P6/abel_samples.zip_FILES/add1b.abl b/Bachelor/Digitaltechnik 2/SS07/P6/abel_samples.zip_FILES/add1b.abl
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+++ b/Bachelor/Digitaltechnik 2/SS07/P6/abel_samples.zip_FILES/add1b.abl
@@ -0,0 +1,26 @@
+MODULE adder_1bit
+
+TITLE 'Volladdierer mit Carry'
+
+DEClARATIONS
+	Bit_1 	pin 15;  // I/O 0, input
+	Bit_2 	pin 16;  // I/O 1, input
+	C_in  	pin 17;  // I/O 2, input
+
+	Sum	pin 29 istype 'com';  // I/O 12, output kombinatorisch
+	C_out   pin 30 istype 'com';  // I/O 13, output kombinatorisch
+
+
+TRUTH_TABLE ( 	[Bit_1,Bit_2,C_in]	->	[Sum,C_out] ) // Wahrheitstabelle des Volladdierers
+
+		[0    ,0    ,0   ]  	->	[0  ,0    ];
+		[0    ,0    ,1   ]  	->	[1  ,0    ];
+		[0    ,1    ,0   ]  	->	[1  ,0    ];
+		[0    ,1    ,1   ]  	->	[0  ,1    ];
+		[1    ,0    ,0   ]  	->	[1  ,0    ];
+		[1    ,0    ,1   ]  	->	[0  ,1    ];
+		[1    ,1    ,0   ]  	->	[0  ,1    ];
+		[1    ,1    ,1   ]  	->	[1  ,1    ];
+
+END
+