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| author | Sven Eisenhauer <sven@sven-eisenhauer.net> | 2023-11-10 15:11:48 +0100 |
|---|---|---|
| committer | Sven Eisenhauer <sven@sven-eisenhauer.net> | 2023-11-10 15:11:48 +0100 |
| commit | 33613a85afc4b1481367fbe92a17ee59c240250b (patch) | |
| tree | 670b842326116b376b505ec2263878912fca97e2 /Bachelor/Mikroprozessorsysteme2/ARM202U/SOURCE/WIN32/ARMDBG/DBG_STAT.H | |
| download | Studium-33613a85afc4b1481367fbe92a17ee59c240250b.tar.gz Studium-33613a85afc4b1481367fbe92a17ee59c240250b.tar.bz2 | |
Diffstat (limited to 'Bachelor/Mikroprozessorsysteme2/ARM202U/SOURCE/WIN32/ARMDBG/DBG_STAT.H')
| -rw-r--r-- | Bachelor/Mikroprozessorsysteme2/ARM202U/SOURCE/WIN32/ARMDBG/DBG_STAT.H | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/Bachelor/Mikroprozessorsysteme2/ARM202U/SOURCE/WIN32/ARMDBG/DBG_STAT.H b/Bachelor/Mikroprozessorsysteme2/ARM202U/SOURCE/WIN32/ARMDBG/DBG_STAT.H new file mode 100644 index 0000000..a29976c --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/ARM202U/SOURCE/WIN32/ARMDBG/DBG_STAT.H @@ -0,0 +1,37 @@ +/*
+ * ARM debugger toolbox : dbg_stat.h
+ * Copyright (C) 1992 Advanced Risc Machines Ltd. All rights reserved.
+ */
+
+/*
+ * RCS $Revision: 1.1 $
+ * Checkin $Date: 1995/02/01 14:39:25 $
+ * Revising $Author: hmeekings $
+ */
+
+#ifndef dbg_stat__h
+#define dbg_stat__h
+
+typedef struct {
+ ARMword handle;
+ ARMword start, limit; /* start & limit of this region */
+ unsigned char width; /* memory width 0,1,2 => 8,16,32 bit */
+ unsigned char access; /* Bit 0 => read access */
+ /* Bit 1 => write access */
+ /* Bit 2 => latched 32 bit memory */
+ unsigned char d1, d2; /* ensure padding */
+ /* Access times for R/W N/S cycles */
+ unsigned long Nread_ns, Nwrite_ns, Sread_ns, Swrite_ns;
+} RDI_MemDescr;
+
+typedef struct {
+ ARMword Nreads, /* Counts for R/W N/S cycles */
+ Nwrites,
+ Sreads,
+ Swrites;
+ ARMword ns, /* Time (nsec, sec) */
+ s;
+} RDI_MemAccessStats;
+
+#endif
+
\ No newline at end of file |