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| author | Sven Eisenhauer <sven@sven-eisenhauer.net> | 2023-11-10 15:11:48 +0100 |
|---|---|---|
| committer | Sven Eisenhauer <sven@sven-eisenhauer.net> | 2023-11-10 15:11:48 +0100 |
| commit | 33613a85afc4b1481367fbe92a17ee59c240250b (patch) | |
| tree | 670b842326116b376b505ec2263878912fca97e2 /Bachelor/Mikroprozessorsysteme2/mi2/h/pmc.inc | |
| download | Studium-33613a85afc4b1481367fbe92a17ee59c240250b.tar.gz Studium-33613a85afc4b1481367fbe92a17ee59c240250b.tar.bz2 | |
Diffstat (limited to 'Bachelor/Mikroprozessorsysteme2/mi2/h/pmc.inc')
| -rw-r--r-- | Bachelor/Mikroprozessorsysteme2/mi2/h/pmc.inc | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/pmc.inc b/Bachelor/Mikroprozessorsysteme2/mi2/h/pmc.inc new file mode 100644 index 0000000..f58d547 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/pmc.inc @@ -0,0 +1,47 @@ +@---------------------------------------------------------------------------- +@ File Name : pmc.inc +@ Object : Power Management Controller Header File. +@ +@ 1.0 27/10/02 GR : Creation +@---------------------------------------------------------------------------- +#ifndef pmc_inc +#define pmc_inc + +@-------------------------------------------------- +@ Power Management Controller Structure Definition +@-------------------------------------------------- + +PMC_SCER = 0x0 @ System Clock Enable Register +PMC_SCDR = 0x4 @ System Clock Disable Register +PMC_SCSR = 0x8 @ System Clock Status Register +@ Reserved +PMC_PCER = 0x10 @ Peripheral Clock Enable Register +PMC_PCDR = 0x14 @ Peripheral Clock Disable Register +PMC_PCSR = 0x18 @ Peripheral Clock Status Register + +@----------------------------------------------- +@ Power Saving Control Register Bits Definition +@----------------------------------------------- + +PMC_ARM7DIS = 0x1 +PMC_US0 = (1<<2) +PMC_US1 = (1<<3) +PMC_US2 = (1<<4) +PMC_TC0 = (1<<6) +PMC_TC1 = (1<<7) +PMC_TC2 = (1<<8) +PMC_TC3 = (1<<9) +PMC_TC4 = (1<<10) +PMC_TC5 = (1<<11) +PMC_PIOA = (1<<13) +PMC_PIOB = (1<<14) +PMC_PCSR_ALL = 0xffff + +@------------------------------------------ +@ Power Management Controller Base Address +@------------------------------------------ + +PMC_BASE = 0xFFFF4000 + + +#endif |
