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// L�sung zu Termin3
// Aufgabe 3
// vom: 07.12.2005
// Andreas Spirka, Sven Eisenhauer
#include "../h/pmc.h"
#include "../h/tc.h"
#include "../h/pio.h"
#include "../h/aic.h"
void taste_irq_handler (void) __attribute__ ((interrupt));
// Interruptserviceroutine f�r die Tasten SW1 und SW2
void taste_irq_handler (void)
{
StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B
StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO A
StructAIC* aicbase = AIC_BASE; // Basisadresse Advanced Interrupt Controller
// ab hier entsprechend der Aufgabestellung erg�nzen
//**************************************************
if (!(piobaseB->PIO_PDSR & KEY1)) // falls Schalter 1 gedr�ckt
piobaseA->PIO_PDR = (1<<PIOTIOA3); // Timer herrscht �ber Bit (Tacktsignal)
if (!(piobaseB->PIO_PDSR & KEY2)) // falls Schalter 2 gedr�ckt
piobaseA->PIO_PER = (1<<PIOTIOA3); // PIOA herrscht �ber (0 Signal)
aicbase->AIC_EOICR = piobaseB->PIO_ISR; // AIC End of Interrupt Command Register = PIOB Interrupt Status Register
}
// Timer3 initialisieren
void Timer3_init( void )
{
StructTC* timerbase3 = TCB3_BASE; // Basisadressse TC Block 1
StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO B
timerbase3->TC_CCR = TC_CLKDIS; // Disable Clock
// Initialize the mode of the timer 3
timerbase3->TC_CMR =
TC_ACPC_CLEAR_OUTPUT | //ACPC : Register C clear TIOA
TC_ACPA_SET_OUTPUT | //ACPA : Register A set TIOA
TC_WAVE | //WAVE : Waveform mode
TC_CPCTRG | //CPCTRG : Register C compare trigger enable
TC_CLKS_MCK1024; //TCCLKS : MCKI / 1024
// Initialize the counter:
timerbase3->TC_RA = 2440; // Wert 300 in Register RA: wenn Wert erreicht Steigende Flanke
timerbase3->TC_RC = 4880; // Wert 600 in Register RC: wenn Wert erreicht Fallende Flanke
// Start the timer :
timerbase3->TC_CCR = TC_CLKEN ; // Timer Clock enabled
timerbase3->TC_CCR = TC_SWTRG ; // Reset Counter
// Vermeiden, da� dauerhaftes High Signal (PIO herrscht �ber das BIT)
piobaseA->PIO_PER = (1<<PIOTIOA3) ; // PIN der PIO zuweisen
piobaseA->PIO_OER = (1<<PIOTIOA3) ; // wird auf Output gesetzt
piobaseA->PIO_CODR = (1<<PIOTIOA3) ; // Clear Output (low Signal)
}
void piob_init(void)
{
StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B
// disable all interrupt sources of pio
piobaseB->PIO_IDR = 0xFFFFFFFF;
piobaseB->PIO_PER = KEY1|KEY2|KEY3; // Schalter 1-3 enabeled
// Interrupt Initialisierung f�r PIOB (0x4000)
piobaseB->PIO_IER = KEY1|KEY2; // Schalter 1+2 l�sen Interrupts aus
}
int main(void)
{
StructPMC* pmcbase = PMC_BASE; // Basisadresse des PMC
StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO A
StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B
// ab hier entsprechend der Aufgabestellung erg�nzen
//**************************************************
// Timer (0x200), PIOA (0x2000), PIOB (0x4000) einschalten
pmcbase->PMC_PCER = (1<<PIOA_ID)|(1<<PIOB_ID)|(1<<TC3_ID);
Timer3_init();
piob_init();
StructAIC* aicbase = AIC_BASE; // Basisadresse Advanced Interrupt Controller
aicbase->AIC_IDCR = (1<<PIOB_ID); // Interrupt disabled
aicbase->AIC_ICCR = (1<<PIOB_ID); // Interrupt clear
aicbase->AIC_SMR[PIOB_ID] = AIC_SRCTYPE_EXT_LOW_LEVEL|AIC_PRIOR; // An Stelle 14 Level Sensitive / H�chste Priorit�t
aicbase->AIC_SVR[PIOB_ID] = (unsigned int)taste_irq_handler; // Adresse der Interrupt Service Routine in Vektor-Tabelle
aicbase->AIC_IECR = (1<<PIOB_ID); // enable PIOB Interrupt in AIC
while(piobaseB->PIO_PDSR & KEY3)
{
}
// Vermeiden, da� dauerhaftes High Signal (PIO herrscht �ber das BIT)
piobaseA->PIO_PER = (1<<PIOTIOA3) ; // PIN der PIO zuweisen
piobaseA->PIO_OER = (1<<PIOTIOA3) ; // wird auf Output gesetzt
piobaseA->PIO_CODR = (1<<PIOTIOA3) ; // Clear Output (low Signal)
// disable piob command register in AIC
aicbase->AIC_IDCR = (1<<PIOB_ID);
// disable all interrupt sources of pio
piobaseB->PIO_IDR = 0xFFFFFFFF;
// Timer (0x200), PIOA (0x2000), PIOB (0x4000) ausschalten
pmcbase->PMC_PCDR = (1<<PIOA_ID)|(1<<PIOB_ID)|(1<<TC3_ID);
return 0;
}
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