diff options
Diffstat (limited to 'Bachelor/Mikroprozessorsysteme2/mi2')
102 files changed, 7805 insertions, 0 deletions
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Doku/ARMQuickReferenz.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Doku/ARMQuickReferenz.pdf Binary files differnew file mode 100644 index 0000000..52db896 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Doku/ARMQuickReferenz.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Doku/AT91EB63_User_Guide.PDF b/Bachelor/Mikroprozessorsysteme2/mi2/Doku/AT91EB63_User_Guide.PDF Binary files differnew file mode 100644 index 0000000..e723804 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Doku/AT91EB63_User_Guide.PDF diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Doku/AT91M63200_Compelte.PDF b/Bachelor/Mikroprozessorsysteme2/mi2/Doku/AT91M63200_Compelte.PDF new file mode 100644 index 0000000..f015814 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Doku/AT91M63200_Compelte.PDF @@ -0,0 +1,1973 @@ +%PDF-1.3
%
+15038 0 obj
<<
/Linearized 1
/O 15043
/H [ 8752 3218 ]
/L 2105923
/E 85642
/N 153
/T 1805042
>>
endobj
xref
15038 403
0000000016 00000 n
0000008420 00000 n
0000008611 00000 n
0000008646 00000 n
0000008707 00000 n
0000011970 00000 n
0000012229 00000 n
0000012302 00000 n
0000012423 00000 n
0000012561 00000 n
0000012765 00000 n
0000012971 00000 n
0000013099 00000 n
0000013234 00000 n
0000013383 00000 n
0000013537 00000 n
0000013681 00000 n
0000013873 00000 n
0000013996 00000 n
0000014143 00000 n
0000014308 00000 n
0000014472 00000 n
0000014632 00000 n
0000014793 00000 n
0000014953 00000 n
0000015099 00000 n
0000015244 00000 n
0000015436 00000 n
0000015564 00000 n
0000015695 00000 n
0000015841 00000 n
0000015988 00000 n
0000016138 00000 n
0000016291 00000 n
0000016498 00000 n
0000016632 00000 n
0000016769 00000 n
0000016926 00000 n
0000017082 00000 n
0000017228 00000 n
0000017369 00000 n
0000017510 00000 n
0000017651 00000 n
0000017804 00000 n
0000017971 00000 n
0000018137 00000 n
0000018292 00000 n
0000018442 00000 n
0000018595 00000 n
0000018740 00000 n
0000018937 00000 n
0000019133 00000 n
0000019290 00000 n
0000019407 00000 n
0000019552 00000 n
0000019713 00000 n
0000019912 00000 n
0000020062 00000 n
0000020188 00000 n
0000020334 00000 n
0000020452 00000 n
0000020570 00000 n
0000020727 00000 n
0000020868 00000 n
0000021011 00000 n
0000021248 00000 n
0000021374 00000 n
0000021509 00000 n
0000021666 00000 n
0000021823 00000 n
0000021979 00000 n
0000022135 00000 n
0000022290 00000 n
0000022448 00000 n
0000022605 00000 n
0000022752 00000 n
0000022906 00000 n
0000023059 00000 n
0000023204 00000 n
0000023352 00000 n
0000023502 00000 n
0000023656 00000 n
0000023800 00000 n
0000023941 00000 n
0000024079 00000 n
0000024264 00000 n
0000024398 00000 n
0000024529 00000 n
0000024669 00000 n
0000024823 00000 n
0000025026 00000 n
0000025152 00000 n
0000025294 00000 n
0000025453 00000 n
0000025611 00000 n
0000025769 00000 n
0000025934 00000 n
0000026094 00000 n
0000026256 00000 n
0000026418 00000 n
0000026577 00000 n
0000026734 00000 n
0000026891 00000 n
0000027051 00000 n
0000027210 00000 n
0000027357 00000 n
0000027507 00000 n
0000027655 00000 n
0000027796 00000 n
0000027944 00000 n
0000028098 00000 n
0000028277 00000 n
0000028420 00000 n
0000028545 00000 n
0000028669 00000 n
0000028854 00000 n
0000029036 00000 n
0000029140 00000 n
0000029287 00000 n
0000029419 00000 n
0000029538 00000 n
0000029679 00000 n
0000029819 00000 n
0000029961 00000 n
0000030109 00000 n
0000030318 00000 n
0000030450 00000 n
0000030592 00000 n
0000030752 00000 n
0000030911 00000 n
0000031068 00000 n
0000031223 00000 n
0000031381 00000 n
0000031538 00000 n
0000031694 00000 n
0000031853 00000 n
0000032011 00000 n
0000032167 00000 n
0000032327 00000 n
0000032488 00000 n
0000032648 00000 n
0000032802 00000 n
0000032957 00000 n
0000033111 00000 n
0000033258 00000 n
0000033406 00000 n
0000033553 00000 n
0000033699 00000 n
0000033854 00000 n
0000033996 00000 n
0000034134 00000 n
0000034269 00000 n
0000034407 00000 n
0000034551 00000 n
0000034755 00000 n
0000034894 00000 n
0000035028 00000 n
0000035183 00000 n
0000035348 00000 n
0000035512 00000 n
0000035677 00000 n
0000035839 00000 n
0000035997 00000 n
0000036154 00000 n
0000036311 00000 n
0000036465 00000 n
0000036617 00000 n
0000036763 00000 n
0000036903 00000 n
0000037049 00000 n
0000037195 00000 n
0000037345 00000 n
0000037503 00000 n
0000037648 00000 n
0000037794 00000 n
0000037941 00000 n
0000038142 00000 n
0000038268 00000 n
0000038394 00000 n
0000038536 00000 n
0000038728 00000 n
0000038861 00000 n
0000038998 00000 n
0000039150 00000 n
0000039296 00000 n
0000039447 00000 n
0000039631 00000 n
0000039778 00000 n
0000039908 00000 n
0000040032 00000 n
0000040181 00000 n
0000040368 00000 n
0000040499 00000 n
0000040631 00000 n
0000040762 00000 n
0000040908 00000 n
0000041067 00000 n
0000041208 00000 n
0000041352 00000 n
0000041494 00000 n
0000041681 00000 n
0000041804 00000 n
0000041944 00000 n
0000042083 00000 n
0000042231 00000 n
0000042346 00000 n
0000042472 00000 n
0000042613 00000 n
0000042748 00000 n
0000042885 00000 n
0000043080 00000 n
0000043220 00000 n
0000043361 00000 n
0000043485 00000 n
0000043626 00000 n
0000043769 00000 n
0000043910 00000 n
0000044015 00000 n
0000044118 00000 n
0000044219 00000 n
0000044320 00000 n
0000044422 00000 n
0000044524 00000 n
0000044626 00000 n
0000044728 00000 n
0000044830 00000 n
0000044932 00000 n
0000045034 00000 n
0000045136 00000 n
0000045238 00000 n
0000045340 00000 n
0000045442 00000 n
0000045544 00000 n
0000045646 00000 n
0000045749 00000 n
0000045852 00000 n
0000045955 00000 n
0000046058 00000 n
0000046161 00000 n
0000046264 00000 n
0000046367 00000 n
0000046470 00000 n
0000046573 00000 n
0000046676 00000 n
0000046779 00000 n
0000046882 00000 n
0000046985 00000 n
0000047088 00000 n
0000047191 00000 n
0000047294 00000 n
0000047397 00000 n
0000047500 00000 n
0000047603 00000 n
0000047706 00000 n
0000047809 00000 n
0000047912 00000 n
0000048015 00000 n
0000048118 00000 n
0000048221 00000 n
0000048324 00000 n
0000048427 00000 n
0000048530 00000 n
0000048633 00000 n
0000048736 00000 n
0000048839 00000 n
0000048942 00000 n
0000049045 00000 n
0000049148 00000 n
0000049251 00000 n
0000049354 00000 n
0000049457 00000 n
0000049560 00000 n
0000049663 00000 n
0000049766 00000 n
0000049869 00000 n
0000049972 00000 n
0000050075 00000 n
0000050178 00000 n
0000050281 00000 n
0000050384 00000 n
0000050487 00000 n
0000050590 00000 n
0000050693 00000 n
0000050796 00000 n
0000050899 00000 n
0000051002 00000 n
0000051105 00000 n
0000051208 00000 n
0000051311 00000 n
0000051414 00000 n
0000051517 00000 n
0000051620 00000 n
0000051723 00000 n
0000051826 00000 n
0000051929 00000 n
0000052032 00000 n
0000052135 00000 n
0000052238 00000 n
0000052341 00000 n
0000052444 00000 n
0000052547 00000 n
0000052650 00000 n
0000052753 00000 n
0000052856 00000 n
0000052959 00000 n
0000053062 00000 n
0000053165 00000 n
0000053268 00000 n
0000053371 00000 n
0000053474 00000 n
0000053577 00000 n
0000053680 00000 n
0000053783 00000 n
0000053886 00000 n
0000053989 00000 n
0000054092 00000 n
0000054195 00000 n
0000054298 00000 n
0000054401 00000 n
0000054504 00000 n
0000054607 00000 n
0000054710 00000 n
0000054813 00000 n
0000054916 00000 n
0000055019 00000 n
0000055122 00000 n
0000055225 00000 n
0000055328 00000 n
0000055431 00000 n
0000055534 00000 n
0000055637 00000 n
0000055740 00000 n
0000055843 00000 n
0000055946 00000 n
0000056049 00000 n
0000056152 00000 n
0000056255 00000 n
0000056358 00000 n
0000056461 00000 n
0000056564 00000 n
0000056667 00000 n
0000056770 00000 n
0000056873 00000 n
0000056976 00000 n
0000057079 00000 n
0000057182 00000 n
0000057285 00000 n
0000057388 00000 n
0000057491 00000 n
0000057594 00000 n
0000057697 00000 n
0000057800 00000 n
0000057903 00000 n
0000058006 00000 n
0000058109 00000 n
0000058212 00000 n
0000058315 00000 n
0000058418 00000 n
0000058521 00000 n
0000058624 00000 n
0000058727 00000 n
0000058830 00000 n
0000058933 00000 n
0000059036 00000 n
0000059139 00000 n
0000059242 00000 n
0000059345 00000 n
0000059448 00000 n
0000059551 00000 n
0000059768 00000 n
0000059951 00000 n
0000059975 00000 n
0000060837 00000 n
0000060861 00000 n
0000061961 00000 n
0000062759 00000 n
0000063402 00000 n
0000064132 00000 n
0000064710 00000 n
0000065601 00000 n
0000065625 00000 n
0000066708 00000 n
0000066732 00000 n
0000067756 00000 n
0000067780 00000 n
0000068378 00000 n
0000068685 00000 n
0000068890 00000 n
0000069131 00000 n
0000069925 00000 n
0000070014 00000 n
0000071092 00000 n
0000071117 00000 n
0000072328 00000 n
0000072353 00000 n
0000073627 00000 n
0000073651 00000 n
0000079178 00000 n
0000084358 00000 n
0000084439 00000 n
0000084519 00000 n
0000008752 00000 n
0000011945 00000 n
trailer
<<
/Size 15441
/Info 15018 0 R
/Root 15039 0 R
/Prev 1805029
/ID[<303e736c10e99aa84622a28a8ee5b6f1><303e736c10e99aa84622a28a8ee5b6f1>]
>>
startxref
0
%%EOF
15039 0 obj
<<
/Type /Catalog
/Pages 15030 0 R
/Outlines 15044 0 R
/Threads 15040 0 R
/Names 15042 0 R
/OpenAction [ 15043 0 R /XYZ null null null ]
/PageMode /UseOutlines
>>
endobj
15040 0 obj
[
15041 0 R
]
endobj
15041 0 obj
<<
/I << /Title (A)>>
/F 15254 0 R
>>
endobj
15042 0 obj
<<
/Dests 15017 0 R
>>
endobj
15439 0 obj
<< /S 4485 /O 5248 /E 5264 /Filter /FlateDecode /Length 15440 0 R >>
stream
+HU{TSG$4.Bj*jS +z] ,{<$1 +۵4 r-H}@XEሲJ,A(tAmSk² 37 &ɽf~ +hEYJcdR&beT+k(LWA(RH8Χ:r45F6H +!'
>Ϫ~R +g 4m`Py6:Sm]U?VNcn$Vf'b [P` ǣ
ҢCl(UQp%OM)! h2!]t\!IwJ6_SvR]|ˀ + '!oo;l#)@ /) nSH5xx ~њ?}|w`s%A,x +@ ܻP: f Inba>nOZ}<q86)@84Ck;u\?=Iӣ ³11É ǮzP`Pcy.M F0UЎQXNCܰ\U +2G5 +Ϯ<??L3s!n(ʫ2y2.NҢI:,}cw`'LH[k̬<7J w/O$A@7 w
W=8qd+٤
" PRuC "[("JD6ٺ Cix!**ySY{e 'y|FXSxS3W5г*].t"_]W!8< eн\ +IW,O>oicI!ǜwp 35I۾B12Fsm|x6WEjHOh+ 9O +OOm7RCQMk + Osr +XȦ|-ԧw*m0v 7V>yzrj]< gLJ;2~i.oWTܸ$!Fx ;iw3n +X>\bOuf He詔o}5H04Q6=XagMƈX<b)X1Թzj4y<bs4XO RkS Q +1ZQ_X0c[rd¾N E;KKfXX;G +!'
>Ϫ~R +g 4m`Py6:Sm]U?VNcn$Vf'b [P` ǣ
ҢCl(UQp%OM)! h2!]t\!IwJ6_SvR]|ˀ + '{i* ;gc6)ۻLCkBehDVT$G {?R8 o# +إę +!B/l/:]Cc^ u҆PkHq q3O&=8LJ/ۨC~Ѯx>Ux
#52a 3<\4Z0^JߙHI[2 +F7D9Ux#~N3 'gY3P`ͬt-('97bG*$͑P#D; xVlUxe\kک$s ǫl)غh Q.$B,#M fh|k99Ov:bDW eqJse9h[r(d/NmS2^?r
mI0~ZI"H1iyˍZ& x 'I&f+kTE +Hn1 Y#b'κJH,P,PA.x}~%QU2q~;^^^~!eI\"V6SϷ% 32
cy(HA 8*qucZ]%؟#NJ pU"V/4 <y6x +hu + S춒j(!()j럐n +y
gm^=rN} Y+*($F 0;!\e2]F + g@,3b2WtqccN=H32Br+Sn.K<hz'ϹB|: < +&-I{Ӝ9'Qd< _Q
c{I Rz$tdjGhb1 $ + c 伱V aG;YUsFG +1GFRgKüTM76|O:P- |d?j6*lFq>/JrMX*Qײ'vfZX;ۗufrHº,^w$H;΄DVsd}9ۙ|t?nqDVwH}2y4? pJQhoܯu|=>? +HUɮS1 ߯Ď3|X ,$t`s 7eYUU{NlSlciu)&'glfI&%slr~2;l#T<${l+_$(KQlJi2
X:#!6+L!%{KU.Rn1l](E)+搻!KZp l=2Er̾0G>FQ '6zjDit9N%z&#+H2eq1cgs6vT ]Ȕz]la?dٳfP3zP{n2-?gr7(K)4. Nۃ b{F> +C dkdqT l:r 8>` W3K\GC4ljR͋{"ҲΆW!!wH ^L;E~k>k 1&#bxuR]Ė1e<Gix@) A -8IW6 ]%T]'!V08=)=15rn:Y.-Gt8`oaQelF㋾B% KRUL`va#B'Kf%m6Ş3 +q;|ߦգIN LyMm#뚏Pr,ȯgBtO3\g@1=I鰢)b IUKqe=K <V"nOS?' +HUn9 )x4c8Xn"v-' 1eb K3.)?I[ - "ŏG +z.r(M2H +WIܻ1``<a^/.2yQvuJZ^ +)}Q?{&ӵfuV&w.Fiv 7~6wWo_)9 ˵538Mhi\?{ ;a.ڿ*!^jR)ga@]h0r)U:O2N*]dzHY-R]g3/eA{[ ґㇽrlZS^-yc~GT8%+ܭ}r:NIID>@KLK @#2a!T4(1{a/t%{aAdNN*Εp
ЖaYM.dVɤ.\>FW*T$ QQ(5N(zn;e^ E>I$|<@2a.BɌvm[0Bl 9& U r7lS"Ňofq5)ڃ/ Ceܱ
u6ٽ9 Jbg*i&y T(puv qJڭt*{=Н~DzĤqt61%bl
$qDg!@KoT ҝ`8ꚣfvb!wğ?|{H7C/IO, 7 _J6QYxc +"/m IVyL +OÜ=9 i*ʟRB#. ĒƛL9\ض*ǀ<)'$gٌ=v0R^ fİC '-O"3;g !tks鱗 z:vap}ne ~3 {4g7EHJakD CJek:7E }P` +HVIO0+|q +ZAbF I۷8R i{#?Ya 8E??uI"2By8bOZ|cNDq`;I6F;0F\eA&* JK,,^ 7c,e HWaX-KV+ŕ?}~z7hfY +m+ǻt~1AhFܖc'pprxS]0+)b`Ղ&N+5-jg]B9 <iY\o ׁ#}y1f,L[ű9DDE;Zm %{K87& &2&2L&SDX
gdSbly0XMJ2ԑ1hc!h6#eyYɺ" r@Hřq4 !5pHC49ji |џ26qO7~ $X] +3vֲJTMňS`h ~GA^9zG褎ewּOI^Yb6Km
63l)UBjW} U95=,8=u"/N ai| ^I \s hD]ԨDh &Q5B-W~RyHJ+#* ÏJDh7bvlw .. +"Eb\vqxod#;_e٤;?vp!e.+kb' 8˞( +Hbd`ab`ddsuvsMa!C qM <,?x~{گ6V!$8߳ghb`addMMMO400300w/,L(QHT00`DZ(8'*W+x%%)(8(M(V(J-N-*B] a c;B`O10a?f<wngfό4zw'O8l90m
I[5v̲O1i̮#}wDFlo,ڳtqɋs&^K`6DzX9..U1N9/lSx7_7~zfwP!{fƽ Eﺟpw쑳8qs";wq{#~^y{u +Tm]w@6oHo{!+_՜G`{ +endstream
endobj
15423 0 obj
<< /Filter /FlateDecode /Length 230 >>
stream
+HTPn -/JRXk\8Iam! a\ 9)#vvgL0b=*WwJ @x:vta 378M= +endstream
endobj
15424 0 obj
<<
/Type /Font
/Subtype /Type1
/FirstChar 1
/LastChar 3
/Widths [ 400 768 549 ]
/Encoding 15427 0 R
/BaseFont /ECCNNB+Symbol
/FontDescriptor 15425 0 R
/ToUnicode 15423 0 R
>>
endobj
15425 0 obj
<<
/Type /FontDescriptor
/Ascent 0
/CapHeight 0
/Descent 0
/Flags 4
/FontBBox [ -180 -293 1090 1010 ]
/FontName /ECCNNB+Symbol
/ItalicAngle 0
/StemV 95
/CharSet (/multiply/degree/Omega)
/FontFile3 15422 0 R
>>
endobj
15426 0 obj
<<
/Type /Font
/Subtype /Type1
/FirstChar 32
/LastChar 181
/Widths [ 278 278 355 556 556 889 667 191 333 333 389 584 278 333 278 278 556
556 556 556 556 556 556 556 556 556 278 278 584 584 584 556 1015
667 667 722 722 667 611 778 722 278 500 667 556 833 722 778 667
778 722 667 611 722 667 944 667 667 611 278 278 278 469 556 333
556 556 500 556 556 278 556 556 222 222 500 222 833 556 556 556
556 333 500 278 556 500 722 500 500 500 334 260 334 584 278 278
278 278 278 278 278 278 278 278 278 278 278 278 278 278 278 278
278 278 278 278 278 278 278 278 278 278 278 278 278 278 278 278
278 556 556 278 278 278 278 278 737 278 278 278 278 278 278 278
584 278 278 278 556 ]
/Encoding /WinAnsiEncoding
/BaseFont /ECCMPC+Helvetica
/FontDescriptor 15413 0 R
>>
endobj
15427 0 obj
<<
/Type /Encoding
/Differences [ 1 /degree /Omega /multiply ]
>>
endobj
15428 0 obj
<< /Filter /FlateDecode /Length 15421 0 R >>
stream
+HVnF )8<HζY4QkCӃ,+ +[2l%ҷ NR`)D c5ITп/TM>|tʨqU^YlJ$N|7IduvL#Z}Bk%/BE&&Ns蘄MzrcrvcDžV"zՁ1hXg$6
+@ l<tPUq(('5 z hv`-{@`)=M @M7u0r/G流!]-Y$f&;,ɸf'06~? HL7W Lu&Y=`Ԫux{<kTVg(&]xRiZĹR$Vls{(y6v1Ob[M~n;u( ל$)N]Eǖ +)Ɓ{ +{ݯTLxR<P rP4YoZmXvTlKS= +W㊭NO5|PBhUwܩ[e 77PS +vIBNfxޯL 3 52i+&@Rp]&JsHY)gbiE.zP_1 6>#N2YzWmCO-Kfb l"a낭}
@d^ +HVKo8^+x$"R `)=2m%Vip~l"|#-/iֈfi^e ĬۅW~rʤ' +}fYj 4>IIs*-G1)]Qei%E{T9<_2k,JJ#~t! 1x]GՔ OZԒU: +Hn#FZ!'(m-_ZM*m>YLS3P*7UQi!Bza~z)s8{AB~ T #YDp_Mi[@B6g0|ǓqNՀ r;q`Cl"5A`)o
@!a6⚨CB-'`ֆxT7sp80WD&N\Zh
~د.P>z+ +q:Vpa +MM +Hn6,,cRhqO9(2m%Ò'mtE/"W/+Z4jھ]0i[X8Oi LҤN' /@fx3Iz=L"T{> pdTע Ř g [Sm/<A= SHK8zxڈEϭamT퉰%)n&Kk͒Aj/ƅ61_9 FE:'a\4X +
d=A.ZZ<L e9~c&;lHPNl躑Qj B)4)eh)ؐ _@M^QS1nM:z 3qܔ<~ů[<fEh<p19 !LPg$Jpn3fWܮ?C +ڝf4bpJ^␀v"qUDbw ]ac2Y(H2Kdg_,@gWD҄XMKhꡚ)3և~9I%zD8 +WṉMq_u,Fͽh +u 4[ 7i(t l*GG0Vbƽpu0ᯍ !jw〵,}u喘&q9zI_LJ6^NW1kaD=ߍ,dyA3A[- +HlT{XWIL@a&X "%" BKkժȣuV">Z_HKQ nw ݙ3sIL@$i MuIaNNpcHn+ ̸9o oEE[KvZ1J !I+jOwzJ`F,'+&<Mv>#vڰV'g,תWgi٪̌,^RFvVeiY=M.[Q44MJUFj.=C:SQiғ=2T: <[d !b;BArbA& Ad bA $X^+ b9!N A ME" [E3{*Z%HjM.tGsŻis U[X[YZ5sAK'K?|}O>Zk%
֤2s֯m2l*mn +m}lm+m{nMnƎd%{ڳIl }d2) |%vi'%PL8?VHNJPȍq]4 NwÐ" +1E6Gχ a͑}Xyh;$3HQ
` 16n"UԷ?ˮ]P4`'{achĈI + ,>a?o F<GyMFVV uc{Q߷l6*\Aq +fr [
4s/Kt +9J72QLE4Q6({vȞ9|og?ٛU,gt FV@M i2LV?)&@Up D3Q]&Í]0"EyWp=<9 t guͦgB QwI+A$ +hjDU vXL 4L5@*FG>O$MTܺ%͊xzo/a̻|YB,zB0hу<gǁaWI-yh79l[EBIU#y
&!7~e1(%~ 1HadX +]jp%$@B
" +2^=&Ce
`:DK:js 21 0[Ğ-6XPىJ"ĘEtI/U\|d RgHe0Z'{ kVwuCPcb :ز]er啁uh;? >EVY.^]Uy9!Ц3!%|V}#k;85ȌStQgl9Gd-..P_;G?} @"o~=G{rJ0 Z0sYh"7N =}QSׂ +<MlgCk GKw{丟wǹ5<sB9z ~ }T# з Ckan!(6Bq qr~sT nOK(]Y |ۀQS Z%wdG^Ș~cػ75n(_.5n~GlmgEh9_8/6֏W +?"Sw2+ʌl7 7]qʼn騜 A<( p/$ref{rEgp:;`
d
W*8;TRȚ>vr@x9N_t+$Q+=4@G'mp
!64 9r]k`:1VqjrTz#'_
j?r䰲XXRW%/0^` D-ʚ;d2 +^]8)8 p 8YdM_ :^_=,;.s@3jT"`;"Ve 1Im1HEAѢ
FV
Y `kҞE~;g~3HXPyARb mnv Ń\Y ^3 .5E'@QLXz|p$ 1(Ph>BDf&s{i3c hQ:sSh^V1CKuޠ '& NBAVڼp~ +QaX
ka c0o$@ z{hޯ Y\ V܀` Dn AÓX 8Ƽf
)Qy:a..7t
xW + kQj,2vul5=ucu.u΄ (n(W ?!EMM3NJSޤc
-O@7/CZا-V\ Sp0 +@^/
Pϸ`ԋ xlaSjcQ7_K TL# 5hCUw@cq f`8P Bm:w5bIaTϏI|7Ji,2D||cu|Yúez64)
*&L"qZD(/B)}ĺ 6Z~SO=ZW $Rv)u.k;+omcn@`vykv+_
Asܶ]B_ G[,; Î*nkXE }زQ.!U-us% qx\+sߤsCn }0e##,=˨IDm US9F^0 ]6~{4 Sψ[fUY@xRXpwhڤz2xisy G7i< -KD9I4fHlU bdHhq`'y-g E \v vP1}B +y` +hdZԍh| oBO=$P't0nGDD_ +1 da ."cb
(2gл<ЅP$~Jm|:JB «%oM&`!PCy4t.HQC&B ?oiq>EϮ}SkkX픏% +oo.r[ N_23W^D^,Kk <>_QzXa[֢7.K ]i]=\}=sTFRz}*{T?nRa,ߜPB[ΆAr|i{Vsb!〡MZ7}qT\(drvM>S+Q:%;dtxjnv C8nqt7vTa]4A0} hXlvD+LSn M U#i|V#P6C4 ,wx03}s!` <GFbgw֔isC+ˏA. `AE=%t]Tn@\r3h孵3G[{'_Af *ۇvӮwsß}iJ[
uxؐMZ[3I` ;xRyE:^lku[U[̉ Itc[X ){F(q
d خD3axK9qt14q]NfsF x{Ayk6C +U2ds+2r7u跣TIZy,m"%(r29HN?W
Lw)w .kR?"K(N0c#~m$fTĈ# ĬΌt3N7?0) V˜۠M0fAۻL,ͽ;bt̻E,o#?eGRKUﮖ\C_ 1N!o = +{[aFM9XGB}Za=?3v a Lhxvj ipCvlIROG؎e#g{SWw[K]3шۋ9dYw *ijU&ծ& }P#C5l HNNegzHAܹLҴ^% +ӊ 1jBm}6)Ԛ|ҰJ| ]Ҡ;r6HO_Oi'Bx$}@/1W5 ҥ'x}0/KwMݚx6˒_;ʷ/MCK(&D'=Zo3X +.0% obMĴ7JX/ٔo?KΧm ῷX+4 %u4p)u? +̂rxQ
=z C=!.ǿ=ʵV#kԩA)At3wiz;>֫}G B1w;zRRt;YPF(w K&H>/gd^WaQ.Z}aى|v)dmiD4Gc~2S_LsF$ZT$G80l9 `좡B D/po0^+qfǖ⽕[قxrGv _
Z;Vp+SYj-0Xt#`O *vQY
\S
Ed-L"F,受\RfIKq> |(خ>&jhM 1tTs8Ǽ8wׁBmXv.1S<a7w/PY!ܮ;m g? [ 0G*F , ĪP.Wb79 %y@ QWfJ|0 ^FTbd[\H8XH'uqXNXgVFr>E :8AFSHhA'A,@wi]u3Ud]vjy(
mޙar
aA
LA]p!A9T_|siP7O1b +endstream
endobj
15435 0 obj
<< /Filter /FlateDecode /Length 5085 /Subtype /Type1C >>
stream
+H\U
XS!rs ) +2QPʯBAQTꔟD~K4 +Cf\@I4C2$$t5O~$16mhfW)/uLR M+u~ hPk+)* +, 5wx"WZ^V-br1 .fZ~XbJ[RLK*,bb1<jK^b.ɷXwW@h ʗ2Rԏ T,EQTJUIQ{)PT&S +j.9L
# z/}pz\d]gȻ1L] c )Ŋ.JZ9WYW^Q39ʫk;gޒ*HrvZ|||CԯOF dihF&j_Ӟr\9w+7k5Jˡ9 ry\c/^E
,uEe6PT f8$TG$' + -R-h۶3w*OZ&0 Vύ!dA +Swᦗm!9#eShq +n̈́ɝBX5ޗ0[n?Ng,(.Xcb熳7=xƜs'{*§z1hh#%HMKz 5 <f3p:^v%&k7S9 CIpJOӣlU3Oum;vdUv7۰cZ Ŗ 'OjFn "}e&̄e= ~&ϵ'
iӧKsHP-nBdǮ;vhNtԪܬ6xdv'A7xvLјރ&辰Upmcsϼ!86@OaEIȿ8LR,;$Lz_'(,R?fC }0D׃}U->T| Ig{??VklOtE sQ~!7cOt4 n\ۙ"Wˇ
A>jL"LyXPN3~]`s0 E a~ tFJ}W xêgVNʠxǞ XD,^.vL#d`J!Jho)E&8Wtp':EǕ97=7ׂ&qd +X e R XNY,sM2ՀN%'!D6'U߈ ,3 HA~Xk \6<{}4v SKD`$>6_+ +pI B U0Ud D&=('HM܍0Sc1 x1+ <~r8Ͱ" +Dm"D
J 04f&lڞb&;;;|ym)у [/{4㨿ᐴQ" N38 YZܝ +R
/J$ /7՜ )^ /ZHpBYfP78It# p_E/ÓPn aհhS*@A+[xu2 Ѡ(&2#I5>tWd XztDw#[]b3c mHxl>p1GZI*&qa p~s&ˡ'Pehojyt9#SzY6g q٦gQ!z!iiy/Δϙ}MΠրLJY(b7[@7t3ovK +HdncKHO`RB;̎+zwUgdΰD ̥Ưߝk
ktSoqPVʉ`5jmζUH8Ra($ +eT 2)*m Qc`1/5)^P. /oVkE\$Ҿ|UNj'H*J.pP*E_ ]U z8(läѫzl$s\W4M-EW`jLG|gMH}G7X%u-&_JY9
w3$X\[S $qNF˯ ۤrtg X~BDș k^H ʞQ]Ϸ4ka6 PXvF ]01- ><f)ׅ,{s3!LV⣟F)w!|bRlŗJǝˤ:wku:ӾdMTmϴޖq?P}e9;b +C +<ᏘbRr0QN\:s~ 17yA;0M88CiHrllT@Mj^ QsUGYeR"9dy>X~Jϋ038N^*qf>A)_Tq`R)"VvħwIHwoN%2 s7\ٻ 6~ƽ:Kf/v8{=5') Ibw%Zø"~snF
:=ڿ UXo<wBd/??T6RN J| bHX/Gv 0U^.R~RHN*Fj~MF-x7ҍ6^mԥj
M<XL 4" TN)847yKC鴯gRU D:*3a9_bY=XǼtrcDm\0G7 >eYf&]>y{%>o8<a= DzT
bԶՆH-r;dE{pT3nĈ9,KB +A14[h|v(n!<#5TBG@1W7?<Uu5sT>km;ztDC.- +pz%!6 + aw#Kjk`)kJ<D$qcc?X{]-̱g 1?u6S1~b䂄dcS D'IQ BXT03d_?Ueu7ϜJ/g F}ѫ m*7!-gDúP;х q<b( B% l7
w--G#rq#ja63Sщ)$J,5x]k;NXgv,_uKÜE "m1 Lp2ZS0 =Kl,}7bKORhR,
=i Iɇ7"%]'>qGZ@q03@gUY۵cgAz-j(We^ 9 TM^!Zgʔݶr--szư9z{N|G #h<{ +i5u5(3Q3Q*[ *zLE7H}Z]DQ 9;0(Lv:ik2XgiΚgml |yS2\R)}=: K-<UV^:e}ӫQz4qvccc2e=PyAP1']V ;P/G, )a<Y12
#A/yyza}3bn"ХZ$vy'
%A6Y̐ X]pn?01V}ek/%u%j]K& ]XPںi"pSvh"Uu+5/{e5U 48< ]
[6j16:7;nX͚ ҂~EJtzol<Rz< lpU 'i's<Aw"Mw>0- [Ty'-'K\-Ԍ>uA W*T9 W`B|4 @o.6P؈L\28Is%,DD`h_kbF9A P< +@WA+ IX$`Vj|plaׇ/>=}d/k2Ͱs_Ge e*"}K&=p +Z AW3^͚d?a! +7>W݄ +endstream
endobj
15436 0 obj
<<
/Type /ExtGState
/SA false
/SM 0.02
/TR /Identity
>>
endobj
15437 0 obj
<<
/Type /ExtGState
/SA true
/SM 0.02
/TR /Identity
>>
endobj
15438 0 obj
<< /Filter /FlateDecode /Length 15433 0 R >>
stream
+H|Un1WFm R8D IOlLfX~)= %˵Wm3<k!°57bXi<ʶSX@yX6*'FXT[Ɗ$ۤ JjjU+88lyXWӣ 9.6:W˥t* jLҪ$ -ϻL5Șs,><gǬ>ʏT<Dkky*U ۀ)%S̼x,o
JAY5c1bxOXEt\T'rbigfd6TZ=Һ$?{rܮz rbX쬖1r*s,% g ۩7;iXT=j:YDe¨dq ^1=sk\z0qܕ z1}u4VGΣH="+m^R&P .IwqSE=4_ﴊ :) x* DZ vYFՑVAj:fVlRɡS*J{Ҙ]ry94/8X5&_\MGp/1Ryxpl"*Y[L\qs&r GCS +NiŨ"ç0#vz鐭J` + HS_! SG`BUCչĕxL7? +z!1 yO J7zZ ӹ_s(My9m6#kjR@d<7ۼc&OeT +o#IO_ +HW]|ׯn +q6
8hD +ze>־}w̖ 6T'#lG{k\r4* 3t7]<M1Qw^Q@'87(:*WhPn]P6g;Lv:S̙ngC͝pg˅M[{3_˦5ם 9)s|CyV
>%w'N% x39MUN;mF37(wfa IIűcSdǖxRkH'7 ϝ݃|[ Ga1 >UF:p ֮Ҳq/YBu%rou +\ae9ws !GW'p6.LuXARj FD p" ewĶ0/[6;0Q: :2yn ev k_)8Fw 9 VƖ _B<C
ͼ(T us Ǘ'3 pG6)ɐjRGiJVbTTmO`֧̅Fv֕ +т.S2($<!g[z#\\}(;#",;2tDg +Fiy?ưYWiɪ(Q' 97B#=^>}#YwR]hQ1PLdfĴ?z d&O߽=M-#͐MD }%z4ǵco 47PQ<NOVѻfL:M8^V
o2cy/5b2r ^UD^ 9' hDC\-ΩF4ʗ4[> &1DbΝ3Mp #F:ԣrڣG<66.IL"hK^7V īj S!VoUmyÓ&<څlTSB;["C$ }f/6' +)ZXp{SzmTz\ztz}.\&xU.Pl~h,]Ha̋}e.[V8bI (=jk]n+#6x ĭt?jQU[]|Srrq([Y:Wq]3}ٕ/+6ETMg[q_p +z0 9sSΌMW)iq>N;VD# (.:ƅ 18-S(q/[ԥOihjB G;l#EDM=ӑ} %> ,X3r&wFU! ֕Zuѽzlη|C\x+^s46mZ8~.x 9Lk69սk=`= cg=-+:6!:O m&x+uPSl.m-)3 ȓQ*y +MO}H=Q +l[eG;sekv5Ɔ:VN +фr'g ~2vQGb[OOy= s a'>=4u> ynx 0ow +/Am8% ;1d-:sGVv~*RG/,h,hÜОMM?z~ص^a +%h
ahraE6І9Sp_@挆 |*ZdmOt |5Mі9{d-6]&h
ahhE6І9_@挆{ |*Zdm3<E6І9_@1pd
}ueּ7YEl
sF*Zdm3:)/%h
a裻/YEl
sF8d-6 7%h
a>^o
ݳ&h
a薽7YEl
sF_@挆~ |*Zdm3~x/YEl
sFd-6
U0&k蛬-sF*Zdm3&N9;in.i3:&N9wd}eN;iZ*:e>q&k蛬-sF7wdI2gtu'MV՝4-sFwd]I2gtv'MVٝ4-sF'wdI2gtt'MVѝ4-sF𱏥~^2y,h,h +HWnG}WcCOwO_Q;ƒlM67ɐ |֩!%g{X۩eɿN uEM-G^zT5䷓Ūf E-+7jQ6#6EY5j]QV?'?iGKOy÷fdިp:+2#e=2mԲϢ7h +oM.V:ʭtaK7XK֪K#kjkIEi HqAc7 +j.wei4+-$V +o\0$Qnk.onȢ& RT(ڥ g&m|IF\f^Ѣڭ +4Nq[TRL +.BiX +Bu 5Uqtٜ_Z"# @i2s]XM4oD&APzB+(dAg p5Հ9H z?@<*lHu@ + #%jv
g1fA8Zв +Tg|c p^U-qpI"ȕZNHH1G^62/ng Ԇ̸#m & w=5TqfL2ڮKa *.#a?(4!
1 *lՏ(/PGzVY> 5BMNEZM|.wl/(lǘjcvvN} +F%G
N=l +mÜ Hݣ,t윴@FPZE =[tR\3X*"t\0/e6M| H~Z;TIcV!.qׁnӤ_k^vKɃE%P5PJ-& +uD1)T(<+9RYR&z =qw{zSH9} ]Y40RT:*Oㆥsf +nL=]l{1'뭾FiĞ)ac \ )%N] 6&rN7wKQl݉j m!kyf# +
К7r8yꛬ-[B<lMwnY'Me(:R}̿7kDLDEkQʍH[}jxo^<Ń\<pk +Dq%nJ
O8=;YK1#&KUU%w]}Pij5\ +7֭ |ndI>Z-hyLNo>͗jS/zZ"(W t7Y4(y' Ozs<C҅V~ŲݺlCly;Y`Zg
8Xwu ;mW9 ԆjrZßcVdXG{-x1<`K]_gLm(xv Qp$xE<pfgKtAז"hS)/EІT44Pz{DޮAGP=<JfϮ-y6r;sJSuU <UKfK {ۮ{z?G 0 +HWMs"9+tژ*q쵱ój7@dT +[N~ TVZ6ª9j k) b<^<ʦE[:Bu,Dtvpqmo[{h!IgBRKY Rź 1ÂnQVwkksj6}%l_ERDau-p֍0hL>ݖ>iV*C=I(\.I!s@.t_jbHnG`Ų
Rb6vW* siR]z [
,^.Z]t~^gwz&UrlR +8ked2:e{F6(yP+q[{B+Fr)2)*eQav?5Χ ,3 LIoI9hA+u?])f4l{+>CN"ƻ)Oy4#).l(NO'$TAcZ[@iɞҺ!H"Մ;qļv <Xp8C8\\kNn:myQʁ + C
(Vr2 @SI@2V&u(t\ +"<
yҳ^n?Y,b EFoe I ]\WϾ"L 9+MbZ3^*v_wE&V.Ѿ/|` ~sQ8cU72 l+]Su< lo$jtMˏ18 +Xw+o6 N(;^"%BpVO +kIG Q)度M쨌ÎAGAm1)@F$i1d8V6kŽ/me'\̻>PPLs(M,u}ڊtPh +HTjp1Z)q
~& _
+gUf}INШt.&?_ +0 +H O0 +Enk 5( +-^.GRdnBʄ 2Qb!5s]\4Kh~$&rrury@H}>!_*
+U갚٭z5q✶ hxqϦiv=׃o
!^]7~'5 +endstream
endobj
17 0 obj
<<
/Type /Page
/Parent 15019 0 R
/Resources 18 0 R
/Contents 19 0 R
/CropBox [ 0 0 612 791 ]
/B [ 15259 0 R ]
/MediaBox [ 0 0 612 792 ]
/Rotate 0
>>
endobj
18 0 obj
<<
/ProcSet [ /PDF /Text ]
/Font << /F3 15412 0 R /F4 15426 0 R >>
/ExtGState << /GS1 15436 0 R /GS2 15437 0 R >>
/ColorSpace << /Cs5 15407 0 R >>
>>
endobj
19 0 obj
[
870 0 R 872 0 R 21 0 R
]
endobj
20 0 obj
9837
endobj
21 0 obj
<< /Filter /FlateDecode /Length 20 0 R >>
stream
+HWKs
ﯘo$+*-sr@+FLQR|@гTm\\a5FonwF1 ƏS F4N n>l.藅c~i3<O;;Ώf{Ƹ}}v&e_grg;3UgQ'?}s vƝa4 l +*0PNEk7EGp(K蒠! sEIɨf3'ݔj F?sjk7uy}vx|k сȅSfN#ٕEfrdEŘj3s: nQfn4mpF`ݼ}M\=V%C̃E}Z|XRmmّ4(OpaEP$~,:8X*46
2A2\J&k%KsA|_4o{"IѾ$#;YE N$ƍ1b(3P&xYUZ"u၊;@=+Xm+.Denn).e"hNN{PuM;հb`tl
:D-ݩ<%֨u.d˵,$|P]cs 4~)U3OHwc
(B*4Fb zSA!jl"㞜*,0X L}A Q R~Gum>*nj"9t Q}YT~uZ\@\>X)tE3Tz +T' 3CUr4Fբ;Xu[;-V(XQ"ApneIFq:zY$
C1`S1}njkx+f5$eI _W
#ӑ/"[4wnȦHbXK3I3;FdÁlP,UIW[1?Xodb
m.%"89#YF8x7[s7(ǗE$vOE OGVk !$B7Wo v!$ކWr ~ >Bޑ_^уص3A0<+N2\s ޓp$ziYIG\е3 ˻>~8f\LA>Ǘa06r~N.OwL Msp Wq7 ?1 Th W7:ßÔ+jfSAI% )7QąO_||3`t8=`W9OCo >^=|'!f)w ӷܤ115 +R04 akh ,yn:{!kILS +~rL3/Zc6WE. +f.3kRιaREF:wcd]'k>Κ ]&u97 q}t'lPI^gʖMGrm%̜+qTmP=G%#?T>K셌:tZ4 hp[O3B1='c%%gOك{"t#dboڎ +8:.)nWKbrbKh9iR#YQW,-Gޟ.?:7 9wZO_wBo]o*[䥻FqUyZaY\06M35li9BTT9 +j<G\,c}XV5J+WW"l=A2nV⮰P&Tz9bh9Bu gK IRgaZ A"nWS|+P7Ζ#2$.7 TĽK^wj +ub^ohM4m\:oSSMR9#I.c~]MP'.luo
$7"sPD.;-$^NL]"i f&:Z@7nDDyꉞ-UWSD3'z*
T]k6kUw,v*,V-_.Bt3B*1W3/hf5sb.[ݙhJm%=䴌E4KFZح +$5\3 Q].ϙfx:-ư؝Ήa:@{N)dN p91}; EPR8f5$hN*tBIEwW;C[TI}-jwxn"YNGd1d
\&,,_GcET81N5ʒUGrCst볫r6][s C&5;@~HvH`nCZ{h6U ʖp#ke&皜,Q=J4q[EBmACWe'blGO{Q C:=Ag*\{>HW G4RE_l]nec.'1-ڭ+I`c >KŹb (!XR4^XBJSw"G'F-M`98w\F2EQp]l n0MwP+KW].x2ˍ2Bt(R&Yt[pQ]&nf4P+K.N2]n4C6
Ye˥me PW.]&2\F HB)~.˕&W{待˝z@]Yrѕ.S0n!:^y̒# +3꺪sKwe + +0 +
i΅ IK
6tѷzBl1f|`J&%W 5>K^"2'G){%6OE [" r~ P"c$<cژ+89Y.m#>ۘhF P%l^6/Z%z{@K +7Fweqľ24^,G冺a8ae?βՍ,zĶ6FYQ/ t2ƨl.7PK &\)Rb-sS'0eǥeJ EY ke6}o[DEuQC*Nİ!5zkb'.PxtK xR%:i ,L~Jn"ԝvUM 1}j:Ř5{2O<Tm
DD yKU|wykƫD͛ߝyq*ogac~>$LT EϷ.ήnv+a9w? }%5?'p_p?N-/~oOT ҟB*"E/ρeN +ӀZeA Ȃ2$Aؒ)FR, 2eRqj=<wK31%hk",=Xٙ ]W2yi&Ɲ$5@>+;3yZŢL}K1u $1# ^Y`T&ZvRu 8)#ȢlGV/fZ 4 ,aCw_Wrw_?zng>}L#Bf9lI0yUeRbVskLx̭Gݗg= D9ge,^i |_b롡0 0n~]xlnQ_ axcpt"zco~9 δqWȄ.80~x׆6Zʻϗzo +t? E/~.zE xUJbI YGrIH:u
PRɳ]5 ;=K˺#> ٿ~}C8<|}ܒFU<U= BڳY t6vS&2,'y#H:_;uQ'QDQYJ +lp¢-b<b|%ۣ-e n0ZRw2'uK'⓭
v\hYђMa M 7L-e2ǁ;x&Pz-q w'bqޝh +0WsS Pwmǝ)su +. S +:;HۈAܽڻ~!7!lH1
`u*)% 9Bo2Ae9b +{wBoB*ͅG EGCQDIp !7y+ɑuUwBnB* +躹i/LrܵH3wuwj܄Jn6J m@Nx;`9]nm[V,=]Rܵ0K$* #&U(=_MH-LmS ;Ky4企S9ًۋ }6O/G%LwG o5w7O>sbGP)T ʕ$*P臻~e$ AfE}~ࠓwl>䵖1IRա*Tuq.~Zϋ*QSӕJ +(u뇼]!J{yєp+UiVq<qB0eY
<H@5$X/,]{@]Z"1 +
#]Z\=3EhV"E2P(yӲj(p@E +-\}D)>|
'A͐ TW||%KUc& +ҋV8n+>#Eڄzjބ RoSzsJy&JDjp w-Mx[ P{/u ԻV 5>ES=0+l+Lg +pxNvZn^5RH|pWo/' O +pOZ8H)+] j o;LͥX'v+ڥFB "empT~A P;֤sP lT@2yx,[R.ඝi^?<O)mה^Xzn;GZ6ZZ/s\IcaqZnz{c=D +/$zȄĥ6DC#Ggy\ ﵼڷ.e6"$FYT&ȕ !EhlG/56вjһȄBd""smH* sR@{gH ;nd9Y^y@[7ՏPt*o) +p.nv!Shl23ǎWKO1WH+%YvޒPP+*-=!
P) UԿo^?B
!c^1Zd {Qx (< +͇3-fB JASמ"D̀*eXUd&ۭU̼'<_ + <^ϐڋ`ދBmk ^w~%(gVm3yIj"@: +<&!GZklbM|nAV GԈ\j;<RhI0+3 di/qf%t&/ŏz meXݯcY0@`(#Vhnk56"8¤/CAFdc5*rHkQ#HAʺ}F}V}m;[+ %
,0i;B 1%x{fZdUXɎI'%DgJ|?_DNiViۭ7 #,*h xp*[Nn,岔jޱ7KBHJIpY`im> sXX5N!6,=xn ݐ6 +HtWr
}WJ{[ז Mj5W<An%K, CYϔ x +r6A/u4? }'b.}QI~/M mx*E +0T"AWQ&CKٙ PL,(: 02Aْ*NB:ʮ 't]#S)S0Ս,fh^{ӖAqﵜ`h0?P?菗z)(h >] D*Ú=ͭU̵vֵ|7_Sv4Y+cffK"õ@^, wq7AdN9$v]Ut_\4M>ѽ1ͨj76OͩFoMK1)|Ķ^ 6 z=Ֆ.VAL6|(zG \VnHA +[fvλbJ
aw;Qyz8q cfLmg]&Ir7" #gh+XaO7?0uS;BIT<#KJ1QhJD.3 vMok N!Uvx4IЫ8"վS̒A[B^.-}Û;~WgY$e c w SYF 9Jj;J0 qN༹D'ΛR
]FSt#J f. E 7'-7 +e,{C?xBتIwZBDJLJ5>Yjal
.U>wNW?mjE.ʄ\[XCAwݤc4t%ҝ/H1z!0.I3Pg9L_72nv@\z$SNQ*VǦ_!1=jpaV r]ďu~'1]\bN 5l:C &ҿ( %}~*CkGa-:ڤ?0凜>MmNp)Ƒ{vR ƌ#n6ͩnΔ,ƙnVsW#S~.nȷ4EysIZ:fjL,O]*A@sc4K _આO2kvґLre&eMxe/1lo2ȮGJM8ړ,~RtpEqyM\+ QBU'@?aPx,h1 ,Kg,!XXY0ft(YX YJ ,=x-x iM(aLVmd |pcY 'nŊ
n6 :I%F%&F'2Dd3~:J_߉s padJ5-8R%'. +2[ +?p +4ȳI>E bN>t^EC>)Hvmg\+1|@"%-\* jn}6 AmRC`DfTg ̀_$1U ^aB+/K
A =tykJkvxINqO_U8Ɓ_F: dHw
F< <t~pR l^&L7y2)ke8=j [ۛ߾Un6]XD9-@J%OmH봔H"hKkŋn@tPɆ=p;|'AOHB[/j~j\xiahDIP43Up8lrHnEGtϿN2(Bx**ƗKR(TY8ȫqkx!8ʙa:J2@{Q Ui%&:9=4#D1{a]ȍ_[v
Lxy@Ӯokk,vIE7fS-aMFr2 u-oxC3B $%>S3jW\LRyV[=W 3A-5m' +NUv S|O
Az՛l P{L +x1xo>iWv,ںnϵ?T xYOJxb /lÅC菏<V ̱ѱ \$E*ߤ
+
B +pwZVN/=!k>%i<
+Z &0.jG=+$}yi|T_}1BZ u
+`~}lp?TJʘ +LBelSTV
w0( ό/_:ZF6byde7Z83TS?rdO7y*E̲ sQϢ&HKQns}[ +ȯ((mMIXA)
_<]/bzhi*i Lu8s03MQ8 {RDӘISC [+ +GК6 ¯0VX4x^K04H{v~P|uXÓut@z>& ɒ8jHUjt"lalUS.H41 3иa"Ә<jJJΝ]Dm%ɫrbR{<TY}TLKz)X""ɑe˵qJ"RZg{'H}b;|UuK[AE }G-?`A/6A+W, x=YZF +l9arCfjCFd O3Bj>˃*LEO'T 9wNO$tKɏ?Nx1N4bEȿ/^ktU+&qц#}ʏD! )ApGWj0&^p;peUH6aL*!6nk6XnS?Ϋm+pgj$Wn:i<DT5,O8"boA,)m6a RXAxSzLsм\R |T3?Bn;GZn%Yq +jePxS^KӭΠ䖦*^Es3F7ze\V5=1 do@[2x8#Ƕ ![trf&m2` +5@G! +6]jSHdU_]}\xH +%kv
XTn"G +HW]o }_Ǚc +n ̓ٺv4Ms}1uއH=RGERہLP}/U$7J$aßNl?/ݴ2I MI&WagAJcԂ˰t=p?9id +:Xi0PU,߂ Ɓb"HhMS,ݳ4~@~-/"϶RHQ lH2Fᢖ^ 1qhG!R{8V(R xJ77=ŵ(t Tؗ"hm%a#@?jr`Ȯ"X=Q*oM>:Lx3sܖ,9%꯳ rvv6i%]&g9L8 + iƇ/z:1(@*F5/& +ҏ/^uYVVe'glfC[!-r3ѣC
~ 67%h 3%D1 Me5'I 뇁'2 #4N3>YEA6GQ$pb) V;E4 +Bh;׳10䛍4ѨDlע3b,UBKQ% jr J9j) HWxv^_݉[m YFG!Yޝ
2^ ac@f b3 XC4#VFU7~eHj* 5 E4~%ڙ+@8H6©rʸY֮[ĊN B"-,N _`q8gHG6yw:Ms&۸8M3nѝczHktGܶ[GFm}{p4ܶѵ$Y
l-Es EιT41s?|~Ny,L,
BJK@X@Y1Ulr!<kP,TFt +݉k| kx1 apM ,3hP:_lV` +gQdLY d#&w+^MK*E@Tywlς) d̶kdƀQ{6VekH fѬh6Fɍs# V \J(fN [1fG3egײ3TLjˡb)]nU`k +DpJQݱ_H v@-v~k]-f$PU3a&ՑfMF#,&GZ[\n +Go7Q4+PK!e2[on[oCspPdA+F\ Ba^G?.A #⍩c
nij*BY7pX nLdES kqvh" dMAxP +2ro2E};)ۄQ7\mjx3s/[LrR~xSVnczOmTh'.MtMksX4 Ro:( +Kb%;ul]h݈Pt\ * / + _V"Rq v.h`A3fB
w6o'B /#͇`\=> La H
\i 羬~#.7~ x1v]cjGCd
*ei + %m1\0k<nE9?gE2581s mrjQKQ>N\iX"<1$K,P2 ػ8^_n4{äx\ٍo SrqMf +8}-,k^Hˏ/-> u qR1"HKS1:_UH?>X-ZYhßO? BӍx +*{]ІQ4CTEhz!^&<
</`Ck<ꉑxeR_Slɖ_ۯ2QжB X`E97$ +b1xnǏn1Hm<X4 +"81l{/uIt_{V{W%> A)%e EYsQݳ:^A3B8pVkC|v6b!$]-A'FA^;jjנ&邶H ) +Jv? 7V)4դ7 + +7h=n 2jPrIURwn@!9 4V#8 + +mB"#]6.eQl{/ƓɊlm>vK
,&Y>
" ̐v`8Btf*;)$(X
+HW[S~_GT,t Ia[)*[yH&`p6~?f(OԭS5q -k 1њS(c _JAf?odHR9X=G̘6u?
G5Ճ
VW\ Ñ:9rd^VQ)Yg|]
PR; *СGqI8R^)j8iv =&ke6j= TμObp4Rc&ni>8C>x!61[#DeX[
k McD.f'ΧVDP #-]5wm562~[͟DkOFߦ?W8*%J тq%RW6E p-O`eZ8Y/Ƒ(60F
Ouޣ1=%)g -j<O > +EW䔜ݭ\-^ ,/e"c&^+ڠJDȀs
#$A +CT|>-)"ΙV,6+${1oŶ
7Į>ClcOKN>"d|Iè}[Cm9ݕR!`C+'嫏?aqVdM E>OD'c$ya}(ȩ; 3 =mqgFut4](QB"˶;G,nkiF +$7u ӳ/3"B 72xȻEGJh=*d8&UFbrȘX3\\L&7,BKB\m ~m2>xd۵ĉ9,OC2%+0( Z;sbT <XGTGҨJmv>tosAB\K<'72Цk='i@ȗ$ME=>J+OZjdDR
ո/IәTd0NoRhr;|JAiM !QmGXd4)q:@.
880)c +R+& +?z + $ +(oYj/Lh{ G4)q:0.M>օI^ Ujm?( +r}(λP|#R \}>%7ռm\|&e"gTBF O/(0%hH1tf7eF^ U9+k" +>F+C"+9/J}RCoW+_ +HWnH}W\D\6ܷ$ -<l&[Lʎ[(FfUNJAiBs8 rja氩]ʃț{mx.й s+>nQHd[ +o TC5AN! ElȢ_!Р! +s~X^e*I#T#%9
=K#_6^GUE ^;.R,&tgs9JAc0`}<UG UƏrVaR
x$Ƚu+״H` ~XOcE;<T7eW.M:2zC/ڲ;MGј.THC\ZSlUF? ?#vt2 P>x>eo}qtCΧLj_F .; Tj Մ5O& w2rL<OYE2dk\C }蛔ӶQ [E
^5EL$sL.0&X8:ltx!TDgcY ~8S?Z]~70}F7i<49;=NeB$lt G
/#t NsHm@5#mW|4I
vc+_ m7x +BOaMi`05p:LBF; ;ei沄kBQ9N*3,)_9M?bEL!\P".7ԃ "DifQp!:/F"m**a_z\]Th
uwGvm{WuG"Zrvfn8XV_I(ދ \ٶM3㧟+7!ē 0LS1?U1J"ܡ\#2-~4,zvpk eJ2sق9{ p2xzRD>,Oɟ;sܟS_:OtV2.ZDrsp +鸈,̙,)uoH8*I=_фT+3@R#1y(cVpd
ؤ`aHa5zԀl_/KggA8pB^'ęHu @:~~!N(pp &=D+OVe0ݣg0_HWv_3gIcSi@SjPJ7ҕ"F-^G;j$ ݂d%b gV;Nw
^Mǹ1
U-I4IQ fRhP01z#2dT60z`4ȯw_8ƫg蘱# tY'tG锷 w\.x\頫=: dzѫ%
т RH& +B#cj]Փa;)v\% !Tpk9zZ )~WypG^},~bNp2ʊ +E&wCp&g y GW +3*egqY y;Z~Ā +Fuѳntt齢hѕD \ҾMkS 褣X[VQ$cDQ*7֏4V @'a+xtzi2j),;
%)"6LEe.%Q,czK + + +j)e +9m=ZԸLG4e߄yP C/8n-ſ&1xP@ tvFTzl +, +ߐEr,'e] x;s +R#nm&q u[Kaұy|27G851 \b*q%ha B ]kᒞ֔;c AhsW5FGEX`$gHѼ<QT/ؼG820{Wʾd
čpՑ pw{}b,9Ena, : ֓o >іjl 7lHE B+TI@' +6o:㉾pBw^R]4E Gyd5'۩bb_/+TWA~c`Nkؙ;~,ڶoT W*DF݅;K472:e RX -Vd <pt( '۴Q"n;/L\'q~v%] nelȏ֨Bdh +Y(/GZM]nn +SQQ:tp3qSbleƚ.a1u8bJWVTSiЫ^ulW)c Wt>U;b `,wteJ^Ib[*pK3%8,W %/dF +n Ї!mvd_}ʜ K{Ag\Qm/{˼ǖ <<푟Є*=?GL~%~4Xruv5
o#"G fS:~%%0>7p,$IljKLsF7:e4EWO1."N\ڳtYi
&3r7 ƕ%߃tC7G-za ?In"C@'^.XQw&4z}k!+ "WĖВ*f6ZcixwI.EPIR Sfw ؓ, ; Yf!W J4BUf[H߄'l5K|*g5 s0z{.b[qcc ?BC㎊h)['iVNCo-ǫ< +tt1r3\5Ri)]^c 薺cn/89 zio1Iaiصjzf@g,1і9W I1n;BN{_ؤׇzg3rA(,9%D %IN{RƔ~EBGG`;@w=mDnIWTwHYF\~P I< I뿣4i%)RW7x0?oP&h/1nTU'C ަwzB<,A۽ V着BL4kM{rpkn5`bZɖ7S/7 +xk@SeރK% g"i<NDcHx9B!KB io2$0/6o#lTL*]F)<&n0Rgti#aT5{W&;W +"`rGc BRn C@\_5[ol{I g&!wt')sNG~
Qt ć$$Huuн + hw tc8|9SS15DBZ= i2>ȧ's#Yut4i + XC-ӭPcS'Yj7g"/+Z f1ღT"oa%ˁZn9R ݳ, ǟZDiуqE\zKzl3!"QA VNQM&!ZBQ. k9 +8[9oH630 ̔iA}X:s^rs nDU^ >!"jsȰy ģ $QFUX+SG em:PaTm=xT|P }00\W +n ΅!,<R Q(]ExlժՋ!),YUMҎQEI Nw^&Ys+ų够bCÚsϙxsO0gN> ?X4? [ӦtKN ;>*hMۼ̄˷dÜH++:(8%HۿT zO{}ŽّsS!c1,*nj h&!F6(_J7p &(-jճ.U[ÂՒlw,ρ49OKQԒ$ca/}l&ySpƉV|1M̌^¨-"|NB$4CWt T 9tL,Vv"*p%
$GG Aȅ\p*6FE(C4̱}E\4F.ur ڽ=ۓ]cߕUXS/LC K$*Oc+X~5v.؉ - +HWKoWq|ss'^&X8`A-D2&e[{_O=)yN fuuu=. +~咰rUf"uQe +3w(V +yl ڛ cS57O2 Ab뽹>N&Xanʲ3uM?_sjUVh#KV&0IEBu`)ksrS V~| +#)Nw\1?
MHlhU&XUkp@foлIt E2"@cqERH.Nb1rϜj- +V{EIA& 0<eEf<ugYn4鉽o8@"?<hH$3̜M[K*εY ѫt{ݓvMôt=-d8st O + PHIVi{/ UM +s"<q@Ax&gzS/a|τ) 97%GVӹ 0qC+X ;?~oɒ&J +JcfY"s-+V@0[ذkL9-ь 4|-jJz03{3ts(N Ra܋ޛ+m?RAe$ ,HV0e} pB\FzyUTu8r;PswIl0bu\^gZO` #0Bj7f"½?/s /t_('K;lqG gi5]JwYcX*",ah |j&ЃweF dŻy9J'Z.M
{7 O cGn5Hfy6CH/// Bcj,9UA% ea69C=kNxNTpBejTwP
sˏoXV +4Ns!Mn'7eBy5T2MOR +.9h'>#j"xݫl3GkHf~{֞*$бӓ%]Nf$ݦߺ@ #ݸQy8HG'yyEܱImzũph|^kmu^ i\yUI!ʜ q; -e
/h ~v9D \FR*B{ߊu H|#K[i"pP[ L*C>RȬ+kt6_? Dobi`2f0Nm A#_]]<P_-m*GUSyjUZPZ +Eꞥްz
Bz]/]/dl-^i-hή*@3PGR^@њEdT0ч|^ç[EШz$j"y&g-d?SAiV##Cw|}'>
2M9HP$v痢aj$4ʺ= מKMP˰:eFpvҀ 㞽EgK?rUC"s2
1g.u9
x~ %K%Xω= ;g%h %e(x<.-*<hᔏ)װZó4C"I6M8@{醎] ?IM{q|E GEtlEY !X9PҐyU I! ]۫" t+ 4$s nqɀICW麻vt[(CO\qFRQdT2ѐ%勹ٖY i3~8pNJ ZNpoKw,wóBS1k|Ka~^0䏒?3wp&/8!ݞ
h3i+,eyg%6gӼ.r^~ZEZ=&| 7ŇZ1F@ :'xa}tzf흪<3bSwGꙴG zO J;>ޓ!1v{PH4jLס b9x!"4sNdS" &<t*ə!# ĄF +(Kyע4ۮk a e? O·$ʷUnAZ8z,b ?;n?Oy3>;dG]p܌O!|^t{RAf" + -@(ݲ8=lGvfOjЂw މ!(wI2)VmIuѪ +9 ֜~]PۏftVH㵚 FOw!U'pnFLhX\yNG ڢ/EVEm2w1zVq/jRZ 5Jザjb +5FmǒaJ6z6}qvQ. Wʂq
j5 G\\_suiO.)# os=P2- B7k"0XzOD6eI 9+ ]ٺj )(}t})H j`։ Y$͚TjO&\3E=w; m&{$Zr\m t: + +EИ)dP6-Tu"bq\wMqJ d,:$-[3:t 'EZu2>{kK_\\[ŕLH'ܔ$&M},cl$\R8}I
թ}^L=L9:0Im%˶TbցP% }j
]j6MB#^{%My)c +^Tsjt%lm|&\^30 + j֩:h<y*=`Ji _N5נL 7UQ'QaAR5*DG*}T%"ૐU#? +H|WKo7WHdoN +ip1c4
QuQ5&Ɛ<Un1豓P7\ A(RTXkc"xBW BQNs +~k-dp,Bg5 eA䟕`f$KX9}DFĻ\3{蕆o6e5{H
dP0#zUc}_l V{.0cXQthԍ2(,U-CY錻|$k{
m$cyL,m˯s9e֩Qrt ZbAQn~Lm1fP{A9&z;0W
Kj1@L#Tl';Q],3Sj,_c*cn> v =ښ Xͭ
rkq2Kw2c27e H ^?˿c 0V5sp)@i6O}p<C;1˕\2ہǢ;ʘ }f.[˞ +t>A3ybUW @Gz/:ޯn4*=; !hu!qC@ G ~[ 9+| hO6ocFv!`{.PX ]}yL*>}X(ICAnjAH r j|s1^-4indK;cBBM\m D&bbx5?~V,sa_P Bu]DŽy:<$-.r}ZðYu vK|(?'g ZV cIxcM9
ߟ +
z<76~Nu(uRyWӉ7ދ +HWYoG~Ǚ@ O sMAŚ Ic +Y!)# TwUуĺ:?TfϭY ,`n6 U6 LmZk3uKYo?n~ { $
)oҥV6M!] +Kr5WK.~qYop kc:"fpY[!0&iuK sgr<nFBG~B]:l`2^Z*kZKY٨ٵPf)31: CT:ٌ`i |bR뒹0t|SĢh+ n ͱ7Vڙ.) jɮ'e2W"`؋Am^ a-P,W;ωd(k&;[Rhq{*Ul
(X
B}:Oaiz*;lK c!hLI0!M(J>K;sѭF&7h헫u\ 7e8xY?R pJSjl&1gJ5s5et͘N Z4\.&Hǐ7HUQEW).)1(OӇ%*,teb_3i-imI.Iw.aJXK +֬'GO&"fvt +v||U(* 3b)buE0!% ףO3M<=k +dsTc*Ū VT| "v$MS{LȆ=]ɄmV*h5.o4x[wˉ.XnLTWmK^UvJ2QFjv}K]LDgtSHoW;·W>dV&]Y ܦ+% f]ד(gCުyrtN5&YOKNI.~R8, +'2_r1vɁ2U<HIqEǩмW }5* cQ.pn [h0,eq{_"!#j\r,{/!}T
~Oc-%ݒ2S^="T D*ҟv3+,+z9q3Cގ"ys җK9}:|Ee?.s{²ԯ\j;бSItg]#Ⱦr'/F(/.!4Ģ/9Ϧ-@r-ĈĒ9̤THQ.':' Zc'tRV8θdTy,&xRE^4/|jv-dtG&F j7[(:I$gjW+^F"YNmNmQ !j @.6y+Чa.BK}Z_+Wzaדa'Q۹-&^ U>YUѷp_WG؇C Kv)P o"%ط)v +) YB ) 8SRk_CzޠD+9-:@2P9 lhx͡<;JdD!eE$[t +i8s/q,+V\W" 8r&&
xsN2@N"rVH5 $VD7hS[yS\*h$Fjs d^3#{Dy/O J~dD H/cELD'k̖^jM{[dwSU
/cm<3OP-6ځT:e CQЋ8P*}A*`JS/o:Cthn2DVZ"$~Z5vp3SvYz l GDZ_Y~5+f5C&Y7C>ϭ&9NS\Hg=rCDB
<8FƼZkf +H1z[Q|{^.adm#J/4=v~r2硋(6\~f]] +9@EJYj"e]3k>IKz*YY: }:X +HW[S~Gi+=o3[! ֖l -#9H)=߹l!Kͼ(> YUe4JؚYlf8c[,Ix:$FU'@iKyX csnmOYUY1O +=Fy.7к`SaeAͳch(
QFH[ 4JcesYTX!t;4 h6J(WB)q-kQLl0e 5.E #؇%&`u@7h1(\`yNE.ha*0eulUA,(Ud!,Q P+79F}Ŷ1K `&
18[Q r
+jqV]<c."8N6y + B[\52єmk(HHI0F_CK 9_,ϐCz{cqlz|6/ץ;쏜rg$Da4 p$]At8rKVx +Kl
#] {Ȉ;.&NV6M9g^v4$}/Hݑ>\ +\'ԃseI∈N%+"yAB Ov2Qd#[lƙpu[ +dc̜kt-A1oIuT=^Z)h9r
g#`,ʓ*?)Zov`,qV v&s!t+5H&ps8!~'\au:ox>gVGg~&)-eod%v '7JG$ờ*C*;UTU"˙P +i6|MZ:B/`wgrH#_*2BÃEh1Y< ^5;=
fsE O%bqSL>kyTFξRG8N%Pyjǭ7 +LSZɥB͊;tc7N +Q{I))isz6mt yF3j(=\<r@@˧J(%RutxM,YvvqbUۥp:p B˪8z6;8f 1FI-I7̖2 #T3s#l<d 3<*N| QRb{x:_> ' (H˷5]6
Rݻ;]5}2;ʫE"2xwӕz׆iedB +?mp^H9/}#<OǽnSr [9ebv +a,vT~ӁܪRPqXR^ G@B7M뽗P{?ދ +p; "0 +!ebcVG<AןA >kJNиm΅ۂ}[~ZBAyV:i /:.Ki&6"
S 1I#r j0xᑈA\ȽpWj :뻍Z}e< O!?IqwrwJnX`ii_:52 u +nG !)ޛA8x)v˅~YnuZ w[Z"U'ĘLLaE@@KXkn%UV\Rܱ#T666ö ~Иrie0%q6 +P~6"U˥]íދog}@!d{=1nu`.g_9Ɖ8"j.kMT% p`[<չV}l>5\5T9q jJ'Y 'Ϛ]0,gz_Ϭ%HucҐqZ!sQKfv; +$iC D7?*?A @?O&5/f3;ʙa"J\J7X +j`R 8 +Ջ?mxR#pdnd7dA&>2=n#;ZǰK1 + EБa$R5yvT |\9nl .ȮW <Y
ч4x 21GLo# r@Cl %˸2-lKJ;&-TG]U$ĠVh`q5ץj +@ڪ!I#C{]ivE>$`˧SڑCqK71 q)a ,xM/&}a @#sV2G`kHRHuqE49 ek8YZ:i$t=V8]4Nپ=V I,AA%IfIМ<4!T S(<HO6@Zbй+a>T@ء#(8gE#4qV}`WI
]dX9>A402 Ҍê!R-R. +QV/ +HWnF+z D4^`;ܻHfAIāDr,ʎG|Գ%_E`nNUe3|}1Kbe6I$ufKl%=]jYvjqmM伽NgE:.0'i 06hWf ^q,v! 9 tǎ-b ˄&S]+ JqDT=aC4+bg/%n:6ƴg .չIOi')"r3éxn|N ,fkΗc<屷 غo^Mߐ;sl'7 +[ +:Ln+ EC[oUȚ^ +l g!*;ƘE0# ŷ{ |QxOb ibK%9XK{\b([@C' ΅%~/m+=_mJk|/O'_7'j & +p
A&
y_G6{Ɋ{ߋ*DߕY +(G"o
3rv&PVVq:JCU;fv'9'~Ô FDv#w;8_U *5,Ii +v*9% >hmWq@Y" +\;HMJ'L[#o+,ٖ屓Av µaN32SJf㻆+ʅʓ + +ފRɔT L!IK% -Թ>LOI]^.jz@AXO?Oc}ky|94 )_yKM|
48ۗ &ȓs0Ckoܞ|L5HjIϘw҃bhetߴ9"T2l.4ȲiMVxə0O㕋#Y&,]˓ʕTkZ2xQI:
v&UPlв"q`2v(Ljh9SyHۮo^Zf/e `J"RA<)vQV|i] |ztӞ?Nˠs oYFj\v@O$^C 4 <7:Wn7}Wq]rc丩\PE "XK+YnJqݯ W$A k!93g(~ +eR4tS lfýaFPkEVe烃s^;=*W7Aiw<3X lpRȿ' SM=$^aOVZY`.:"oIl)-JJr$U?IZk:l әoyUKu{p ihn %C +VVnhr=zQEqqHjgް Jr=zzy3X-5ݴfʱ& +f9)k +V' +Ek 5Lq()yF.y;]]',H3Q,-Y5o]%V:edaAz 息%B$j@ +s_+oC9*j\&t# ++~`}G4 =D%GNlwʼ&}`-Xzgqج{*)2Dp1YZ:*@YE(c fF$oʈRy"KA_5nZ*sT8YAm10Ĩ0, CKj%` +HWKo8WH-%έziX(2mk[S~EdbXTYqR".L]6w$NQOݝNwi4M N +ulzai6 lbyAV vvXsǍV"F`JN_q% r +jIc"l\ m4dz4R:]4ήC@ Q-0R;8F JD%>/Nd4uB#mEQ0S*1IA'fxknık4%ٓ2 +|$B,299 ކϒ8ɗzY!JpZ/ \ ץߚrN*.
#d`G9˔0?A /-hsrLڃ@+B ? MW]4q +H`-"2
-{A[$YH_
jz*d'}xL +Yc\4f;70V!/ iF:9 0 J4DOVZ
6vOjzNh_VC)}O`>ci2Z7̪4;j0j/FaIK |[n@oyXì +9Iu=:1傍 X_Q 0RPrOσu:$j'ZS1\;9:qf% ,PJm3F@NEeT}3TZ c|hK>pCmY-RtXmZc`Rd&j~N 7JOd24f`4Jʦ$-x@ +ʡ|dYV\ঝe+U` t/o8H|ЉQA] Т _y+JZN3t:,y^Za8a@q,j +'zrLd);J@]CSe{1\ gn *8 EɴRYCG/`F?© qշ~34Aj8}$i=ӯ9ƒ8
GÊ;hHܥ{HJ]S]]*{E naovGS
!ؓ{p` ?itP,9Į nuіlw|8*8mZN= <Fd;& t[t-*&Ujs$ H) ߝ(n<HU qܮߧf@ +Z0;n]aC(P ukx4?̣1јјh2y +oHUv4^}gU웓1 7wfW̢y4m|y[;ye);AcBUox|t+hWx Q?7 F50d<TzOe$Nj!р{aH' +VyAE6ˎROD>oϓ %e/vN+vCR>}̽ `jP + xyeI
|}5*- ld xYSihE XRO8wڽ:0֊ӻ]0nM-O} YSwî"h~U}O?^Q
d_Q7sk-2Efak(ڳܛ>ly*}I&vvv/U /dlc6UFuO_r8h~ª_olp +#02vڃ)=U)!H?]z=%GtXƼ WW߮z
ӟ!` bBw?^xw}oҝ>oK:{ C"3~yuA_`:Ƞa|z~js\ $2\g?O
&|2 pM$ ď; }mW!#cCZ7H* x-)=&| &/`ɊB[J*&V"%%pBTAȤLT}ND14T)3X|%XiULy<jH]- Ǎ(lJPrY!cEd)pAW1aaB 4Zb + +%ruI٩>KP*g4( SRV*r.P& Y[t?T<R5 ]g>V3Y҈Ŋ +N~8PKhy&(,:Tr*쿞"&Z'] ^Qo^kuץP׀mS +oIk41JRp C,;а/frQ"gt&b(|-b;KȂ>3 +6\I.+D }Z{L &GU[Ez4Fy;R + ðU5? ()!Wj +qF g6Q)l$ r1x ?\Zտ`TP +z/OEmUΔн,o\yn\}W4%-^LKJc{2PU*V"~u\-t ^4i
HTRo8J dltZ
|)D(5HGg}"ڣr_<"t +Rst'c JB1˼O+`2W5k_D^3$H!vFH +HWKϯ#X4oX|
ْP2fvN# ) Pw}u"MLL?K(MimT5w8c[VFqjn~>yTaL~q&q6Q4aI ̏Й@hM y:E]Gje -0pSEU01U%9ܔQ 4J7cFl']I
rBQߚtYhOJr+^5i9.kH W[O@LrbܽV {W4[i,妗3&$ۥ0PuP21+U`\sfқrç[3L3v8mDޚ%jɰ2G0zlz,x^}DE0d,=yʨ +b$@f c +G5fkiR^$KYmڊu +yzr+ W6|CoA\v>$?hbתu^&cEoܩ
vupMg|XG S(o*U^1{'z:tȉP>5 XA~ 'b (FF4N1ֻ0LF@V܊+<xfv*})HiqV~ik% "4յ%8)TDJ\ #Q8oF :1Ϋem{uG<S}nG]knnaR-[<{( + +J H.% VBG)չŊg&uҘ\+R=JaY=R:CZ'$Є+C-<JgCID+K&~ZHaCE ڙ X#eRn.2ɻ + T8.`U˯`$U_,p^f G4;I)DO'= θvΈ-LNi<uP^FA d}-Voi`@ΐj A+hz0%0}ObHx5 mf g^Pׁ{# f)ǾuESW*dvT +M@\'|Z U pe91O$ ejeT4-!?i|+PCD%BBXQ2J[UGm'$/Y ["gÇ+ :VR' Y%g+ ~
LU:(UJ躨:Y| π5ж+Uɼ3@6u<[#lQkJa$ìSf5:HׄpC,ʗx&Հ(E +?6f~`/9̯wa[謈xlҠF:uăP @RB6 + DBMTo:#أSi6`F z@0nDsnEB#;'$36oeAh0"!f0' jCs IXLÈX²H2"qL #eP)i@nP]6I$STOPQtO'?Hp* UD[9?as61g,5!BFZֶ>ف@'KPk`n0èS ١6qdne'"rOcP% +E (y9u'HqgD}T4Yf恏͆CYejZy1ɘs>gOCp +ZԒ A~<Ri2x1= +D2;W^h0j^U#&wE^;vb `poGHig )vf~;$3أEO0,K*>7HYPbPsD
P+sx'˂Mqs|Vw+{wE¬ H8ͫ:V~9| L;{h;]s::AFRiH9 /X
9 +HWn+zI#^6NF
"7hHEߧ [@z2yGqV&ˢy<f{8y\ sZk29]xC:rK3,ʃ&Q}6J1due( 氌,l-( C**p=添bxe`4-'%9Xz9ąm S5L{"PtfUn`w &?rt :3"3ݏ69<D [''T牞KsJ"3R('3eǴsOL(gO<'M Nf(WGFh1}aмOE1dB*vbuc[VA` ڌMrmB3؛4a<$42 x2:9ɾvN4<uW+ep؉JaxyVVˊ}grglY3?M ܟLߦ0@T7UMl6s*"lH
5{G dTKKřvxmz `J\H diliԭWWrzM ` {N .h6 $CN> C[Q"I:YX s}-ӈd.rz:u=0\l(,|bS1YghSYQpϼ+FeIAE!ga`YS@ϔ;uIQ! -NaNF
:D5pM&e~dfKJ̦wɒ v;u3;z /:vu T%tW:RAh&ֺ- +=\;=C +D#/};3 -.>W)ғ4Y"@!5QA䠘P:y.Y MnmH(X[6`|{LwNuB +}ز;q7kj&(a9jw +-@c;2ʫ1APeM!&L] fz|?lz >Y0,`P)MrF;fd]/jLz {1O8K|j|ow!6l F[Q*#4V>GR
HgJ268Z EDZRGl {k ;4QR/`éV/M;e=QV[2Ƒ6^Dѐ\ mAH:e IR\`vNh $B7z-5@ȭE 5ߎ> +`{6PuyZf0;A29Uu'~9L:{
n87X i0]1m& : <ZEZ4Z gٹܯ3mK J(J 8zd]-Jݦ40x p4nЖ2X0AXxR"n +i@!ia./x18'EfJ'^ ~k]Qnfi>82OIO+F%-xorXbR|Jy_?t4a_2id~1,Z -ެYUImM(+f=i[Tbk%'LJO''i <qf-vfpÊ)T2+`;[Y~:Ѫ^$-ļ@Zf-E]ҥHY+\+bm@ +QYK0ӛn?Q<vnPi SxKľuHa3lbkwىJg'V7{3|E+]tiяGTmut|zi++:%ؾZ GX)OWf{,|qRoz| i*yp]ggw]XZeaC*!O-ĥUEd^;*I 5 x{)p)fKV)2/ )X)&W)q*f&d9hFOt:Ӳ0!eaƣ9UڜPlZs)D8ΣN\s0?J}EqE03s6VGH )|_!]#+qXr $ڍٮrUσaake?*&'ӷNNrzZW3Ewhƍ7mqS0E(Է0F0F&V؋VNL
/6wMﹶ8M'ڽI eҐ} ng{]h/54ekwMhLVeާm韩n $df"q9۞^4n30f$?`HlBi&6C_:壍%ˆnjGOVͺon \^wD&KzAş +oBmWť V| +evhHG鐌_ԭ'HW2|ƌHB?tM{d)oV.t`aĆ(s&Q":ňiQ:(a ++#uh'
Ge> +;s/#-
2 7/KZm+zt +HWr6+$35C< t8I:L+xdJ (E">νRjjj+\[K&i ++T0 8<x/j!)H4E'? ZR/ND4[AE4ۤO"hvP]C~ɮŧE$]:, ʏHDiE9V_RiJԝY-wǸ8~ h[f;DXCaO{qz'X,״SVġv#7>
f;6o*MVa[\߰ I euc, =.K +bhn쵩؈SEy Fޤv+X]=T4- ?
_|NZDj?TiL]ӄkhLZUxT* V v B.hKNAhi&|m[j--Ar %=QiqWJހ)k >COoHQIroκ|h
n)ħCEo%}Zm\; &Rnۑ*aK/qy@ӻ!1y!}1}mN +e{0[WͺG^ gPuGy廙G<S}}ys=nT "h +kc0| BPPg h@ "K}!v>gtۣ0qBY7V +} @pGo&E
!pFD{) F5{yBb8isšTFfqFdc ꁏ̑ɫ>" Wk$L" 8W!Qx?H& ǐLtT9Zi0ƙ,-_XуBC/(6LUm3d#d6,ά]ih `kg^buqgSO1vŨ'eG.Q ~Ͻw9hrZLdCu[~κA:I%$3/9aM43Yd9/#%zF.bTR
xeAQ {q/uG20 18~F+g^F̏+̋.绠E7sq_`h:Č<?>XZaи,ӹϓ[j Kl$Fg#:|fFg\-M9ap렦eC vȐtD' HA<aJG!}C*>Z8k#;' Rǯ +?n\*ҷ +HW[o E~_Q3W=Ƙ*h!9m0{sv'*rS~+僟rnvy0-Ӵ[eI]\NNڨa^ZD .6omfݙn Co[M{x5.~:l>wWo)gϊע\yUJT{lnvvO6? BC. C(#ys-(Gq y~o]f߸])f7.|6w eM m|7۟,h84|$1isW6WwD*|f\u|_گ;錿Yu#WC.*u2WU-^L9GҴfSCz{5~h:N#?#W( o(@ߏq>!푒oJT\ +tS 8pn^_EGIRޜ=>p>ZWDŤ]Z +zVY_IyhH ߿R[}Oʩ_qwF}zt@1I;VXfv1vYDpn6I>'>Fydps^9E >"[(`FY#"t6 g@D&H>"G[ǟ+< csl6N1SyXM&@Jp0%.(E4 JJ#gl!NwɷSNוC!! :㊬9ki0NKvr{ &DgF6AQZh܌)/pf-mѷ2.f}E,NYlJVXZ |=6tF'Z7if%kGyf{3gTXt$Ӂ. j+I%
TBGm4S͐ pD"LDxAFA Y]O=BF @S9SvGSzj;;ȡAk# +ƈS"`N\!spsq Q"1122gͰ^"VB\xXYjђp>it֦ GU # :X5FY9Md!ad2;H|D]FhQ rAxԟƊF74nF>>meV9qYɢBn1c1DƮӆH)7#HٙL f-vz~{nCD-;K&> tu=z!"ȱȾ:\vKE.c'^"]:$% (cծ>n\t9$l >t(T%.lCb^JNhxL%# I/NkyIxN!!CXW<ɩʃ}{A"/ +Nky>CMuy\W8{ħ +`|~²YaYE^rc' >BX> ]ݲdY' >X:so xg3=ukDƜ<_pLao\X ̢Q 39K@IׁK e43Z^v P +c9<DZc,z$5dcH]#Ѵ- Al.C%J'Ζzv_68Nb^m7 GTr4Dz-%ђdlȼ7JoqD菣6(b7M5GƏV-z6$Ќ.Wֿ$ƊvvU*#6Գ$:;
Y xZF$oU:։㤥N'{vR/l}$!+44QL\z;ʖi8'c]*M]
#^ЈRi +ᅦTn4|JuYIC|RePz}=nq !vKߩ_^ GEM.r1/?ӇBƋt/w@D9e[&El.S|cU|İ"EZ|J4bǵiuv*i- Y.}NCqeX m&r<!`,RAʄT￩T2@P-xxU~1VΗ9A\M92e + ü1\yA";2 +w͍`m"MRGM" +HWMo ϯ +PxQ]Y\* YlAA\_ !'p#\U1l4M RQI !8"tæ!H^KW6X f1) +taK8VGz1 +UÈRNmjkX˘6^a5.K,ک! h.zc8Vuw9{ujfSA{wws 05ѿ\xڏG5yˡa9,ޣN@$Fh&R% 3B&&dlBPp_X kt
X +x<s 4!E " 9fEI /b+bx3h P|j +Ʀ!c6E$s]hDb+a7rcKʹغ!T^rx 3m69jfis ~A7:MFNb.붂 6*ZʝeEԆ"06^T'5z"}qE|?~z~h KWZ wǫϷ7ꯧ >z{ʫ;>Ho +ChBM?x #^}SK
#g?x" |ּ@pc~"zc6X$9U)T #) ͜\Ēі*u6u*2wlV M U +FPh[fA;99jZ$cS28Cݬ3.D VX VĜ b3iI`#G`칇S\LX `ZDw')D.+#]h+V|V *(&H:C*b)a3dL2UcdcfW2&| +2y {Qun(KS6 +t&` +HWn GWԱ)˹/GѲ@I@B[)"rbSs~"23(qRitO;/.Z9E{(\HƐn_.v ].̒w6 L?v3~b"b>6n +^ݗ{v]n/Qb |ei>.q0 +31z z/]N~^ zҸ9 UXbmHKJG>L5mbɳ>}1 785N?|e& -㞡y,ͳQyI@pw8; <@*ɳE[Bt,"sXLgXXFG%Y8d>[,!$ɼAr # y 2N! !{> f2 +ie +pDeijT +"넅cTiG1bZ<FB#zC n}Hm-?q^I +YeD3 j6=dNlQh}"1[Qu&_R| |hNȜ:Lߦ_y}郲*bP^@0` +]u,4vEg~{SVTWXzʢ1:L@<bt-±%YD0c +gԴ#9w% : y@ZgPV# qf}R +U&"Ze,l=mSh1;^!$C]rAz8flvBœdAXAl(/ReM~܅ϣke4 ̳P;x: +OtxjBE [W} A2!a%8 S[E3ru nm2bh L{|^C'=ܽ!mbp>MG.#s0m]wlE4NJH + +MɈ[A "^eGL{#$ɩշIz}#D捰H}mT) Z"ÔY ,^"j9lV6BCX= z 9 +&#c3
s
h.*ө4'BӸ_[P^E!#
=qx*"W'Fkeo0512}vao0m]K ǀʓ7=Se_pz0?|~,d;v>R mLR*7,' LZ>[لܕd?fؿV!et] %BO|?=&Lc6 `RJ<<#DcXPZ*tCa4Qei Zji~8݈ȉ5:0V< l&G0jRTl&OȰSdx VІVZ}hoZcjZ6:P4k
ʈ 0V# '. A=T7VaY !UF ]\iCEc*.d;
;JӐH;cLB\(&ȡB!*ԙj7".Ca(_bBbvndko䑚@<yÇJ+SE*Y^R%f$ETuu:-編 p\nW`E e Wq~?Yq9 eu +aޯإ`k` RL/h +HWKo GȀ:]画f` AG0aY !~?^nv[3ߐ Y,ENcήΗYūgsVW/e^Oӻë/}wgw9s:( ?9 ԙ6Ɵ?~~zVW '?E{9Sƭc~y}wv dz<spOL/va ڷ#zz_g?={39,pޫsu[N^N ^4!L*.avZٸ̈yiAL M&Zyq*</$>S_ +/B Sջ?aK>t̳ mAlP:3\~ $K@9vP 4{9&Ar + w 7&9ޜ(h5idZ +-G ܘJza"Qhu&dֶt^?hD6W3u&dֶؾ`2Z` bq zDDYU-(j;ugאVMk\uE ~{ඳ8 F"*3Z-w0ǻ Z~02M]*!HUl;W>A7ʂ@-ꄅ +E|Aӑ ȗ 4IEɃX+w<K$-fkeIdhmGʕs4lW4ĴIȖ]ٲHSiYAJ2qH&p"QZ?곲oި(Uz{
lTO >3D*BAV+z4+cz!yqd魝@0&8\OYk 1Sj +!mj&.*+iS22t_!%.+8y,V2 GOh59a/R7Jv)0^r%pFZιFjk̓ N`*6Di&chFsY4TFG}"SIsUzCEh[.:ReR^Svj1 ->ߙ.˞ |k82[l^FH,[k2lƣ]b;>Rv1F^p&|B6.a )ƌ<rEOa%FoR6dK V ]^nעCy nT:#V\ѿҎl潧4vj n͉}i\%|ˢA /ύּ
̅/jOL%O&@s*4<Rei W4^,/W ^S:@Y%LJuX Bϯreq0B%@K&IMs:ѭ7Dv1d~*
0HÂqӺrPIFChv +8lf 5%zyjJ8#V7eHR,erUa$ +2oY!36O# #Z`TBZH +") A*;2
<%H*RE#
!g,=2 F&bZ:~uAW~guY}Qݖ7rbWL[{ct^{
gͦNk{vT~ɣ/ih4I{َi56aO0mY<3kȰ*Ӓ$SEvم6 UxaO0maDxdkziI{Cv:tO ݍd<8`EXEؐQ|(a|B"<&+5dkMӒ$֞@뫈*7ZLq5úhta$?.Uke=foc AV[q"m j*c +ʣ3Yy
y2]F M0m,NNݐ*yhTLQ˭Rk/UDK{]FL[{2=Qij!#=V'*"Vt 9RtVƪce5D Cin|R"<z., #`6=qg!^;=T nk6~	.O,j&n ?\_ԥ:nbY> ]߫/4z +e;]k]9.,Fi~K_lvE|c +(`S[tNLLôCn! ʡ/7#k~j T,d ̓k ŗW6}6@Zr\1Ye6)V2 y`*J5WbVe0 r]<uc2k[hۑj{#|4Q|
BdRw7g+Ǹ@6e䲁--@P;[`X ;+.3kղ&j5FUel]B"pJӢAe+)ҵz+Cfc147@*bbģ4d*x`$2Q8bTD<ZICvUe +!XyJBj]2H tOe( Rxcdm\HzU}{ 6.e2 MF ԭkYxS<d6(ţ8jhծ0 |EN%JE ^[!Q1JR<V
fuu/^/d S@CdZ +fUfrH*"b[[U Sn%K*G8>#'3PRhs*YU^j :t@R(ik=gCv/a=&8&4
e a]<A%TWx`LZ` @ +HVnF+8y?rl.K` hX" v6_yXRMvTWWwŜw)1k{ba%n^Jٰ^qmÝepoW3R+5EIˆw~':O|':{ǟ-?Om]5g!ꊓ j\ Oտ{`><TcS}a!?JذJm0x5n^ƽ؝aꬖS۹eqZP| 8q]4KC<Ϩ'\㍒iPԗ7M_)WIyn)Oo'~ J:^zk +@CH@fޗu3,= L 9 &.r#?-IIa<W +Wɖu@kHZś
f;ת ɹΐYwEV˧xj
"$= + +_=!}z>iQVMy2-}2c%şFnK*E^6M $K̛=z"]kpߡ}c,;gGF$ !ʰ jP4e"6oF VRH{,J}<s"*[?].8'$Z_Py
s>U|&2bv4 1A$tENY(GzܓIKMǍNm.K_`b3=@i1Ct_% OL tT ?. +N[6,8YQtAq
tPZوSLElF/]-QM`lb(~`殪ZZwjL4JzРu2 z.DzvVەr
݂ +HWr}߯G 1s<"+]#A2] t_/!TvvR/+> +
n&ȹd!vK3fF`2cXW 8Qqa'U;Ssv\ q
(6I+7ur~ŇCR.~~n![z;7OֲO iK/׃`GZܠGj #u>"D晑n$ξwX_3;g~pd h=v1@ݰA +KD l[h=T%RRZ{ Z#t!Uh7ʞ&- 03 ,pߓD$F a,w-JSeDj 3vEok;2hLU&ZLʏډ B^"S"qMAnXq'LQLFNT"M/+ r8&lU2$CQG,u.#|~/:$촔qO6ޔ nZΛg_ t~m`0ƌ4wcOvHMHD}1-{Zj, {%r&ޅjL ]W : + +/@6W D%DH!H?*2vx ~ | qPGP?*cgxqq32 ~I
"}6d"?*o-]R$.pGP_BUXcא4fh-#F9k8fBLAǏ +0 -iE OT,o"QlJ<(4f-Y3k 'T%&A$. + bsr f(SNrm"pIe@QA+,;H1Kyj[m(#Wfbҫ(INQtGӫ@)H=SPBhb-Rx/^L +VcRr4J
H MUgv%{P\tW>p;!}}l1?
;C&*O짹4R8
TL#ճp&QKݔ} +,den?."RcSpg"v=s)̇i/TbfNCye}[dW0%L'JC $):)| +wQ4G}(#6G1)547i5IFG@Au)lE1 p([N]Jӗ|AÛa8͵o_/!1$cWXu\_~Aߝm0!
Jr|lZ66ؔJ\VI +LXb2)З<jzIz8Rs"u?A)ˈ5 +2eA1Aa6fa ;DA4ax\2#gQZÐ4F>0V 9Wl>01 G
/M9R8gTRÌI:T@f+K=7m<0qeqy~H1W18iîwO8>l`cQjݼb}έ 0 +HWr#
}G21[}<V+Rr]EIĭ-?s!9 ZsA4pp |RseSnR:nanZ8p}ё!zx.. ?y]z륕i! \b yiBevo`[YZ-`[e gj +/\VA|)ߖ$Bۇo|-/KQ~- _z2 һ֧+ӇN#6hEN,I2w0.^'ٷWF|~뜉 +iN5nv̶BS6"w@`]]C,cC_CeЀn҄d +,Ohk=sxl3ߙ8R1Sĝ2 -K_ m uS)*+* H^߾6TX+Z[ zpGSӺ?7 + []>^IdN оwFy.& +$e܅rEjP\ +I Κ57뻇#"t ׆^l.V5 rxjR|j&G +Ff,FɦD(w}` +[|) ߜl.$lN}Q+Q ̽j +1٩o?bzFV(XgJKT/Ƅ`f}?{W +HWrGWrBwc LBDb_Ϲ,(33} ow0n:\;p=t0߇mvuy=у9a"߳ L1 :=ȑk6i0ͳmlsv>_L
~IY~[lO>7 j2 E|wDǠ'xbE >ğd*uq擩 L~/n{<w]v[̎ؒf96 kRl>t& !b}>n=/'D)}7L˻NplNJfaם~XU``ۇd% =HVz(B) +w}V%xbk"Ѯ(KNG+<Q%f yiQ](Z$*ZWCZQH 4*##Q")ThU]X7hn-G A w1%Dh]2 +w ^KZ6 E{|QƔnD¿Fxe#r판[", Zuwݟ3;Uz X pY:~ 4I Sj"*;
ob{Hk5ք;I'T*zZ9 F#6 } +n<Ljr(wFF %)ȂmPbҁyFmWiXr&,}8C: EWS Q vڰ
ίprZUxR^>E: )N loOP<}g +V!p&(D3D iy&fni%U~QY BF<\=Gi
өM#s4 ?#GSLA
Z} pO+aY9hc}~ 5hEs$ FN0-+f4/ X(0I kK4FdEa٘ɮ_r7 ì$?sMH +܀ 7yB:5
Ciמ8&ScGa`J a ?G!upZYp!l@Մ l +wxRa[OR5 #)UCXGҴMLWk=%TA
kgNũVmPA*!];DTGM:fуj2red(]<#l`1ƂlZ߰\-ipP %1W$AEu 0 +HWn 7}nMx}-;p 6 +B0t$z8@kf]Cdgk"Rq
U<!s]Cd>5R\CdUn4ge >MH<!T0DRB ! +Ϊx< ~4Ҫwo6r^7z8(4?qō.ښ1j$P$
pD@cs gtcbQ6% WR3RmlMԫp/B )e0[ƁR10Pe]lp38l5 Uf|s& 6ah338; ߚJurۧLx* -'= Ǽ>' ÿ@u~|'4d$qVB5>[tl,5J2#8*!653c;9{{;m1i̦( +ēQ b6n{SJ\ ik~Xhvcր ;8k-=uT{bt%cFKfS8 (R_ݹ
8 W}}2yvP=DH ߆O8Cz-\'f Q9W
O 0GZ3bt ^-nW,O(<y'ptMf|0r/f&opbo2ēnt^OzܫlQuTG/B::xot w&O3-]o&sVOjzꤎ$VLăDb7\6.HIy;b_ݦAckdk
i,9)m"ۜ`'aí9]2x웃^UxKM$<OPEI
^oI8ɫUҧli|+ (x '&0s3g9T>[gZ$͓#J#&RD 6}G=c`ʞ6KE-hhk6"Dڈ"tRH'FrZ%Z?UԪJI7G@(.Zo+6"=Po˽Fc8Bv DIKfV +IKfUdHZ2d:lf˽qlqtjYfZ Дtە)Y[8}U-,)k@2%k"6`^& oɔ5Ir .^Τ o0P G$/aFxU 1}sυt +C +O}Jeن3X4.+U xvA1gM=x) v)e~xqÓ/\6.Gfs;aΉk$R z]Kܼ$bzm"" !L fH{= "4&7"~֑ϛYЃ#HOZi:-I봗o9u +0ʹ.Le`mh," +J(k=( n&@(
Ni6ZHjU1{1|DDD4(?c"J'i6f&(M#g*q@xŢ-rf#IZlt\\]sFʹ335yGk*6aS!פl$^#̑G"㊆J;~KICl Vl$ (?\V]Õ4 hqIʉEd ch? ! WqUYu $ D'MsLؘ6Y/`tʃNX+M +'&/c-MḷT̖?K@gٙ{TrjKd~Yd" 0 +HWMo 7q&Cu-9,jFJ$;F2VR`)}_$Ȇ!LzzU 6&n;%QN KI %2kn?Nfke?R_nLFj||axVi'{e48v-T#~[|qylK{G^ vq[5q@g>ݏnas{". odpJr"I`fx?hVPqRpJ4~'% +vcS DSI2d&V&5I&JOfMRl2ڴ&V{P֯I(5Ir +Y&VHz3ÇqVK'ieB *c7^Rukҙ<Nb65K͇(K;is8sXqɋ.ZiI }'q +E7+F
:-S"Aa˺D)D$e9,P$1{hVU'ڋcuD6nqF/mDxbĪr C/ ؍%ժ'{ ^$lb)YoQ jÛLKb> +b/\Q;іl#^:5+NH ?duL7p `5TrHtd H*ae4" +' 8OkWFAor6ɨ7HDdJ q
A_}|h&!nǜ7͏H ]b3;3W4/j+h 9QҸry=($FS\ +ttǛ#C > +k]a ^!0H7/1/Ko@IRs·cdz \:cQoK}3ߤJL
+MJ!CMd:i"m*~\˕R$, c-3D]܆/X[ނ<uk`4¬e[Tc
K϶O0\o:R EߥS8ڳf $s/p5l@ؐw%u{Y J^p34τK$<
ځGNs rJ؎ Mf/9d1vg{R# $E$Qu@r$A)Dթsrk8ɋ{y6I<h
\ RudbLkdٝNL{ + }) Y}Vi.ەk[^7ڵr ?5b412#_^W. H[ry y& fʙ遟E`;Aɳ ;rT3~. +,MEayZc <湀4}n0:R|1d\^Hm/ +^XQs'ǫkO~tBF!w̚*E5&X1Jڿ-^;?zB$L$ 6K?i4 &d#OIH#[7S !PDjK6 MFyl:(;ʒR"Ӕ\B&㓽NR n("$n"fX]=V&Ôxm7]`%rt)ڢVt*J9ƶ"SQZu#u<ye؈ ^8Z,aiހ:Mf$|ky/|s@k +d-#^а4< +/
u3"ra :K\3dM%Khf3XQv$ y<1I20R 魲$ :g843N" @<5+Ƿg~ G,?b\ c\unYL1' +dY4[ale`a3 egV` Yd deiC1 Y "̶
656تNbf&y +SAZd<*Y} Y-;KXY50PynCDSU~ՠ]ӏ%åksN)Y!qMq̥$rYvVi,5B-/8s6Iy5 +[0lJ:~=L1DQA1:@D#<t))KF!wLND qH/J+"o: lnXqϝ`qt +HWYoSG~b ̾<fEPR" \ cx_wfcn {9:˅M-փ` Baf5R2繴`X\ Dor3j &L/q¦RqwWɕaPa\ i IU6]dKv3Id9I<l[y=-2ICMgϑ+&OMtuξOg-3d, 3I\. 9E˝d&Lp< >/y?o̰`wɋb \ !>pW%"q [i!KkSƣ^C&XA +D7j@0 +T=6ʐ""+*MACfVȔ5H4rUU#Ri(j-Ʉ c`OOM 7G CB*W)hdD'2^VM
H Fh q..vh YedOjxC*WFDpHZEj&=jFrDq%4qO$ P%#Wֆ Uh 2!4_9GI 8H+$)&Fo+@ QU$FUǵBS 2$9vLrTd&벋طÖ=m1Byc<)j4]&{ rP3~ѥgbv4=$4ryCuXcE|;\bv!my('S|o +j-STP
Iu'].a!|Ҡi1A# ex$?I]ȻئTL $B"4jUjv}&zTfKClheZ(cMׇ:CGzHEkTWؕ[FǪK⌃%x3V|FScbB vz~~9lJPÁ8F
/qIm 4?a䀳 e t@!?K^wIP٬Pj+
m~ &A ?yz2hE:w&\&.c}]i̷ǻG )&eVGE*K ~Wro+`A[쭚ھ҄NS ACFInL 몶dCƮ
x}*&QhtZ&F#1k$- +3ʅsrq3oPZƩ@7tU*߾pqWƑ\A&g tbƠ:R-p@JnOȘC*mJM
۟DdM֑܆ Y$K/1ЈmO77עV$3xSe$:B`HvAikȷݵCjMzT'J6EՀ[2ÑhQ +RX<BEB+эVV"{Ѫ{[vиto,N -4[ҕ-jU%(`"eN̤}:^F5 +HWn]7}_GhI4 $@O\ +AEgQ[te%RErxst5:UZb1N?>~wu\ y]6ʷ_ud:D퍍ʐmS]YwWm룭5s ~Ruƫ/WG++ nVhg w/?ns@sy/WhpϻU-yWw>,hUABv;M~1U]CzΨgN}_,ԤXK fdEp-t)筎e=(MC͒~:U[&="]!XM> ] NKdWtXtH"< + pMtI%3+iH@f5jjұ(nl1|=K᙮~Gs1HԈ +]Ddͼw1p f&0 s@wL1LӎG7T助t"N7Hhnc21vy =Ric0 +Mu%S7NBoט +=IT}b)F*4o..t[j>g䍨ƥ"*5Sϸ#WaHi%E qލ= [IRB/zЋpr8+L--;OO_5Efšb!K S
`/Wi
;C{3Qb9^~VǗwW= zguTɢgZֺZX7 +-{VDzN:KZe4TDdɹI`E@t:IMVv%o&?Iф{N~?L|l+YA/ku=V{+
h^r l,X[q'ZcA` Zy`` (=uxVYJDVheʁ*c1j}==.ϻ3$zTܚS恋1C|%4i꼋1Cman1Ն1C1mRm
=lkb̐t̤ۊq:O;!aL+G;ٚ1CaD^hQ 4VS01Ol0<ʚyVc$a \]
&i)ݼc& c թu:`1s̶ 5v1fH#z,<`8Ҝj7d K~dUk*#c
YHc!mbtr#h fY֮'r"q$!vizaXEU@:TP{hũ)@
`0͎]̚CB Li2B b B ;7 (okFG zGU)t T@)صbMi|)SkIi%Cv;!am\X Uu8NmX
4Bf= 2(AcZEXkw -fB[tM-ݫgǧggg=[$Lk@ wwN.(>4 ^V +YT^eОZz\[ԡ;.EΉ8l5<눚Òa+w!@V OK"3 %W5X$RL"5K_;-[#97JqRϿ|l ] |&;<[&#$V\5U(Dr>8Z@,JNB,:h5NסUF1Y;0Cg:<|o Lf/)ڴbpH-.Ѕ%OmG4^\ ugwG7$uۊ*+U9W*i +"SڸWA * BaC(7AU@cXhtS4Z$Ta>ш""W|%HQ hηq?R<MbЉj
F,$DX[#0xuR IK/ܴ!"`hi;Ԣ$n]` +Ƣ{K<<M5?u|/ &RI*&}ʰ3`.ƈ}[D? 2u+9DG,ZkFyoHݼyd,El g1ҍ}d"K SǦDv?:bن]oj/>9{ufsݲyusȻ{Q2HsCI$q$̐0&Vziy4G`13 1e^zqotAbBUHoh,UX`q^-Q@WX rD9DJ +'{WL5P!dw% BN !#/E~ͮ!<GOo|Vo vySTo78÷ʻ٣道l} 6OIVgP-IgߚQ|_F4nmE[ -7'AllAKu}$OILaß ?|}Po~$$#ozcje +0 +HWnF}W4D.V N-(Cfau $QG[$؞zbwWuTuk\RvTh\e+52 #mT ?PZ l<2ӾFg.|. {\纄wӷ zw̑c 4kfyEkNŨ.j_{ClKl&-02bSV`52 + +6% sD٤EK[XpAjJp!Bv}wuˣʼnd94b8 JZ`ӠI"8jTZ^CL^./"py 6sY\z 0xO?^ށ"<s! h76i*WRڧK6l&.b +0,w͐1qLiO퍔w
\凞q>??\.9\P!R!TFg?> BI0 +Idk 1{2XKvµ pw8H/ͥ=Ϋ=B(g wo!,D/yT`.zɂV,3t!L 1]O&#o!ًYר`A G>\eyBME#+ m 44 ٞ3iԒF4U.Θmm/d% +>¢`A2'kݨ<TC54߱!"gY8r0W~b i5<88{GpZ=JҖ0;5m Ewcښ&x g/ + z +=3 O6W y~ Zq|Lh D + PQ:uS˾mdWWLdaw$+轡F=_AbO>vl 6 }\C;.R +ycPo-f_ӫ%ӨWL.paxu_?N9nxi7qC8V>( nlaD~uEnw<#odK@@"w@\̰!9%-#ϐtdT<<ʂgTmJ b!6>%v@וaGYm;K:>Vg;o3wN+`R0\P= ;r/,,3Q]t/Hv>$ٕ/I6%D-: +HWn+jIޏda ,!Z @nn{`*1ߛsVm3"g]4F](-$~XdA.LvR:#wzΔLu kgXu.4L۵c>jln Kas,vG'י@:B1% Y6uL5_Zf4M"T$ q?\l# +k~<ʑD~> +%)m ++0( +9) -8rTywB +C|J$& -ғHBOSATj7EDn2lllrs6? +HWKo6Q,*ߒ~H[ӃVm뵱l.ᐒ66-ГH~Ù"Ŭ0EIM!$+ Vݭ"B欬Wּk; +R
s BɽK@=U +>A +PⱧxbC<g/}T'X18 0# fmаaKz?ئi bEzXs*(,sK0 $)9T/Ҵ#ڐ + sn53ՖỸlj$[8ȶb߲0jnh|(yg{ܵ~}îgjnVX<m/?Fs4y{D|5 ~ࠩ :S*د|9߹))ۃ "d ikHE -{_aMZ?6aԞhD0xo1W8^.*t^`[pk ++ +?L''qۓ=gs?N^A%W\N PGh; +S5K-f[%B^>cb Q4aۡ=@/ ˬ&LíMmỴg ac2J@ $,DXXĀE2Я)=3)Jܫ +G{˕ֲL@x:g\cLvof(@# +f@o(H3̣X,O qts6:`d^oZ,Qmm(e3&6KQI43~/CjQ*tG3*alęK'bXr-8B#`^,5Pg4Ll=Y4+_ +HWn}WQ +5S
x -tݞMU(/$H`MUbIal9B _FH%曓Z'80)YUu!rsދ@_RP*?;(,y{W>q{=餩8H72#%
rCJ1벩,VRŧJ"?+SB|O R2oyG߾\p<B1`w䎑'\_(y9C,D13^0FT⏖8)f5ŞӔ?}^C+H݃g.0FS +o,Z bjjFPVtձÐ,Xl)qk(!SI)7Cr=3Uk1*ˬWd~Y9 [Iv Z~+ZKHoB9 zнqIlWu ) )'qrMPy(SĜ"Ưu hՇ흰pC|Ċ >\RB +t -ć6NmK[Xw/=' !(Ui,i'[ߥX+||uLxH۷x1K9a2nnX)KK$2
1A㞟Ѷ>P ' dz
G-U" {>~ ]73" vl@aBݍٛ+wqA,/z(1;&[V:`(ߠ7\ -y܂Wy@F2~{w~v$D\DFPΊE}--@O6P(ij`{gT2 t f[-_N}q.Qur.ck#3PZbr1&V?S/xwz;:֫ "%
J_cO6^% +^ELٳ-6e2gP).WxZTH돲Q H4P"gu=̆anϪJcȀUc5̒$(nҝ|,(` LSij0M
)1B
~Tv 6`B|w-k E&c y<0@@>sA+PC.OZKi_cQ3Z?sndәVUsB{pqPc 59;q +Bz(M$/i.~˅UᅮBk<oa,%tXԏ&6"}ˍ >G.>XKlǂc%ԮWKluki -R^Ž8#tR +Y f8;F)pNws;9f8x'8gt;9gt3ӝ0y w3{W%\(Ljrˤsh&ک&ʄ
#Nj +(:p` vV3pLuY t3 nNu9 NpF79ݜrѝncf8tsNpFw39'8#<9az&8s? n(3kP;WOUS{u3-ʡ>C탌3VN'mŬv l͂Jkԧ\ekJV9J[5 0&/ ̂V6i;D!Is(D
P/Ѹ +dM?=j٢ +0 +HWIsWL27;ΤD\ 4zE<ԈJQ^R: +Rg{ea9 P5^ZMڮ'ךɃ"S f_ |Zvngz$+q< Iy馭{^'瓁BcL%j{<1' `R8 b1N YZk]BݓA[^w^0!ػy8;q-x/Mċ ͣ_zI̞7GR!p jw S~h|ښ* NRڇnr< +dkѷiHg+%0+v1*#P##xZt@9Rg=N^maEZ)27/(ԩ~#ܛ!_#@ّSt8:]%^z2B ;.-fUUopw 2e`&_g0:/F4
-je#)_*ūȂc0'c7EbXd A!U+{`r%m'QQ +$d6$IỡΔF t
xO"-( +!,YK6Uz.`I rx g Aҩ:}#ɒS !b2 +- "@ TZ6B(xM2=t$Ə(S8hw 8!͆ O0![IZgT yD.eA=┫T'F(GSs{ә pgG*f݉}<+6DD24 k|`xZT> zR/B +'\QF狣'⦔c Z*쟡qw;@rBW^VmJ( +$MfZ8ʉߞCMtg/k@<(K*wΈUŏRܞC-WBI> 8XXR<. +xk{ I wY_Jd) 8w\8ao{iSx;Isρ.drW"7m)8br
+G:ұw( 5,廅Hawd [i 46n汸 9&G&үg"m7>rKm=
Vj #JCKs pB5"?7g~Rfvd9GTHҁd|LC+_ MR iQ}!Z.rQbE_,4 Գe,L)axp$5אO)ω7 =KR-yhFs߭a 38ދYXd BRjHS:P kMxQCДigDiMAa_0/ٲiy}Ni +ZRyjI/ASrzNTώW"p?ƫds "ԵtunE)dLjB $1n4AHa_.Ut;K 9h[Ԙi80c9뭴JLxĻg&u"+lܱ =Hsw ěW)s8cN/MZLQS4|{(q*uj4&IZI +K* ĻooBؗऐpjzBt$S! + S{se93> lԹFo{dm{!sSuH+CcARbt'zXtX_ Ď_[
i8!&0;o |=9r5]P 8\42@9b+Ш Ѓ +t3,ZA;]Jvԭ~#
u椹`Ԑ"ָƦjqfHU" 1B0fQ5 GҟkK^_|'5QepOGg +/e5pkJ
oo2( y& >wE8mE:ݷ⌚T"f2{cΒvį0'C[&3k%lf9 ^&=㴰6e>ͣ,#Ȼ"4]TE)@Ks,w2y*]J-~
H+Ϲf*hWes={/KjUtUkAs#'lƐ;湯sZ_v^)ʙZXT7[=/Gl=Ϡ۳W"| qbbA ɫ_oA$ fbܢ%?]'* p> JTR~#>{3Tyf&ZuN5L/~\Φyݓ]Bq c q@XKM=MҸOhfmJZ39 EeiƋrlgR!YzirZnnLF8@0P ߨ̨8vy$ 0rqFՠv2 DQRKo %~lSPU|K"k,V춣
H#mEӛ5闉57:Q'A$ބ +ĢY6K zm$E.;m(o2tv+s^4SYv,u`, *lg9CYv,Ev_&5GF-
2And_=f%dJo|SNA&y4%8ּ̠ p锟 PWc{UO.{(g.b1F|J))s4 pCzaPTYEGB/ +6 g/.$#SsQa&>5z,^qb6IeӰr%ڮ..F;~%Le`M(7 ,o?_ J\-
T+r6ǫYS(P -QԪ2PB8=%>lzy7MbM ̈p8q4qȾȦЁWl˥tq\L ^bbJDŽPPeQdSL koBL@;qbLgKjZWYl Ŗ0\X*R/s6l-Sh-y-M&Bس8Ic[/^/牭*Z^7SR&X[{ ƛ.^ %ETX*VqncKCg+LIF-fm3:ܑQV +2h +[2Ъs* dx*pHdPy\Wh@&J<DE[ucbt$ g>j1UwJj٧oWl]"{W@&R}ي/' J ~KXҪ)pV @VKdBأ%jG.N +# %D!2|u}2-!,1 .W']JOvLJ] +H)C +$DrJN\y%ZZL' +HWn 7}Wc=nޚެ؉p䅬F Cel)P5 9Un3Mab]OUԮo1 Ϻ\Ecfu:if]|+?M?KUڙoWM;Ͼ9ֺYƌ݊SƇMg^6s]6Mw8WzUv4>VbtBÓƸA6ShaF,Ng~}'S=S"vm sׅr? 9/ x|t㶁c<wx<.V/OUQ=ghjmg Z:?c0DZZ{rdi~砤zyKzvu, *YvSwr<YsYVW97""$16{r +ƴc '/*\@&/5NzTټ,6Qn r9$s6>nLsk* uxÚ!uCqfCW1]ql!:ABAʲَ!Q%!x3z')[%/ٵϫ81L2 Pyh&#RXMJf"hfciDM鳬z6J Rc ʊ/SI>zAY|_1W sDnb]H;-. Mk)QcGmrg֎G=GSׄtAb5w(k|Z߄l J{ |_coLNmrmt^e*#@4t>% ;V V剄_T= MEN:=ڠ#+ kRqʲ`_ #Ey(Pҏ$\+ߩ'DގTwB!)ʄB~#54M,'>=G؝7M@+J̼_˗Lqr+էeQ?Jہ uvm7iMlȥotqVBil8iRqޜP%F |=J oY pPB>]#-hJ ,ƾScdǦ#OW>91Kk$\zN Wgx7WfF/O#X_c<Cj4 9~
f$}W"x~@&"uWK.8.ƈ(K)̺ehsN|]8di&+`5rX}g(79Ģ.1ZGеgOnಕLS;0`, imO MgՒo(g_,t$xNbD$)w0
x[[JӤ +^RJ3S?Gb'FSX`&^H2K;q}Agsݬ/``AЧfjk6f2* :Md0Ϲl31v9FsY&V i'8 ލUSwTxHv gӖFqgmۅ-wm2[!ll Ɗ+ +HW[o6~_GMQDR}Kpwfk/@Př,yq΅/iHs Uȋ2FSy k.Z(lc.6ˋ?֙U^DS[G/ LM_|?3rs} y6/yҀ"1STT1~֤_T
U]5˕uP3s}7.Wu^g%\I. Й
oy7~0{ PӜe2"
nj*373¬lnX[zˢr
Vɳ0yPf-! +$ 9fM) #t /|i<!̮4eJސm b^Kh?2N˹# ew+6swcFĴ;݉ K V*J7j^O$c^4q6Q0H\Ƀl&56훝MBy,G<~3(mof%zH%ҧ8a,A{cd +[a8l(τS9 Il*C;fC7s&mjN-\d\ݿ^ɎIu>GD*Pc&M8=s7=v0ʗwɰ=99Wmb0H'rnT:lش<Eup}Pk M꽁449G9k )Uj:I% VF])T LUN]AZ& +|\\/^lF&+̸${[⏃Qj*u 7gBSѬ=j||+QCC +ag@{t$: +qK;* G\$ . +1(T(-[ٛoK|54p+J"S+ix(\t*!`:{ MTTIayc& SYN]> +dd2 W&Y I?&Κqi
'9\.˨*4l(n[N xOoF>
us ctqd-&˃JM\(M9M\Ba@ e h WtCSUC֍j)x;=FK<4kQ#>~w(Q bdFKY 91 =1I}o/bu?ʫe7nJ=u%#{(PlE>zgHQ2ДHGXEd"bZ)&RZqyP](,"P/хOx-AU ԒcksDJm²9aTKN݉ԒOfX+3yGx.5F?P?KN4s`*r) +ŝ7w,|,q*( !u*T e@%Nۧ P7~^uItv@pylT2"ψS`.vj#+SspËh +HWKs6WL8xtdRWaMBTLjd <v)Eh4ae&ceSH? +Jk%$N]ZӰel?}7?D63S8Dz)ܹ[UqW9K֡H/*vS[t Y?E"9Be +qn|BhmSs/]i(K+ qL"P_^/q>yd5 =w-rؽ^nb%$(N3LbsC.=lQP7t^I+ȌU) ED
CGkbi6yIA*Uu3 * +?9x +yy, ]2 *% #ũydYln4T 27B"*0Xeww*D곶8-JJm7vju 1geft2vb
7QMSG5!(dQW/ڡ #C癬Op9tJ>R( 87X21vJɫt w|,Sgeȼ'?^#cr6QWa aЌìQ0HؕU +VB- \^(G6@QMgJs E3hYz~%bϒSL5/Ia%ª!Y0hfvһ?0{?A
O9+s< }$DIkI WBVB]\K + \ȅZ`ehzBВSךB67wxTv)\$d
-{3eg~UB$VR->#/iߌpugR ߉VA'tm Uv_)G`{A?wT2o3C7af=8O'el\g8So~(%Hﺔ& J4
Bݳ,sDUכ; 1G!ÁsҦxF:4N3,Ea1 XX$o@8a _.aG} <l?|
Ǿ3Mԟ$Sg"ZK6;6enbݩoMT%g78}Q# eyȎ16{f]#nhTw +@A2<dVTti &ͤgI:جƭ c-*JQ`GqW"epȽȒ`$@;P9-7A']k{ j ' 9O5xcr|SU]
Jec R/A|E.Hn+D;q 1^wLA|PJ=A@B09 wQ
(H5A4 *IJL3 ͆8kP( +% Z@,b<k-_tCU[ng +=٣|~hVpo)iբV3ف Ua2\@9뷱] +S0rj*r|
=;/i.dv *q1jaԞa Uj-G9K=qǭF˼ӟ"rk'qzYi} +K⢹v96Pۿ8Nr\w;5=0xa$RF宅a.-T,J`NS۳Z:^jB|YrwM>lW~E nR~ǝN믱[I٫|ӊHE, j~#de**bY<mhU: ,mz쨧M1$ *Kdi: i|q & {N7J)jine˶K+}ZZ̬!5H>"@ E #/q ȷ4? ꪫ q߫%|1q;vGu:Zh! M=K朔C [n˭0ARq +'k nej6^ ($)s+ bI
Okٿ%2 :Ckv+ISA86l#;!kAE8>VofɹOQz_9ɆyMNuѹۊh~TlQg9JTQXA/UV"p\)FڍKä\
KaY x
<(#inNMH$E/Ë.XT <oPc,rue
óU;> +"5 b],Zd${[?f⛬HC\4sn "ClWT˄ .(6&~U0S?`Tq !{d5ǥae_?> +%Bgqo: p9y2Q,5,Q.!IũT}KU_.Mt@}
ݧq.ƚ +Nhz?!+ +HWKsFWqe"c)ڵ[D@& @ۯAIxo.EuCey'sևE2ĔjYh[E?ƕ2l8Ta8gIPZ?,~oVoeWuTV+|mTNG:ZqߪU7)ZfqQeOQĩ^֟Tw*2qQ ückrҬd Qw \3il|̇ܦIv.S2ʀ%r[u Ot03g^Zؔ J_.9<fYַFR_A f'1bB@`0Nw23_H3|;oBEc35D#Q_8",s@h懶}$1mo?D&j1YwqDRX^ T +^Kzevث`1,wRQ4+M+ [TP4]#O +2K] +2 /ӁnCEBKJig?HObQLyW-m۩
q}LDcl/j/UUKg:Ӯ |1<mA{n?ؑ7M0*X)%ESՈMοܞ > g +EEY + _Sg |h zQX.g3@YA#bYM)[.\VX#A
C/1tC;1յHOVO2:R iKar%Spξi1y%L0GLruCPr 4yVL "CJgp>2}"XKGˏcIAm3^P#-ý\T&2\İ28!?gV{ \0ɘ)\BPPz u* ~1.f* f}dv60oyԡ iBCYyx=iya8
? 0ؿ<i@¼g P Q E^6\ w"CxvP$Fz9(ȦQsXX%E[.NΨ %GJ(YHи
jE7Q + "J+ThX +Y2mXse;Qsv73LaT WzOGdGDăaKUAJ2T՛ Prnj[?CfS2i'vu:l*āvUS@FPǁ?,웖7e5A& וL_}s> [)oLߢ.%dU/ W3f
^ʘ7< Nu; KNe +arRl1k hԋt!|\UqͫK#Mdp!C09d!Wlm0#V&@GV +e'm0+{XGۆ0l/uDj[&do呪k{Ϳ"RϬ,`d;3oоp4# 2#y8=;J}ݲ @n0^-qQI4.#I4>DȐڄ [+_hYE0|h@:A!Eig1~^,*U%0KP'\3tJ S ԯ'jϩjE +ډ~w<g4N WM\S'R-зK1y!PU;8@J' %dp-YKbkRe+lL4(.DMج 2e +K +&B0!,NxuKxIDohBJ9GD3xyu ̬x>h.DR! &Rwf<Bxf9a+<GS }ŞK`B8 +FI<cYh&fh(ejzۆa_ѱ$K>X!i ҋ[dH}N嘛AOEŰIw qG:
GUyp9 9S;aT|bR$dd%UWK +$7IY|H>U_運(~U_]*<l @2- zEi?c9?>QeΗ.G,r|"PfȖ ΓIT[OoV; GEX/"E[oa/ C]-Ŧr Ps\@Ƣq + ǖ=4JY1CZw=OB~ 깫'g>6aBJ.] _ap +;h[}6+{e4
=|ԛ3 +R:}6pZNfsO
2f˂JWSUJ)igȘQ`kPuT,IM: s[FRDHN4 0 +HWr[7 +$;sotdF]4N-ؒF p$qJhx{@HA{0ڋS3py3bJT̽JF~UQ>LXľ.P~ רn ɐ?
T '1>@ \t5WGЗ9CN.ąrrR7h@FZd]<1K$L!#+ + 7V
.dtLA#Dȟ̐*29u^O*(;X}-+M,2[<L'j{T )[K%& +38(z46i}x9c1-|^E$ +dY"ؿfi*|JTvY^(rx0Q^LC/ɉj48Nxg<nkjA"'|-8G%{6{3RqU
QaSByA +7kɹF.JqL(+("sz %5 +; +S4A +,xu+t],]9Hx/4:;;\Z<{Pl }HCht}.euكu:Ju+
9t#hEt:݇5OwA z
Ô˹A{*x XmW`Wfޯ `B,l;;h`}?P7 x$ +H|W[o~X@AU|tUQc'Ak E&utܗuE223;;;͌ɋ<2YeUl*6U ű]U+Q\ڨJ3$Q\ KQ4Ms>/l +}q2a WIT[ڙBP-^~zϫ~8I+fEUEE$Q͒bU %ޙ} lhGG mɽA2*t˓)Acц5ܤarI_3 rH:<9tجld1wt orfQ
`BG(+N!(KQ +: <5rxWz 5yřVx'AG9e W* gß< +c_% AtQ5Lh&FM!g%YS y"Nx"%1WF D ъK-@ ^Wv zle)!It7w0d/3N B8S0pT(-99 +롲 ^F +f&Oߌ +$
GqW/CnJ x +pɒ"T=%xwBd kfy$bf&SrXuZ_N(^|F®Q7~'֣,0ޞ5o +kón&a^v + @}#<Hņioٙ~ҾpHQy5,]X]G[Z7 #Û*$ZyO[VsCC<K@_lPtj0D*U02I?R/lA?C~^ !RDn9+*SpA3*-+ 65cb!20>XMY6sA(Nᇒ\֞rp(Ei*=Q< l%ߵ`G :#4bF7eׅԣ z x䰘Izw>/8ֵH?^i},ب\~F[Ҳ8Y Ƞ V +6 s?-J 7AsDm#{Ao s WxxSIArDek. 6aB٪i!15l1D~y 3a}RCZ=\& ;0*CݼrR6Gֿbr$_/F@ :֙Zy0A6Ǐa-M/Y3g3[`(B +nqC5Kà`3^NKE84x
3m>UDxD/E.]XAe WAl2p@O{w@|9J6 +E }3$>D O41P
@>6zz_Ď6^[4# jtlwiIIr vЇ̓DdCpmEF_̉$n ۫(MYC[9QU vqIJPWV=Jmg_zc?h5%g}|&dV@{=&^%d (%'nv'Co*{i ;Iw *cKu8",AG{.N_V=yM(l_!Hp|9 C^y9I|uFϨ)K3f!Mb7N 96Ll9WjNcҽ1jה5ՉLU8[e
bҸ'tn`?x +h xO/4SʼlF.lJLK8+-eET'vT+(AHe*
764 + 8:b685qqF/2Xݨ +fg{۠q9@?C_A(2ߺNb+9v"E7,z8%k5Ҡ ڝb);%6Cezc q݇v=uƓ>=Z[0ЏxatR4Rf2ߠcנ*\JJfFce届hiBKVw?.Czސ$Z\ K}AGpJ'|Sej&HqWPij}ǰ쇂,{}$CUR!<A<wk>;CNR=u}xl)dMP^(Vٞ#bאkPgDcMЉ< +!_ pJ}hN=_Ʋi3 ;"k *f2 $^1m%Lѝjà.4efi9" 1)!P vkĜ?!s_hѺ3*AP +GjT9O'XiPZͨa @(!sQ6b1I @4[ZQ$ +Oc? +t+WOk,IX7!d[6nt
"w@xXrsC*۽ےLЦRYdU4! +ɨp .DsSီڬ(-P Q\+zG4#Ԝa::c ZRʘ8ŻK1}%ִ̈́k﹠Z uQhJ"3;Dx؛ɘwCF9!B&_/А0[A@E_Y.df0N| z5!D`LJ"]3 nХΪ`?Se(_4-MՏ۾y|Rc]-z~СYF@|R#Q$
%P-I| Q: BPazI
4J9VQɆmRA\cN6|{q)21Կ\|ÍyD\y(f[Ua) ma :xʪ#&cmM9dMU%gꗇ9/x%D Cвqiz,|]a8q=?4mKVԼ%B2M}( ?: +O,4 /.+T$&Jv
}W061gӥ\:(p ΞBI7{
zߤw4"B`
z%ѝJ l|µWL L$;8 + 58_gsd5bA_ɔRmfJgPO +}UYDH"{.BQJ4>"RFǂwȕ1(?VksKS+D}F8 #,ʗfva1ws-sTN'EV2 Zwb8~yXɭ6{ox|v:#RN}6ZZ-mS +HWK +Ǝ$[{pt`hK[2Zr7:ݏbW_],y& bצLee ǩ_WRߣrC=>Q80Ǩcq0G՟ (\:s:P>Тth^rh|]K LΝsxixfyz25?]s _ A>],hQnyrE/
LLt{ kL~ f8V D~la5x0 :O7p[^UMK*$dEi'D9_E,Ҭؗ=k_LG@Yff3ә5Fzcƴ, lt243WV{Ww('G#v/%gNӓS'q߸ ۰dgjN`o^>#;"]GY 9n M;z:EhhN>\5 ԏ̿:kh̓u> +BbtHV G/ ;=wI ңUAS{ 0XdQN4D,ti4bڑ6,: Y9xY rN1ΕXDpem ve ppe¯9g LÑίGc|~ ,^<A }l`G<Vp +I2E 1!܉@
tsGTz +";.%̥ X"\F "r3822)\@)uxM<<ה*T z 1# RSlSng& Dg?Ղ(F&`x,*Lj0G +*`D&Z)(8g*(XHL% xƄCǠ
/ 0*
uV +(Nlqڸ.W ў } +!<gOӬYGCXS/v9> H9/@( ̖4?l33Q,pڐW=$ l\F ] [7
.VͬzK[5 +sZ+2 +V + +8VCVar U wqhĪp#m_14!ַ ϝۛ;D%Mm8D|Ңku8J{* +֟"Ԯd#c%
JVO ZWY ^s))q+gq-a=^Ҁ5w qtY#wXRuQ ߔfmwvf + Q>> iX +X5<{I|SHU@]16N ? 7^"E_FMS9t8&KS/X*_Ej/fϤ +"#{^yp)Ex~<rp
n,3FTCg/5d x3{auC5CǍY9Ҝ[WEmc7^Fj?n »e dĜA& d6ܜ 474
X+4+AwL+%ZA}GSi1KЍDŽR) 48[Pp3'㗬J5dGM<8~Ear1/Chx: +NdHCi-OR[M"~+:1 qVǯgyl#3@#v9w@2W1 Y͚ +V + Sud V0p/-eTuv-rMFFI<2$:HW=k8 wk{\W)̐]` +Gj ն8rDO`E`A$J$f$RRS~=UuN$[,VwvNP!4_)& ߘ(rs;BƂ|uچ[W\ <D%6V9ک Nh;.TU(!(tUm}eSk34R <X54JʱC dcHz sCH!s/a]uavaj +`[C9W7 Oj YsYII/#3o !-Mz<T|<;W
ڰ\йD1O$)͓OO +fҿh ,aH#"hI.[(WWJvHA:f7Sڵz̋ ϢuGiKx +mЌ?=+b;/*|'I
NrWͺW1{\Ha&p:"*u Z3ZkU50YY $Fl:x0T8'y&]uo!n +W;TѤZ hak۔O@3K+k1nz3;j!,o :{µ J<zI֤$c(vήIKzcN)kYgHCaHhm'$"
6PtW{)z54K
+HoLvqm8'b1Q?:T$vWU*%ڦ5[ HKi +ٗf 7H?" +GOCUb G_:iϖim y /.yi8߶oK\zdlj0'g9b!d/?XWo#8gP6O7~nd_c/&b#8_PԀL.+vdk]0Zo4裕"⼏T"IZdi)c"zN",oJHq
vwD7- _҆2~cg#ao 5$/
:?]WZ;8!Ƈf?PFdvUK2uϛ+ӺU<O찹rG +!Ws)L4^M%OPڶ /<hjK4rM3n\^'lۙ[Ry4UmK*ej +
Ԍ;O qi
U^+2u0 NXt45fʸif5!<<ѿLfo䦍I7* l-vyzI9#Gg3gSęIM[s\ph=]
FJTPmx ߎ=QU3j K.i$SK$Pj+,1 +`Pi(6QdJX'-Ras/ +r}XI"-D݆.a $Fk GWY^1dXkKus8m.˺`2e_r2u18}(̗سDgZUB#}?:3811DEh]kь* +LB+k %ʺ@N T<Eˢ:p@w)"LhYm 8uOd̓kz]X
D +- pmma+ M֛IFZ=e)$`o>h L%n cT7!eje C]2j':]7lԀ_],t.Pd&)IY6e6#F"M7I65(hK(D<H;kͩpi!:ou1oşP +HWYoG~ׯ8țxEyHGiG{!u8 ۀ8}UW}*؛P +Xu~sdآ/ G)ǧT9܍_{Kw|T ,虇 uc_yͥUZ\AvX#(|kwux?_d>$N /A HAG7.(gp#L;x
. +D$1m`/Э i z9!ȝ|7+`V`#Q |A/\t̀8;ldrx/rWJ.|;k\˻p5 '` ]hGO낣w>l^ k%6hVo7|(YlNɂw4j/ H0 {H1aM-z\i]bgPO zg"Ov=U[nրm*.V ~ԱRY )xc'?[-@X 1:7.\N;8$% YȎ"$X9 YhRMsv8FP"xg0ER0K@$K4 %lgd!Xaf=<}T sNu +yQI
m)*AfLOx){
OY$* +i
H 'z + +K֒ ^<4Ө +mhLSU"X>-R 灗 5D%Ihyv"mvfĻօns7Xw?Ľ;X0_F2z1qAlZ#U
O!cɛ63,i<W&|ij^)72lUap1Fڠ8# +ݚ?6ZJw<C\e 'P`Q1Ё,ȥbBz FsK~Ny3/ + TBN &??,Qb0dIAR$NAZz3\d&l6 TɊ?vl8LqЧ&l͢I "ruwv"AB$qℶQPrkQnp@^5쓏O& + Wx0^Gģ@ +~z~ +HW_oFקdH[(AYG2di-yofgm`ZBzY+4nDeL8mХ6z+OwpRyT6ZҏPF˟Ui5ow GOlB $7bJW`h>; MN\`ȭe-w + ,WVRWJˏ
y â*]45x6hȠ^KۂQE
~VZL('[6gvM;2]m`s9 nr}}
DmxiK,?{= )+:YƳ]QF~;y{` +6NWPGN*B6K$G*ƪc09 [2ܯ5^)~# VƱkyugLz:Xko#8(NScn#s&{t$m1L3}}-/[q?b!Ţe5;JgL9DuG<-<.1M|8X֝x N}]0h/x$ h $ pbk, SU(T]&X͡ Hq^f,!0 }k + Hk^gE }jr:"sY ({E7%-mp $9SKF`) @= +N<g6DǢml<gFZҏ} ?(; ;8xo36 ]85QRY/<m)<n:Nvg
+YF}16c͟礻g + +_ ^\z5AlENZ7`džB3ChfOf!43f k h ϝ'|Y^[cέF~;UýQanE5(1b L"aW&c֗ kqO18Pp4¢<6WVű]|T3G
,5L\zC&[,90A4=OM)A&gr&ET`N2y6lgŝS<iMh&Ofgʙ<=<q +?3T3+d)j5+fe˲?,q` [x+~ +$ e[$\N0mz7&bt1n0t:Lf8(/6*V,q 1L-#>[MphaE&#P]N@VǠ<=2,
Qp))-))Dhʉ%G g9*bN#7eeӻLx |o +ӝz +HUKo1Wh ^VEHaU(&EmR!ĉΌ qR $PofeuR )6 5J* #n迍@3?|V< &EDoɛVWG5ډ]=_ JçimH&@{lM}q6 7[ +^/Qie'ReQ$ E@KsD@H:ؽu NN$.XEx@6>or Eish:D*\Jy wel2IXMk@0 c H%v(!_6?nG|}I?hR݁0O1u-`=*v8M\86K7ljD^:lF}
++Wf
Rngtօ34=淢ذ-QZ4_v/4bPq,_ΞXWYHMr UTB Ynj~Ǽ'/mnւym ՚Þdjp$
8&yFy g c0b\1l +HY=d|.'rKb,OS`VITNɆ4%] RR`[e(WM6{ ly+uJo6eۃh +HWK6W(·ނ 1MQ8b [NSzg8CIM V$qq3 1>UR(WFdq?d.N 6Y|ݥ/y5Y&BVX6"iDTE܄4uӬ+WW.7pJ oD[tҵyn)W%W&?ť(`M~]vVƫP,^V=M
ELa3] + 1KZ}wl> P]*+uB 1k/Q Å]XW(pof.cF}UFX +.ċ(2a4h`wpqcǨrLx!!Gx0f&bWnU"P K;x* uE +H + +_Z ~Xuê
04dȗoSN[QM?hfT
xW
xՀW
xceh^5U^x}n=_ p)W \Ǫ<0;ĉ>w:/;7V:CWs] +HV=o 7W$gt'H1)X:@>YC*=ï&oޛ:f`B`H +[ +(%JTJTnTtbRJyuE|;CkD2KI3ws#AS|E-%7k7$vmx@X^_30o+k WQm~Hch+U؎ rpO;]wv;iW]v{*#pܘՎUC^ ՖTC^._`ܰX;wݶ&JQVP\ k{ Wս{` +Ţ
endstream
endobj
284 0 obj
<<
/Type /Page
/Parent 15024 0 R
/Resources 285 0 R
/Contents 286 0 R
/CropBox [ 0 0 612 791 ]
/B [ 15302 0 R ]
/MediaBox [ 0 0 612 792 ]
/Rotate 0
>>
endobj
285 0 obj
<<
/ProcSet [ /PDF /Text ]
/Font << /F1 15414 0 R /F3 15412 0 R /F4 15426 0 R >>
/ExtGState << /GS1 15436 0 R /GS2 15437 0 R >>
>>
endobj
286 0 obj
[
866 0 R 288 0 R
]
endobj
287 0 obj
1577
endobj
288 0 obj
<< /Filter /FlateDecode /Length 287 0 R >>
stream
+HWMo7W<얟K@ +hKK[e^V[;dɅCU"q[>P; +=
$PO-YCt +E- .bJOqáԸuBt v~a4z}lmr{F +b, H>=._,)HDtY社+`BMjq%ೇXZC%K0JT/J[~ r C V`VO<#N8\/2rWi!'9)~z5:dHTR% 7%r$d}ќStSÂ=6/ӞyGRk϶"+{N,-_~yѬXf0M9,l + -l?8Yt<W |AD ȣs؇1-[I`VOmR{nv]mepGsweA${ZI +\F۵d~S7bqWûr j٩Y6Y48ytG<r TAA`(3 q"#4,dC9I&?ßFXCezoz|aP/ $LIxsfbVjYM=g5Xv$r9\)psJ ^ -53RRnNtJRY*RR#ilHbDbK',J #}?
"^["Ozu 4X +_
T7ת4Z\Zkmt{'qMԴP Fai oæ du,w9ss8 +3f q+pW.0MVr.0M0]0]a w: wܡfL{_\'k]siխ%#O +HV=o9W\p "πR,1:8N R_~,e_)r|o )1묐&f0A~$)mo$~𡝐y +'edf*mzyZS9n0#`]~b>W- +Xea${*R;*v蔤zS +".Guڧ' A +9b~vuPx?}T +nao>8HTYsp/ Cr ҁL)pŢq.J 5AūY)|7W׀ZP* +묯:kRB:~t pOOfS[?R" CEa'\JהTMZUPjT @3h +UPʍ + +H_FקxgBk@<iFtI?Il76~`;%j w8Û cAa "jm)יQ[`Eg0,v\m2% p[QorwZڥ p-n.p;M 7Ywnqmb p-nx 8n 7{ŚZcŵrimBZ| +HWMo7W{- e RC[+*r0±-R"ΐ]A (j(>r#zn7/4M +HWMo7W{-=r6UȆdEN!ZI +(jry3yu KsntIC~Xn1QkBy/tÆQ.ɖ yΫidp:[-niqT׃V~pQ~pr{|v˧2?]o4&|vŵhceԠ-E.: ] }aRmv)/z@gcm0E m\n}׆q!K;ժ +s>2 U
fA?EVu Ū)0Q] hBawT)gT&S j|<q<\@&H6 +@T*S0QuS'ҩ8qJ/t/~<//ZCm"pي= $j\V$B yXFl>O,]Yvy_f
<a#]{!>)x`
00؛O9W1YzWzC¸zׁۧ 8kʖl9g#<+ҦQat%?D&V# k{mrMǛE + m]aa7+,pWXfXy+,p3,rǦ+,}Wx9DBms/4^?rD[{9rDC/꜁A-mjá
[.N.ͰͰͭNfX⮰]a[Ͱ]awiu"wEn%nnnu7w + $n% + cS Kꮰ + >+Rѭ~Ihlmo߶ٿп` +HWn7)x 2uP Pu֖iE3pWZj&7f8'bDi&?|L%gRqRJ!% i}篮.eQ WEQz8+뻢jY[8n] gn?.w]-~2;F6w(i +R7p._i0H5|Y B5 +#j~
BǢ22pnR SXL`$٫TN8~QQfo I\
mdT(czSR 4=&ݎFlZ86
dui2` PEﶠ f@Cg lz'Ԗ=SmhSzLk[!_a9[ߥE
8g_>.Yi
`g+1hy㞴k8L$.{*lHh/1{!yFdE{ھX]ЋeܲnB/.HjF =,pŒ/κvգ)fvy 1oU#>Ki75m$`{F}K#@:VQC ;8{$j"aںKlmO:Υmّ$ 9fJ%,N ibi7 ttK6Z8#a( ϡ-!!m'r,K4'P>&C,RPX E'YbB{/bX՞7$t-^٢bD @pn
lu 뫐
zpl8\wpnvd dž$'{M87E\> :俏WV7,Sn"_\Y8l/_C5 L"XB} q{PI.&k[`uxw +k'=f)EF-azQ`ֿd7=F@Ԅ +be1$nLã,"Jyub?"Z<$ a"Z QfGGz^U?ZA7d +$k"7j%u ⒖.NOSՠmtC|>r _G>}*̱ y4Yŝxxa#(_N'&P <M\
Ͷ.An; {D8ssXJ*yn#X7Z>4?!cN*e&ggmM#TmsMms
َp6֞=glm'Ϟw3 Npv ;u ;yvN g~Q[ Pp=FLP'h6Bh/>rH+It9 XNpt3|EQ+BϠtU =ʠiN +0 +HW[o8~ϯ ZZԍ}+2;@;E AX#ܴOHMEXsH{i329[diZ]tΌU+̫ʘ;>Aq}O 뫤L ECbjXi ~l \xH W%&Wcۯ\Ի3<:Óqb-HEVju;k}8ރFb~%[JQn{N?twT˴>=̪Iqu(\o[:YF?%D[/0V+m5.SG^ܮhC?Av<eAoçWLa P-Myt8!){vz__^УWJ/JNanXɦFl ;-V1ȂyiyC u&$!fT1$5Ǥ)A0)gћ>$1h98}H GPt>V
6=HZoߨ3gac|?^< `<PꈍnD6e;VGatzqUZZ^Z(ƘYTX'NדRD_d >! b#
%P)a R|8p?4dAٰ&ցYʺcqj,\ѹ@1-ȩ KNıdie{*Rc<\NfoLr(J3eZzSoys)
Xhq IJk:t趩!NK`եui,, z~s +Kv:˒\5yDOfnE.ɁO m'I>x +I%H7X^Kި,jl#A~>Pcd +r#qF'zx>Go}e%M nZ? ' {1% }S /COn@*g*D^ME|ޘ3 , A߂A2r:x\Hoԥ!FΒ(D.dʌ٣p\ +q3X/b ]_pV*w9qWpF 3sYB9SJ)xI>vՎe F\Ź*fus8<}[M-_ +O9TBIwXO0,0jH67j6%F(EK-(UAX! }N}>jrj6H8zTzv̤ӛ=fk.9n7bSh^/ 5MPk!Lj K}C/߱%d9mK3anikx;qҐ`>b}ôlu@ ,cz$HGIب܂*&T? Pkv` ۩i \zoA78Vc)}^N7ॡ e}>;}F!nl`_L7 ՞sZh|uaL5\OxE-MX jֱ@}С%4|9{:iHOHMEP[*yCcQZ'8 啻=ny^Zj}02}YtN" V^`H 3g2n P0*tNxG
I6 MBE3[N*6 ܇=8#NL &wQ +)'@Kae)Yk , +[bHkf`L⦅AuR\38>&nȱJ 3`q9av_R)]TkMhIyQ]30o@'wÖ6 _Ԝf22Ldc*0- 5/~"khq.,i(6! +ʺB3+3jYnIG B +&Ex=oD$F$@ GV %s!;+3)| +YM MoTOd + B2dkwkʹϒpIB ^*Lѻ qJ<hi +7uz o9pxc_TqVa<rBe86xRVF+ԝ|
cv + &|2~e=8{/(z̺a_MaɅsUQoq`F1d:tms*ݪ'YZ1I V4wwʱITv-ZD Gmچp:7\ҔX: Is̠ Igڤw(loPfpZdp 5\z ?ܱQJ<.n hLNV t酐!`^l1!m{:
#8S0T8|ٕޅ6BwKyD%;Njo0&` +}ҋ(~IX`FؗkXl' +]f
K(ZUoQtt +SꎝoE$0nd ޙ +ilET'cߒhvNI(c̑ˋ0R!U3IJ:WWVI) * -|l6R-uU]`˜ﭐIF>j +<6NU:o2)gcѭ](Uxp?k\L#7LZ) 6u\ :J** .Z535[ +`oFA`J$@!A'
?ׂpNE5LzJ-1E/+<m_ؔO2c'poxa̅i;BYT4.NTIl +6gImέk1*
|GBG f昂znά;m\0e%ٌ̌5?E " !{?&Y!X¼Q֪yf5/bɐH/Z2;- "<^,IBNN2^7sQr
S<'Y8 +.+))9P&*n4I+1O:TvZob_5` 1--ޔɛ+5'qAAvxS05y5#d= MmWßͪ7+3S]pHüi.L@i0! 6"b.cQ0AqI? t lb7QIGf92r~5NQx3(ڕ=nݕ6][olt;x6
<7àַBG-HXQͼ9~$?κ? =W0?9tl+м3haͺu?{@*Mvb
PB7̻
>Vfaƽ66:|4e hݠ_7̣6 TWĔjj* +\( +rT?4dqw?9𞓶 )2X ;#eZ{5Զ6hC{C53vL) + +;f}O esԨt|0Mz*SJ(!Y1t &09-aU];#t VZ lvpX̒Wq`ܫu +V<QWxބZ:9Zb=Qvp!ɲZyXt`8%5v rUs I=^~ !}xw) #6;̴<Z&Wڭg3deZ?\ :bY0m,pReK2V,njP),S)Y*r,7 A}2
ag"RNq [<H|ݺ-L<! ] (02skU l088gxfeH'*2@"D$DGM+SsIѺmxIYIe[լK`nęU2!gжj )\W{:mh_/ ڀZ^BD
^7RzPLn;Y_AH- PKH',p$
R:ز &<t4#J=PI` +HWnH}W4loz8} FdM$R6);4um$, Xdw.NU,
n~?q~<*S8VI$ +(J͒\nnNny0ua4>< +XjEv **oͫ*L]Vʵ.[/F8tv,ʰC5,a,`?mcƻzSn".r{y%6ӽx
<, ~,2]k +\pS['/0V+m5>,0 W/::{wvʓl;vYegj;Sd.tQŖLm$ +]96n䱑/ځE QW +Lwzd+2XjͯϟZ ޖ}ǟ(8X3L + +Ĉ^ޒs4f)DدnІ" m .( P.+L4 +Lo +@cxk̓/O-p]t C2"ń {@9T1{4QZHSΔ3Xȟ3CLKUHrH0,$* 뽜fҦNPgd5 +CS=77ɵʥ_5U=zꉽX#>vKm+eTz?dyYi'i/aBЮkkIІ +3qZPp"S=|%VD13NdޚGһ dxnYA#QJ_8)&'J-O1~vۆtbs +K `EKUZ@`vK xsm$mr+Xx[>`g^2o Rx +ȑU*0ZK ҩĹw}jBQ /?qZENs4HV_5, $ih\P5k&LD3'S3|Sj*xL1U#h$!6h*C-eirDT(-fUťw B<.<Qa 1Ue\L= $ 3f}u sc%3J q<hiJE, +-AN_)}g.Fǘ ˨%p/CڮIٗ%gOΞU+y̗ם/UҦ[k 5HW2eT(ڞc〄Rp 2m 5# IKIYAI {g7AÀ` bThk!80&?vi95Ow9R}j je6 ]k ^22?/<Ax47*y^F գ7s /| +q;PXI 5%3]qǰQci"#iϡ|R+DWӻ~4J?ye<19 5` +ɤ@v?l՚/
/).!ƖF 9UsGi"'@ `,ʔb/ru-l4Z9*
(H0QzGT8VQRa (K<AֆV xzI`9^j _ s{j=NfO874%<5KG;lZAb1@ +l %e@s.p8<˰u}efPQJF[,]~1SZ S֡E )éȷTRȷ "c Q?߾M2m +YmVf_)i)䴠~~=Hv_#j·,<Sֶn߬/jhK0y#w/cJv7]_@.$ y/13CQZ -"eg^ߒS:>>ݔXbMzi(:srlz0%|ȨR{-H $.>Ÿ a$ntiԽ :{ȉke7CHqº7Boo#>? RN Rޫ@D-b{2Tnq&nϤ_G,(8 {}!{.F8 H @{2&o~swOw I0X!=EsQYQI.+(ֲY|쑢7AYW`EWddd dK +uUa3"Ijg5Ê$K V\@%vomͭ*c Os&p%P\>fi[ nRQ[m,hYzqEI'5ᗙNi+Bq|,EzW~/oqE.9 T4Cv` + rTAp][ۡYnen aL3/W>IBXy:X̧>h@M".spp0bO)LUU(>.\ #,7lIQjP +^&:վ-Y6aY1Cٰ-XuP5CxɋEh m@F6[.n?{~y<[,i4YSXI!mL}S/JӬU;~õj
& faHJ; ҫ{|¨rX +z;)'Oz5͊%N\"* kX_F^ݵ9 +2ڒnva0*:LAQvAֺ0"X|Y̙ YR*}`=n`QhI[4nTXBm^Bl I6L_i$;ݍhT S~z̀ j3&0H"}$v/< $Ux*7ϱ&0 +HWn}WcO`Ͼ9Pǂ-` vň ̎fв.do @鮮:ue\M|7n Vn{X-WP/_W![6)܊lU㪰ZSw& T}$r$,,eJ2.% oEARUM~k qUcedAT1߮^;2Y6|P](repLu"-ju6).!k&:˽F?.}(3Kw:u1)ȵq{ժO.KBJr6|DOBN C +ݑ,6"YiW;\`8P\SyQ$@7 Ƕs ԉ6dQqsq2$|эw[;tm'! +,cAatFL_4
Hie~8B)y[zJ@(T從TkfRmr%za!zѴc8;'=7_mc(b0.w%\Kۇ;OxT)[T"ebٕ{vo gu +NGL \fh29_@7iJ9ew<`{U/EgHZ*Bݹ 3?0v/ JTYz
rĿZxӻ[ bN%r8W '7o7>|L# -#fdΨq".L0ak љev&Jynܼ_. ws-K!z;FY?w#5FZMJmM47Ԣx$g!Dc"4hjZJ*iأ +d7+]a!sB`0I7|F/9{ͤa?̪{qyiL +oo[R)ۼ$*
JdԡHtOW>RݬRXgvC7sC&qt1Ql|Rsg$g N+ dJ"$ +jUFZ3WjPtV^ fve g2]BY hY-ѳ#D <uhD`0R 0!;
RAɖْJ0 /mE^c{} ƻq@Y[.]qZUtxHV>dCcq,E.B]&'˛YVZص 6X)0 U p3Ġ?3PN scD *5cla6fۤ16g.=[''9ZI +3b0"-Xq +,V!|8"'G_E/f""rӞul +0jpfJ4K}՞\B]Ƕr*^.ݳ? GrAO2\ :-J#t7uwxoG 2.E8g+T6jt +@b3LLw mc50:S4VתdK
Eo<8Z9 ܖ1hC5ab|Pw]1)~VI; YaXa.#W4r .^n'n~j +-^pk~nӵV2?kP1<sOS#6fLp =Qxqb Mzĝ=ݶ$+| -"%=``9=@@I!r ]CVs鮪NW"LK+t;
"dn?ܚ#ILkPnj +WjրZD9ղ-w $eVϰq?Q&[p Vd233'2)+Vjw6ON+)Z\юje%z} 1:$`\WmҷSeWW YjoA)CvJ,=HM&V 8s_\whkE
*S/CYoZ= б. d&٣Qq:9R0.1ߠz<,#531'8 Hn-/$wm 8``jv͖vfnzp$$Vn;њeGH2vE4+L)#$%V^ +V L&R7 # Y>]vnjJ
>NZD@ɌTV TRU p35mGGr4|^7&nbåaH| +Iru/I< HW eby8<7m=, NZ3{ [3:ݪqִq}pfW{J@)yJbBծ-֝>V!Ǭ^ mg. 'W֡wӸ
)W˜|2,Ri m#*_&
BۉA%4 NX +* es$*-QQ ihUyzQLd8Hqw8b8 /݆̌>P GUˎC;F[fi47rӨx, On"JAhkM J:p~'XiK[O r&-ƘjzIE4\B ,Em7S%)- E&jD7]N ib hC+ع5-"ExT/%Vn9Bf®o|8RiZ_5" hFPc +KI_M)N`5Lj#=$E<ɕL P߳i_s-lJn3m AIXٱ=Ԑj:k/ G{2>i%Ejf } Z1}fWnT瓇Qa9JП`vՀ\<S)usˀת)t慣ZH *eZل;}{9[#6ѷ0Z"s`;#J7Q~ R<pEk&E%Z ٗA3,ߜfacUOj(mr> ;()K g|-tJ< y -B>< +l{CYcMqPd g|ɪaSۭ<'A{֨mgt !a"kUftUׄ]484dh?qN(nwW#!bS;N$ DBƀ6 : VFOjG7vNQo[{CcGH(K0)<^֔4/Uҩ6q%vwuSWNʲ%ЋtLH,ՁGKU8u);KVR?oL0ܩ,!5 Y!kȟ ++T/|f@P%̎y HUlѱs6ѡ z:P# .h$Mɂ5^w? !S"D<\Pg + d 0!PMUf F^Y bg&tdʙIIE ꂈH:/GS3l%V6.yQnL +$$
6Kb +YVA`:J#:L=4"J " qMk*0(Ai'~2>!=Eye)%%*E>RJX I,FMM*i9ԇgd +]Wp="% ߳"u.MNCQ-67(%Ѻtj` +Ăoh->n^77F.إOʜ*%Z8r.U(c̱|ӿ\@7g6`phpږel>o W%^Y6CYy/ 61 \iW JI=,sֵ4 Q;_,#x?j<Y밹zn) f;~Ğ.npokI{zE$5HA%GCώsALSmX@Z\fej2jH0;۞9tT$d ~(މ];q{ +UFp?SNDㄺJ,[2]J~H֥S#]ʑΑ(hB +HWnW4q [v +́D +8 +%
`2hATڹ:S59ЕXes eܬ34a69 }:ӈ. PHrÓXV"j+CLN,^Oq"A5]=~ʟ>Hᡤ5g?pA203.kl}A7yJsЊ@zN.r A .pZZDr8 xb B+{j7$)dmK
d"@ nb"v.Ql+3<in!Y,5y;5 +XF! yI0b +M+lQCb E@3")P1ky NFN
@tZt홿,I +PRyJU}"yUsԦGr|Q٫#9{Bm5fijNCsH5382GM.^5UjNzJ Gإ)B)q?H0#ε~fz::9߸?\i/~ \@=q>ى#4'C%|ݛiXb09O +)h:
ѰV` \SGP^i[ 6 +` #zDG xx + 9!2.w +C$6Qn!=r,PUDtkͦ FD!9ZXNIep}s=rnx7 a0_Q"a7)}oZ.j
GW_l`Ѷ1Ҏ{X_TK vrk8= +*,fY tu +u-&('5m(vlh{uݏHU04%oZNl,O6g>" `{O&#$mv<I>q 9T%z 7˩Vu9^=<F`j>@P3B sWKo!5< G5D ꞦEmR&K(@
2c#:uah 葯 +LȝH 팼3]swnG4(Q 'KrhɭoED;6u l̮쒕(PE䩨 2 hIF
^h2x$ <wT %~j 2#?#ҰgY啁;HogE)6HIKL
.Q[ۺ -陬WKSCM|
ؔ"N"!v+:N=I +PXd g IHD ZПC×] 9ELVR #8r4΄bI4FD +HWnG}Wc +[T5uN{/KA "m4 YCG)X5A } hWώPh>Z#PDЛQkn`N9hj]C1m*%ҋ9YPnhjjk1%>ϵ|ǂLzSqg.:=wC[Fsy- zgRzS 98KXb
z8/W ko9r'zWn +c4(!'G_a2=ߗ `B9\Q#f RZyųyqX*~k{j<d +# O;f$ЊR8j,r%kuy1( !D,v'48H8p=9:7g( ȓ>&EQc3cO[D'[G: j'b>B̦@Ĝ3sb̮C1h'D\o o@h}***OPyF*VyUyRyx÷SyfT wU U -TY*O*O*OPyUY*ϻ*C*OPy*쪼 <>J<=RuWHwpѡ~ĺƛ#YsdNxYG\Y +$FA۸?j> lo7->$6spQR%8@ ЁN hZHA܁.ݥ5tC:qZ Bdw}MDP{dnA2UFf -K`v[}b?`"ZE;nv͖ +GGcwظn쳋ʋBL$bam[?>o11#11'; +7zGgnAք[xr?Fގ ?03x?k`'v7'r{Gi_dcD }ÑQ {"{/2n8s agb _#%E~m`Cv{ 9d BS { ] '$+w&A.u_@vAӇjK+ +HWn}Wo˵0뵄~. J%n(J(oNu E H@ęKש:]u$Nh1z_6*ZwgUlD|ͽbn6R5s~YtЦ5qM+G'HuQŊOlv'3^e4mjzU:Gb}s/۹ڶ2V\-Pۈo%[6rdۀEV;ᾆeo. م``톭V%+E#x+^_%a\|*qZL۪&yY~ [,f#9Ir(ems\F7WSITF*L*dJF`Fġ l+Dݯʵgݦس1gm !fB9B' `x"\Y\. +XrcQ$ag9GhYtf%>#gz9Eƈz#$JPH\hݧ)W0sę(~YYmRPeYV#| u&$ Ŵ^<v@l +X#V"F{ts +tġ+qKġqY mϚ@ 2 nl=}mה( +[ {,ʬ;#wR t. 3kCdz +7 +0)5`|Qa䢡Ooo[`n
UrqÊYUtȘbבѕ17C +ِ'=6dVK.y'mhKZB
+bSݬxm +HWn}W)#%@b#vQH.C7H:I690`
o{kRKQ16Xn>Xp2. EMkJ8d_ɍ/Lsm,Wm6$5Yw4|g& ͟OJSRIR>m[`jAE+64E_ lmV/WfKL"8\IYȪ4~m390f^6_h< + +G_^L# /v2A|aCp*Mh9?2Z*qW C7G g}|o[oUW>ΥgZw۽ﶡABW_ NV fڀgI;ܚqMD1 4mW'C0`m6Y`T5nu7S+? +$w*g˥ZvU':">AjII lk~3fSu$zȇt}A;F:y<BAtA4T=$6_ $Ti8X +1Oc2 A?3:8dJSRWׄXi뾛qZ-C[= eߊùk:Ro,Bo/y.K&+>XqD8; XMG16\*Q@r0jvxFpׯGAT Ӷ^ii@ˑ C:DN~o
VՒ](+b%7DžM"qة:!Z+Ȁ'@K m>^H9Eӑa;9#a@3죩]d,+ +i2-fa.%Ϳcܸ6h.~,vPgy{P)2cك3I^J%<|aDX^Ը91=[I;5h:o]SMal\SXN{W܉K#rNhVڊV+h-vj$!z /;<0ڨ +SLT0y!6պH}C.dh(ĭk%=y F 懤aǤNE75})·ѝwLD!8\ +:dF "̙rp>d8vޱknq%F`DK^4$*暱I/DIŰƧ/s +p ;BXF1qsAoFs=]p-#33cW!`UKRl\&?(2W2bgPm$ CS؇Oz.9Y 8SMb*|y+~hz%ݮ옎@nDȘ蚂@mk 6'|s@+ȕ<, +WZLz`տPtȒ u]& ]ZLS +>&wDPSR*'u7cBֹ Ido,=KŽ mn2@+<%ygelyblr֥i~ky0ͅ#_FV4^ #s +HWKoFW"M.EfH10 %VKN0"%yI.f]ջɛ*zˍJ N%cintj+]6V͋]H:}m,lU]!CVO n ]$bh \]ed:6mj[ Oi6I1 k]}$"+pHdMfA'nEhBuHς-LsY#+_ځ^` ?ox `QlK Q,ꅅ(
j 39kT?jc6:\9* +3UXJ5\x0@5nXiϋaӁ\<٭! Vn/ oaUR=={Vȉ{On=->gK F[ݞrَM'="Ļxܯ6r1LV~&Mb͞kr5Viu;_ndnO~!W;W0ꎊ tPARj`]ϫ7$d?RAƕTzpa1 DN=ațmR ̃6L, k8zӐG۾c>RK~PM}0>M!Ce?QvcNZ*@GpxRdf^8ѹlVp{K9>?mf3 {ѺFA~9 x U[ ]; |9 b^BB溿<1 O]1f{1^r V0zvZCúח˓.nGؓF| Իv ĉ /Pa +" +'Q}})2nQpmB='h\ +[<&_1;gpx
Yb'ۉUuvrn +c)<f +)y a^'O88qba|?97L1Sx 'F ۹0؎`r,v]g
؍(` +N`j/a7Y849=.q\2.p3\v:-p[7Ep-pwг-p"wmn -p.\ >99ʚYY='9Y9YMЕ,gQeGױI8 ]<l +0"7EnK yԕ.q \ͣp[%nuEn .p+q3\-pG]nKi.u\iMi8xɛAӬlnV/! +HVMo7W{o!Ek =4F"j%$زpf6". gޛ!wULQ* zc¨bi1SEl{a2?>iӫl=E!j %=/4eҹ@?ӱ]BTn2x|P vpsK ?V-z>n Âuh:mMtܶ!0(pݚ[B~,?\5ހL:VPѕzk6A \~=<,9jotY) +SO ;("e8 8Ire*rK|-=c=c=6/# K1R'''5oiC-c=cўcn׳
lT +LXe$CОRõ@vv\<|gͤ%hx xV
RL.]q{Tκv,T̟cb #)>d| 2O +wu?,n5sh̳hxO{mzUP9N`3 < 8*z &x nag$ Oq <M[ n~n fx;x)n'o'x; n'N7S[}rPpS7PP3X=0ߎW +HWKk#GWqv&@; fa AG- [e}fv^I0_W}UhU^ΔV"(F*x8Ҋ:/g:WQ\억UsJ|"t}:cYw5h4HL >jVU-m
X kePಖXHoVs#$;G(xY7*?a[S]] 5&iHOZAmL+ =Akպn:;3n!a3c.Fw#*RFIn4i{ذ>Alt5 &kG_ԍk]uW[P>.3xpmPn:x~Jv7tJ vZ сP]&Wu%X9Idya9'Ƒ1-Iqs8j 7*6QlIvF`o?;VJ'sp2pKr =ލDsLMqtfXa.EN#NqP锒r, 'Qd7MMT m ܤo:HjE.exvv}w"O@[Z,y#|zT`u=FȆ1> £/j\E 05WՑjo P/I>!I_CڌvnHOWsvmOk_3}&46kZj|tOu:uiYWB j%7ؾBVXWBUyu<M%ټ5쀈R>à}pDW ɤ8kqXKJr4S9X,='C?SɀV\&i UeC!I҆nq̕ s >. =#l5" \Աcz.n b;t
4Stf#fxA))XmȨI +£0<w7FwRtOaP4>-R yyCr3#c@u +J#m-:X gGoG=w>[)$[dB˝Ѵ +K+E# 1;aN1IHo+x<{uoVo߬řq{Zmu_Z<gFM%ԅot0lu/aSev!.9ns qk7 gp6ҕf8p,w0%qNp}3f8Mp}3f8Mp;Lu3)os81GmWBMQVeeIu%Y("s0"Rҷ!d; eؖaSr'8Mp 7 79n3 g q3f8ǝZ];Ynsg q3f8M.Mp 79P,nspW:: y4e}QeMQVee` +HVKo7W=[IPKRTȒ`K5;Cwm, 9c] ҮsualЊj&maҝ +}"6(ȧS`U⯴phD-&_p ݡu,>dw!c_W "*el.3:sPj) ( }XU<4%?c~&4C%jn4q]䏺n
nlDMg#E9zUO3`irw ZIɝJ"{2>dMܦʞOCsӢʲOV^nzqYh<Wy溙G,)۽X \搉vltg@/+FӹlW1<r|xޗ-s_7>6xX* ^[,w*Eآ{I% nVW
K8soPV{ͣb+;W'xk A |[iSQ0LJVy67 =Yfa
USL`-4V{狍=#Ê庈],x, y}3x7K.z r@F"Kndϒoued҇O>nѱudD CA 8țϙ$jyux7vWIԐoz|u%!; ɡ;vö8t#;tɡ nG{Δ`
`C1Quo5 : V;rrVvfM;q6~uIʵ:Jۃ7nӵqh(nLyCDgE8^/,2DU9/ц͍1 1 7A\ZѣS ^9 `'P<5x({$nb0 +ד.pwkqrr]Ww c2 (LS{Yt
{^ +HWKo7W=h7w P6 b#CPz$X + AG7o Y9F(
EԺb4SbV)#_f }흸 ?vw S
ޞ`c۬o{{d?J+s\j&yCM m'@y:7`_6J>4J>56DӍ +ɏ()*趙kpH}{7<A^g;6ٙnQft + +tBDb' = S*#W:EHi2Oj\To!3N3/ԛn=W|jQFVcvDtt~# ϲ%x Ō霊)' syvx8~$QwRLTe +Bsz( IK4K@ +{ B%!] &_(=Ho}^2lu@B uH!r`i{&jqtnvô]$ai&+[ 9C4 잢ĝ<Dat"Do{/`Nne@;W) Sf +nJң)=zJߔHroCQSm<ybS=ң)=:*s4 =5ě70B)CvP_H苉qļ >W|~i /_]&aGY88)G̚`܄ 0})EM L1ɾ^̬ǟP!ox=9<x f*j_GaC, VuXUa pT):\fĝPXp;nKVZ.pgp;Z.q3\Np۹j3\pWzg7EX ;Åf4߯t;Ku5V]U]]CЗacuUT es*1:.I .r3\fRWfĝw ,u%nK.pgĝȝ"7%n ,u%nK.pgRWfĝwKܱ: ;Åpa']tIu,|ɫz7T][w- +HVMo7W=h@6 i#mH~n +5
?Č53[巙`\B@ǖY3ᇲ^ai$q< Jg2a?Oø/go]{̷xh0RYoZ傴VPCbc[d | '92@u&5iɯ;ͰE w4
Tբ +q aǔG<h(]rT +}ݨu3Ps b)b? [!C +48 }nW؉F%f _A_*rhr*K^Ev/SMB$_";[8u -n +HWMoFW*v,C{D@A(eP$wfg,C" &Λy; Ec=X qѝJ4F?_Fk6?_.>T7ujRuu燾Uut? TmtuY- [-<? ]Ӆ.dj~$%&7! 6Z۵i+o 0yg3 )W +H2`s U=3\Є5<hX#{ iqQk$"r[nY Kj_}m7\m4d@ t8VzfA^`W[ nkT?k6o-7Γy= }=C5hj+tZnEwqz 6Y^%N=rP7Wט\R'1i\ȖEjbpg + +- ~ƷX- Y(#'鶓bX6Yhx :TҧQAFC23Zr~$Caܷ`B;䴒}䶥i=- _чީ=/k/W'<!fQCxCl.4G1 [lFWo Zss_ϧ`i)L'RNzzدv/ #D/yG Wx~
ߘZCjgj#9M\aX#eolH}4nm<R MH"OV)yJRPOZ% JTWPR+w Ɗ bnʹ a~!dI Ŗ=O۬b~"3 !tL@Mb'"$I&[&[*F}̹!QԳa` a&qQJHkڡ 5 aQ buC+w^WKrrGS)8^hx!3a;ȟ i 0Tw6p]UcGNw tG ?'FnQowH?u \ݰjq5q\
㪧v +9Ǿb<]
rdqhB%${0:A/x0%^&ۉWƇʺ1 ;7cGy(1<&#!L 0/CcNH'R'vkZ3ާcp<fnj'͆t! +zj3,aDB84 z4h}ɣ-Bq z <?8`Zm8 x &e6nDRl 76_ws̎94 |/_+u~>`7 9X &Q=u~k6> "vӰC*ISp7%nfS[nKN.p \fȝT.q\~.p \f } \p;MP 1)M5gNJh:.M~5_Gy ХiOæ +HWMo6W(kTb v^Bkˉ G6eΐ3ڢGͼ g+]!m] k [K%Vw )nKYH*Z/?J ) Y TQaŧ:.c|E7csM >y |Y&|<}E]Ԯv]a<Q+iMV`^ׅ\BeQ`sUepBįaa.XF[l8;|cuqe ̗ +)>uvu( ZIKUe i H5HTgkEU@aJ1b2X)dT&(š}n!nۍ% F5FZ;0VxFr[ +EUېB w
ܟܢB9Ƣ-a 3UᖾONU +n.1x^l:DXyz:mɘ[2n o[O> -L7w`+ϴc tdppe46=-. ڊM
ﺁi6HJiO2]
Rpk}^7WnY +ݖ! +4<x=
v#bN51(4"ߺdKx )Y.,ѽp (t +#YBDڵpk=TQ%IQ\ǖuɊR.>\&eabN`hS;\_ ++в=3AۺP2<t Nz_#{# H5S{םNK(L B 3hcz3v AD;C+]i-
^^khn{j<oV ]8tY&[;1 +O֡<Lܭc7؇n9 wl7v'UQH6I=i<jzqxfLx,# J c&*ޜvW]
%wִ@L9ט*OL4,! ~8/׀ra|0q֏8Y.1us + «5o)$/ a4 +k .'{ G*hy٪ƧL
=:7ʣGy(Q<[B =^"GOKD'R'2k^5SѹQ 5ʣFySV:S;p՜ + *Lcp , eȍ> +<)ڹ@[j3Z-7 +K +HWM6Q:X7=pQ$F` ( [v]%A}g. +-,3ofyT(-$Fv"(tF*x#)U+8ZܼVu۴XcX+ o5~:UDZC mxñ ֿu.A\c@8Tۺkl#k.5įVѿ2MpS#61 R #Sz P嫷$ PQƠ tG9zB}|y8%_)a +6I#:RPl/p'zqa ƮzZC̰3 mǨuPb@cJ6d| &6 <v3qD&鵧 8D?lh!Ybyj.p= +S!T䜩z^'uV'NVjOe<j.?]:ͶTePq4< Jk +HW[o~Gؽr +uo[}[mï7ZmoV4a}SmcJ*Soaq]Tn)} ]ay'~?r,Wj>^ʿ=妭enC"K`C PrRe[yxXxk[USK4Mb*G:ؕx\g@'#&9 Kf}o˕ ̧W p23;5"9o}. a]O[ }>'lAcn~q8×Lsл=H`Q o6o4E ٴ +Co&X|rJ=`bWl`*/ Hn]X[5jtFv}|S +lS }RhY]{^^ՠ}"x$8C!o*rp<p;* ]SnsFa`~~ Iu'q{աߜ?|j%4-%c?[5 )H4ƛit3śc.04\k L?]~Oн: gTއi}
Uq +I'6PH?/
}㓛 $ 뇎CϫM:=j r'gRx~+{uT4YͶu <j~ܝGDDljS&#dHFԇQB .) zO$$}U]MZsًgYjz?:B BE _O( +AH/=oc_i|Hk۟Y6X"1 FP{t-}8
[ՓzzJDT|8k+@?'DpLoNai5tŰ: 5=U
1w {iP^X)l7em +m ]&_ʊaIR5P@~ǜ;l} +D)]*x2uMG>!=uk)exF=rP~~V NL tsPGAƨ:@ jgUvu7gwκ$@7L[3/_Q6Ii),FӯF:@h&uP0=bYBK6#!xharf G34G %fZW7ORk̍ ӄ~ҵ{QH 8u&U\TdSy0%Y Iݯ/ GS.
&<ZCeM')WtZ'QYzI;TDH"/o S+swk?uP*L#E&
邩(ӱ а]wJɹIMJD&0kR"D`1 +ǣ4B q-5$K#D$guc~{g5z AIKCwyA6N^dxe *]<v18 ^Ӱtl;fލn=yד8v;1$:< +? Y94.
w]*Ɯ5_DjQ.uUtJ2lafT q'8ͥ.-p[ 79n.u9n3grRf8p;9n.u9n3gqsq 8p;.&8 N Px-5w](Ə[ +HWMo6W( R +d l {XYmr -Y=Z,D8o$Ϫ o3?^H%O3J);1#xdSuWފwnP{o8!HWmQ+Y}ꊞy\ G _?w)kM$4DÔŇo-UUcFZ] ZupiC% | +(uyc~yK~[7ʵջq@5$C k8ZZRTփq|MWuE㔘{*iT6Kwh( yuAA찐j !K
9S5 {ѵ 3&o*q-D p?Tr8X ځQ Z5,NӘa%8& +80 `onw sGXþBu<]Q#SƋ:Ď-KzZED|zGR IĎ0ؐT:YݖgNR 4 {O_rնZk]kl8l )Ct]^jO<gT7x`7pb}n 3-1b\a6XjB3O V|h3K^Qe۞;NICEK mPǤdQ\u'&Ih'P-]ШiZt +(nx⸠{2<'XV2ukAVz +}/ $| ^vaJ+eg9>eEj|Sq<zGMI 5ɣ9@u)rTI]^iP~*;7ɣ&y$By|g $YL.gMp>Q!t +&0սME $]s qk; p'8pHW;grS;9ns縭-w3 p3v p'8p;;Np _q6%jjkUq,u]i-WC]i&sjPDmU_GmY'4 220Y],79n3lu9ns p'8Vf8ǝ wsduYn pq'8Ý 7[] w3 qbs3g;|S91W@Cq/ŵVʯS +HVMo7W<e +R mdHrΐCQM`@ΛHZ8ec6* % Q,.\ +}&q̶-xM[ +bNNl8x9ņ$i G $k]M<M6TYw[W:?-dTNՌo UYb`'"(hHOoYB1Ux>e1KQYf)(d'1E؉>%CUgUU)Ȓ O%P+~#%x\
ixS >֎g7VCv:gXgCuY Pc, N`R^C>ܧw"r "|v7" na[8UM: ;m ]U{t=Pj28 p+EUp\>qYF@OU\=PǏ# q H[+v6[& _p*05<A`Αcח}C%xnh `"ƎJ "&$1#u{rV{;abk,raQp5XCX>8LYT͡.| X
ƣ 85~ yX.4`)[ 3w64 .pQnNwnp3fNw[ 3vv .pS]w 7.pvqno O? P3fתn[ˊZ +HWrF) 0o]U}rr!ŘT(N7CPRl)Lwݳ6iReϯMf:K+YfY Z?>G?ڦ:EmH>R}uj-N[>38@ 8:1N3u3ǔ
h '%z6m
gVn+v| h ݿ\(0j֤M)V%jdddPy): .Ra/iF<<,@ +s1f)n
5ޞR:hCOh;Ys0pM|~,"Ϸ:Ⱦ$q ^Yq"ze )BYRʫmv/7[6-nGϟ\=19xu$|CFG~|9B: A[ lƦ1~şD +|g0 `D &/-G +K!g;:WXs$uj'2|ÁчZ9:v<P.7_ r9<[s N2:J:Ru/&' 5 FRvMLoRL3*7AK%,h
놟jY:'t߿Rm + t +cM!ެ{ \`g觡)9C +:*\QI~ O <d1ftUtG-NU9y ~3rs⠣y; !Dwb7!
17fGe#~"7-`O45 ;džEL48z!ℱfdsa $x|@zߺq[
NCƻWW?=
CBVPPR@S{=TKzhybs
Mv`w1GXg
' Ābے5K2R"N0,T 76m+AQq`R,bI#+r @u)"lx/wo-w|y%tmS YFʠ[㤝?QKkxX_)[Ac :] +mb_RmJc7!j94+6iPF%6Iw.k[?04qAoѾ#4$ouV=/ ],pL9 +{ C%{@ā 8p4Wz 1wOI3?3> Oআ^<*KFѦhcA q L+ș9pmիy>e(| IfIq&44zUP t
UT[;Z: aFk鰓@܌"4_N/t/N0FCv@ ' WTM*:qXrv;eOf]:b BVL/"TG}ԗ#B
[ d!c_ԆrەGiƿMcOf U04:H +sΈ5> n\ZԺ +=F +`a*1=BG,QkЊvIPeޜ;3h'S )eƂg]hNR +-xÌiflY:G9zT~k3) QWIl?Q|hJ +"Љ +DJsD3 MZ QAQD q(##pN'OR#,n4<A|.2Q6<GrnKIʓ !t]NLrR)}%WQD
tt +r(۱豖 D3n_eJ".8,subVygByR? +ns=8 l"i:US<u>g{m +MƒVq7MmMWSfG:h3C +:|+>iPPҔiѼ +ɶR/x2e;A))JF *efʞ _zq/< I8[
:+]g. +#S -aʺ9gg0 =Ö#/; -~ q88q1~xu0竅-^ l{OX17 +t_z䡁YSo?`ՋUD6AfQ{rC0/j\ϏM=PC+`j z ġ zP-M]mC@w~p-^bs'S2FW Z?t x` О<|~om[mWզA u(ٮݳA <CCJ<Cc(ȿ,iQU >5K_jCBx+1(%c]́4b_ݼH_ 2?77Sdg(w|m zUk2 O 1Pe%O'>aUg$jq + q| d kYuGѽ˦.wiU-܅bݝT *x$×1Bt*9Ɠ[4=q8&X;x ` \خ;v-%Ã 6uu3ehcud& +G;xR;+0pJyw@iv1Y pxp6DZlGk+x hég="tPٰpM4=
O +HWKoHW\D |98Ib Zm&(;SnI;Ew}U"OR뜲6.jn6O4ՕZgQiշT +ITu i鳄OYo"WIqTKXP\E;Z8~`п.'2%XL{t*2y}2 d@$&R( +-"Hϋ$im$F.;Pӽ7 ]<w 5cy$..7>dTş9Z|Uqn=`FmPFZG!J`B q\ +Sj%*ȮN|z7 BZB2֖qct_%+%k ?с{CFˊyo.v9E`1ު&!(i+շEQ㒶& +o\pQB
v 힅n@;i&RIb@h
@QF 9 +G)yzlZ9]]FO˯Fl<7L dڲPJsz_hH_I^! +Tu!1g85G\l +,dӪ v8 G/ySv8`NK+@%ʯg z|+\pp6[sqy?*3 ȉ4{HmBj🖨lR=K*a _&} !n|E7}K}O-m:t
EF y =y3P[HdYQs} + C"1# ](LoJp 焛'V ~*&\വ_s7zN3od:h-IZ;b#U3 \_=dy540 q-"%z +%U9,4o?naS 0sBRYIoBm9@:W>b}YԲ̿AyE8S Y5ٖ;*r +r3+ʠL:Ġ&m0stA:Fܥrȷ(\tV&j +'E@m;imj>=:F*)OVڢbVI0JQP@=K UEܹR28{lʗuv}1ڳ IJyv`sL)p3Us<@J Wm + bTAę%ZNgӼ +AȦtA6>)/jfo/A @@y0E8aARC3hN {crp+p':~ ~`.W"mS&2 ;08e2?]7 Wxy)we"@Du"tO" 9; ףTUD6v.pq +v6Z)9B
PqL
UG0x˥^Vkv7bS; qk!aw:!HjJ)F"ηB
5uaEx_}j}|
CV\])aL(놘Ҟ( m2GC Bd .*Pݲ")0ٵ+R[Q~' OG PL{ZB{h ĒnEZ*ְ ?<^Cc;'i_d-|e>T .b|I@Ȭ QّhZY2v ZRK7N㌒r`>J)-VqGo0>9v PAFΓ%-C~ +Oy}3#?0DZQ"Ũ MGLΒiQyF
gHrh@]7Sx@ ΠoqY{[XGl8!-rz>IG=iS c 7YQ D(urWC뗠_> >?x89 + x8B$ ϊp.uahfqv|GCE +oX@L3vCa11"g+ +JqLM:1w7t0tw> :-rQ
Y +ߕm0 9^c[5mDqEN@-&7ޠ8ͅNN` +HW[6~TĊ(؇i-;]4Be[,cy( c**xJg*c$UuRTi&iM5zӨuJ>Y=ƿm~\ImkKdʊNLTe +5AKl*zUbT'1^F.gq +/v/v+dJҼVhBn+1&$}:O 6&u nGic.pÝOQsya1^OG'5;^}H$>d +m^cܴMQGp 2V
ԔE?} W[gUi?>|D0xlH ,
~+-)uD0ao<g*1֘sz4\k狚QUKkGw=6v ٶ^,٢Ks:)
z@3/و :RN,4D\`ypQO<nм<6c͛ѬwDtgHK = zHHy*3jI 9)t hm W_3S
uwPxY%U$>%{?3}?5G`!XlX0h5n=Fqa8G1%F+S/t%ZCFSq:Џ<8(djx㹝\֦ Wd(V5 qaVۆם +դrPД<za-:(U1 zt-1,Dymn + p fsZ+|p'2;bjԙ3YaQ _S'ƹ ݅<|K= el{lt_J GA
I&7鼨E: K aIc7ޒĉ#e&,+ K kV.Xm1.d
R =ٺA/Vp(_v)7kj$
W&tջY$_XN3/q1M4"5s)l˽$i/peUE :}:ѨkVqv*דpVߋ=S:kV@ɰ C +ʨK¯ ie ٙ;Sr8 ]fWIPB,/(RBCl^(&G&Z? e-%m62|t\zK?UP !o= CQ/<xE:@p3Yě }/:
%D+o7xxx $dys _燋 1җMM +ܰ|A@ ع2 +_IjUn0"
ح?E$pK)*+5|8<\}T2uj `]iP
Q AN hU^&S'@|W 00PZe!hDMJ6JDqh *&E E9VE%dYeS0zB +(}K-DC +
![»i`}=_ +C@q
nN5B¤HYxj t:؊ F2_q)W "@ k$ #l,9 R6C5աfDB{lӻ2 A Q #X[!s沺 !$0C@q R _`yzO!gȗAķ0H!+ķ?y叐 yVc妸 !A叐М;4.jlu?FĢtMx2H"ͪf&U2L[x_YW;#Zvܺa>_$
=(Y2:@ tdQ Wf<3%%J:<E ;q?,]DP7{aY/8´-(D,ZS*O?j{ޝ) г"> 0(;k2PDPIV$T4JTE̅lЁ%^ 6E8d'&X-Mbx @ϗ|1ս½4ae)*k^ZD>)eG"w6" /T-2 h l0bd)*k^Zd>^ H#/MQ9_H"»7zH曢rՑEc |Ş/Ty j!]_<\Qb7/3jɵE7f* ~yԌSbXv:ir +KlNT=Ƽfg˰# +4hy)\xxV m9%;1װ"i7b084
hcWVވWV8%Q| 0mn} +HWYo~f`1 +edE1WK ,fUwޏD&ȒN*|8qx4̬ 'F}0GDv bG} +R]N `&koGyU|w9~
VAj amx es`5ƈxLJy+ TmUTI$Og cǗfjwFق@k2gϼ?96Mu,'!Z-Ȋ_8yYwA 0n)6ixL 3
3*{_VX y8LB>ѫzp^9%d>!*u&=(bjvȔ~:9 e (b%< 2bR'_pRrwtu,Pч{ )p)D#Y`n/5ghy_ EjDm9?g|jj bZ ͈ǂˠFrMۣ =Q1ENy#)+4RRԡb," - v0PCpû9VALk:mZ :v5ôA ]բ}Z$ot3_PTaxB9_sy+ ꕐOMO푶0%GN^<Fx'/efBFhV&4 /w~n~ 5GLuAM= HgU3Bm -b=,_ǁy'9ByG'֚#E -`B+eTb#y7\b* +IqբI#xP6Q29ExX$%ʂ*҂'A@e)diLSʟm=wAwkv0 6&56?)@pc ǂZGՓ`Wǔk pLJ/ji,GnQ=S$̵B#SHyJ %cS ď,SEL'|#eNۦiۑOw͠'s8gͅ +(8cFjˢP[Tvx Q¹ g=X{BJZa&4A`?4t7K`+ 6V"N3;WK74'Pi f " +Ӎ&rw<'8./ˆ?.LFs_˖(,Tk#\B\-=}mAE( {w +ׯN@5JfKU.Fd.aKu;2tEh6tmYnYȫFϺ +D]Ӳ(Tn
ŇcE*GM'HQ5`lήs3A|#ryL{I]Pj Z~zō fûwn/F9[!ŖӁ'T֍,SU&MU +9dLm-~ j{kF?);K« 1AtH\T@ +)ĴQ^5} +p H||XG|H 9;ADw6PCet9)/JvQo5DW6g;62 !lGK>?Lkgոbǵq +Oe)yȒ8EW1L|,x-L݃ +=&Qkp^0{ 8BZqDDiqX@Qq#`{ypt A + + Qgkxh͆t/# t|c]jTzUn}02Y[i !kYev* Ӗ=lZ2դUf9"'-˪*vgYEd + ;+v)-\/!b=5r>#<@L (P_vꈃe +V{V 1ՃﵠP +HWے}ﯨǒdtG=;v +eig:'<E]LWVʉz۱[P2ZSo@ԅv]4x9iFGpN5d%W }?ƕ[ :ӒBԇD
|!\s;0]8߹LQ30" =s[2"D +ԍa` I^ ؿ"da Q4xYVߠ +c]wf8ЀDUJk *3 d0H2,X_HmJFP ?Anc*(ʠ$ Fz&Mxgu{ڑfiπ +ncߕ W4 1vf5ϯ5<yHO%2I,>&#*,6/'>0[.^MaՏ/Ω)LfP +<(]Ыz{mba<
?`u' +o~u0}ݿfPX B"BpA#Ybׄ8l|qI0 +sT BJ`8t!L2$2#LN +7Zf?gNۏbI6r? ~aA $Vfs\} B#`4 xȕx7TXۆ k
Iokǁ"N,{ [Y?"Ch43my3VDC%)Јi4!LuK 4콭C8^[HK̆虈<Ccom?ʺ]#s6dq;(CԽTXyN ܂9h&{ttCKig/~j{''. :^8j&j$E/"M`%b+&|37d侺LI$Zi5[cFr$'|Vӻi PX\`h~a +;R~+ҍ/\// %_ +VφE: 顳bKv 1xwa0DyYJ1 r +d?hVv%4v )GZ(asSCߧbG"HX}f|
&^wp)Dt +6af2M;\x 6 z8hE;Dm(51'
C J"M:> ;X BHj! +=]M0L7V 3etl)nԐh(1_Tˏ=pI3XB̴ާ,TZo),cߤR_%*?7א,`D|qh8y#' Nf8 P Hg`XzلByi=VP,AATKxq +>JE.CA h+ Pam+RYve;gxjY΅̙*`#ɣuqYg<mldkmiGϖim4[ 23{ff9H^ Ote1c~-Sg
їe~a] +enxzH_DCzI)KQGE^we4=.2 Q-!{,߅4 nL :U +4 o+b)% 5:Olz8q] + G,8c7f>@#Ɯ:!ݑ]1 .4!.͟7'E7ruE5skۋSwwB0XꜵH@Ҕ +-:/M0rDj;019Es '5[3SUjY%d悜 Rhf5)͝BcN8ԬUsANj6;W;M\j.I Dh 5ۢE\S5xO{.k|b͌pkfѷ [5; povx*QGY4z`\9J͌e7kL>NH٥N*~||bI3&6c>hm̙֨%PE jZ+j(a\,jq
&zzpR<YU$^"cGT}$_QD D>R4ԡT"RJ9L5JG?H 2#,Efh aL,3 1JGu9 +U#:ޅ 1Qr53h#t$ӵGo-"ޭ9 +HWێ}Wc3w2@ | ccfb70(#1#Z1OTS7#ЃطSU\Q"oq,wpWxHjwz*$u _VƋUI7N_Eeo]ۿw/)BSMg&W"tIK4H|:j#:P誎sV#u ]T?aJͭQW>; v]7|; [\2۶UӅ-F걭*zA#mJ"-*5xG%%\;F9"qr、[[oWS_7/a;aG=; 8;}xp Gyk;zctUƵI T~z Sߢ誢1 +yy[Ö)03TO{0,e6 vg,h531S`uch,s Ba^ÊA{219=A?z,mqИeX7QM..Jgwz Fϼ{uM~e_**PΏt P~n"N ^cx^,4gA>oIH[
b"^_"9TDlbG9 k}Rg%]FgER8}i%*oܣ
F y(ڭ]yPL Oml7 ,{)] R8b ըLB9?rH
sKͯMc Vf$qm:u)T(I r\)ֶ3#dB0?:>&0r
+LQYjݬ bC&alX3^tUr, {?Wr +guf[ + t3u-;Ț)pB`2bw32DrwQUT XMB Tmj@8 1dADtBS}ņqc*Y6ށrkJ+SЭJ(r{x 0*P/+e֮BU+j}~?u[阥y.| =iUzT0V5F?nO TAlگ+KyȖ|,6;ϦY^7×(PTn 3 #Ggt譎PC4zd<0`jC$YDJM04\'͂3S$=( +-D|&f% +h媰~6k璂@WH?8&PrsF#K5N=:R/{"L7]VQ0g`@8N:qCȺ<<exc5c*YɾԾ 7U>0~3`˨.Q(5eBQPP5 0|1JI]_C&ńƾPL*-&x."g$Z;92QK%ؚ,Kx{r=\,J)d/,|n u1p~+R G0Xyy+YpڒEZ3u}a٪ +ي҄ԡ[~3u}i;, >ȕGg%F Hs +13 ?k uHhi⺖sWV mԅV%p +f܄7o,sp[$ޒ]۵zBo tTJo^s*a伒6EaCZ2m_$ -#H aZzF}$k|0v Ȏ!;kDF"~Ubos] 6vu` Wq
,?GoqfCTLiINmm&s uF3sF3ڐ'۫tgZ;hg;BvqO vu3G&<vtdn-=:6F WD +Tmu"Cu]iQ}u>o(v87lxT
Y1RNb G!(\*;=5:/6 +J {bJ-c. +p"URt{|$EYodV]jF!._Ho䤛Ш{ߣ**X?z +H8L$/ ' T*&6ǯX([U?kihn]R.q鯇-p:gh'Wx"<D!VRR8 u8 `j +~AV̳g b* I*~SgJǴV<'_ "34T{G:UpH$0x@ +ܼfΠX*<${Hw+_x +$MJgO(^)}|+"]ϼ\FH3:v$sMSE4 JN*qɱ^SΝ༳؈I +R?Y#td;K +#Kjƒf)ˈl6P} 3j|K@ +Y x + ^ْ`+[T{W7t7 CmKՋB:[l
Lf|h^R; 2Z-33IK.qփz$wk HNl:m;03{瑇`mU{
K_H ${2A>-Cg6hu+)8) .exjPWiTɡv 3Ecjͫ?)Pq $%d8Z뷀?1}KR"K{^*x-
^塖! M%`+2+GlKl__/nG's<:U8z,ϴG/)/qلkR g[= !%ϣ T A\Ik>Kʋp$+3 mSX7f袏r:t~)z [ +L^n"<ˎ>e%˅B_@Ɉ(kKɚyb %Nܬ6qr|pU( g)P\B%Ƈԧ$M8mSCq=z=>X| + šQۮ5ʃx&,G2?-@jؿun *uigQg @уt1Dk8;TMhB$]a/εXfLtl)Rf`U!4j{lr&
> N0W^n cOp 2~o*>z/ #|ʄ fӢD^o'%ٹ*{K\y,YL7-qZ[ )bq/BdM-.iYx+lA'
gfH. #<8wCI%HPr!R{C_;y}Ylw[ʥHi[ QHճ!:&duE9ziB;7y=::߮b&o +%t,}3a p YMZk=F9tWMoH ﯘ Y(,d}xĒ)_$ 9\ GT}4'6B@ŭH &r+IJ^'-S\Z hn.gT/a gERUTҾB'|fn}"qJ5#ſAײZX:ڧϻzێĿJ4Fqwqeq_ {8qw2GLx*K3# c8[:採Z#?t:P?m2r;sqCSNd;]j sR;s4 Jn@9GrFS?rIFI>ihceDߠ +yeVI!+FmIlHt<M(-j(غjL /ݤk?[i[XG]%6qɞb_<v$@Goh5Rk̓Tȿ7JDDa7S~@>V o3K㜇BMR-6z{pC.uE( ' ^|¥_[uspjz, kK=AH; s!"{Ԯ_|=So魤X]DvDl*)[θ(z>>aU?RL ! `K=Z?6C66N9h`3]; 'oAᶲtpdxȶ)^w 9CYvk&3>=55 ^K!" [%PUv`D78psN¹7\uW\ܶFT =o'ٙ)'z͠Ŭ`ǡ[{M)綛kEZX vʳ{'+àB{<?\?9`iW
F'ni,ub +0ႽbmI[ +HWr}W#Zbqѱڔ$'n@%Fe@@ ;ON,bz{zrgexq&?dyWH8837͂R|}ZtC{ Q܇$ʂ. |ar.-V]{_۾ u/@*W9>T?༪LiznJ9UlqF1\Q vvWfSyj@8*t@-
.1Nة%IZ%o +J*>Iߐ"x&īpF.0aސ16r>A~Qc^uVakĖ,hNXָ A`шĈ {W 30uƫ/}l%@, 6HĨA;* +H({f/2, j^$nK*[UE!dϯ?q4HAZ}_zlY 94I* W>AJx
'Mt$aI.sXpv-Zlefeֵv$QDϒ㖔bKv+yR(Fv Vt?2oA|oʻF\^y# Y@7$( ?\TTI?n!Bm|4T^ǘ 1b D,A s~Y (# w E{VAFVTwcnIG8)$2i; + uwܫQ?.BY)䱦0Ƣ +-k$j yp.ȏ?d~Jyw#9 ) ]D} +:<ݑ0FS~])di k)oxS[8(a>f# {I &4%պENsPQ; n*bc?z*
Ո+鳝 1A\}SX ?O&&RA¬VM./ ht*EĦ>Z#s:rO"\TV 7hXc^>e8T*j~c"Fe 2O>xdJی0;x g +Θ^{u="Oc+Rн旚0J I,tfLyfDANQFtJefjjȽ2N_@K}N) FPiƺZy0'꜖aţJlيBNwܳպש}{pL:>7P ?ҧ3kR O'$(սl .3 }i*W2jmqǝ'D<i|uH"12iIƚeǛvq_qGGM'cͥyGl__2Tb.*W5 =r +֔% ?Q)}5#%s Q iUqSn50X.s~V8G㹞PhxS.,*('O(r ).J!LXP%d_ˠ0s,>q]2);) ?,G-sD5RVY(e6 Y&d' +ty:A /M_y6OFe, )ce>,D˗;Zc p;!P<Bc-=tJQ\ X +Y M,rRZ? + nʢb.OAN0vgR zXTQ)D3N ]J`$Gy#)b +%`syW P3 'Iq<b~D|y|i4`r+{j[2ʾGgW!y'Ki !t f)L(3wǔg]VFEIDYg?a
UΦ`Fi)e< +Ji &>xXN {DQxշ腉CIkڝIQۿ'|D п* vҌ l R! 6:lC' 'kdFXEUsEiH㹮mR=|9=.+jT˄(>-/`AE@H&%Dx1P3"Xr*FZ,u" ƭ_VBil(Ķ|6,Lően<ڟ 3I
T%!, Zm"2?"܁{L ^iխrB!kO64NԦDld[H*Z-2Dg 09s?, Lkʖ pKFLOoT= s,%gñ*FgC8hxV B +HWn[G}Wc +r@Ez &Ī2WQԔ,Ya[Vp^A ݆!.!e +NA)+9k|
nx 3z94g"3dA7 +Sud|1@5==z\ڧ~-9>vS]ݒDJg֛6X[ @cAAO"-f)qߊwMʍ}Wؐ7 +$Dp Ey~M:3%'O]&s +&myDt%-AK Z` |`* <4aK9 + W&(M9M@ >E 4oLI&7I7@@@gz mRS;CР La),bEwEy,5y\Lԑ Y^QLf l]Ҁ oLF3A/-op+(otk\Xьb9e]IgoaFcɊ[Tҽ&' Ә #3k [U\ջ;LaerKPi]r%8^Z_c;Nԛz}5GInB>g-v9ћ-/˹%H7 qxԲ@3 +SܗH@'C< yr!qPJA/ht& Y$ء_DI^ӾGM
WJ:v0Y:S>:=1 ^aT[B]8{& Us ['^[#$S~sfF%k[<:7"XO ,b|6J!Р)Lj|X 빇2=ouR@\kc=Y}| +Hn_1"b93 ^ {@bZAP+QD'Sb6B/0`
ܯs΅.*?qY*7&.]bT$q8..~3F6K]WG&]FoԴ& NׇNo՟.ʸ'yrdYc#,2XT|rU]Ub +&yWS!pL0q.YF:y &m JU(l@[hb8]4q.4n?|F Ҏ4vbP{M<5)+3%Y]E%4w 2D6vcßS_$mS$E <S~`
Z5U#EE[1Gw]]1 ?p)dkdj" f +p]" M܋Fk.OZNfXW rs
\J2I:8aĞ}};?L08 up^ jG +A)Nj$@bTuJD%H<3'/ NS7O 흔 +6E /[x0sN#x%*|<Ϣ`l exk`7
U0S%u[ FjUu +\f54$ |]C3Ӹ8e"X;zRjPIQJ
VcX1k]o+)E6ʼn?u40 $n </?Z{7wr|س)){9bbQU/?9yƣ}0<3-0&^tAݮ0a՞85P&ap!(^ü@o`ņP(aBrSEwVzFkYtHQމ@ _ ASK &_<T"h"V0i k aiQ 2x끥qW 5o&_OKGI5sx L =zŕռ,!d˰^> 9y b,W- r [ {9jf(?ӯQ /`szA/3.;4MIGv@t +[m'F
Q< N.}F-잷/ `M +u' 8*hkN_\ȠJMի9ʙ GuZa}-ܵ=E^Z MfU/VWI V6|䟍 f{0kQ܇Ǥd<e]2u𡪪$<FP|&ҩ٫ۆc4;*.Y +qI'!G; +4"X xh4k+4x͛gj!EQg˳ Em3a%wڣP| Nr#F=eO "i<ݰ+jƞ L2i}6xz=qEZao[~YSyє}rFNM!5í/MH]+>13 h n ><p 3¨^G^"iѹ x#3U\?MZm.Zsl(`6_ r-%
9]!)=$PҘ,D(1[ +K)V; ;KٲppTJŶ)3%%[oGo Nv8{y}d[mݠ Lif0 4>F& L3if0͠iY9ZVz]w&kXh=Pڎ)l7ta=e: 6UoG*L]NӢĦcP<,{O-Kr@/9*XJR +
p<?TL `ǎD>grV* !aF=ܧW)8u:[ +v:]pEn +HWn}WcO>=Y7b,VA@Lޜ 7h]]էՅi +k+HU>l"+)U(f3T9י҅ >W)jD>M4V>E|Zj v*ۻj_cj\XhZFqaRϫrTZd/~ fKlJ&9&e*! }Ex4`ArX#Ew5=y9!X/F2ؗ IaU$'ȯH \ TuM%CW^\}s]ʊvmkR* ) nˉ(Q`ScF eYLϫMr~~3͎E| +9.hA)(5G-!tbk0Yois > RJK}{S9)}kl H,M6+tݮv]k"ҡf3:G} J>6ɒ`Z797&m:֩;TTSjJ ["#Z騣~@@݇WA4C +u}[ l 6b չHNjꬦj>hD q^`hr:Sɝ?ithzWF xj6LcŇ+ S*ދs>7%!{M,?{ D.) B_sj|lZЍrk\ DXu 1p*UtX &&C~¡D Uݎ0cT bGЊ4@H[RmATAO 3n8.Lx4ak`coC~ݖ*4ݸҘPAr.KаYR-{E z! I!\~-Y@;nCMq}LNhl
XKsc* 뾤_s*dheVDL_D%nO ԚzB+}l ɾK߰|'tDChDs k +* Ύk%uȇ2 H9YvFCb+[] 4@Jn 8<#@,Tf(Ԧ w%3q>@СT385aSF5NWy0 -踺&\KAӀ[]IƢ Ԗv|Cd q
2^,ݽb}5{r56 >1(h.n zcJXvvF\ KHv.%SiۦC2CB=.Z7^:p]}SxcUDhB3N7='?V/ڔR_F|GH6QrgtUC]}H2k.ύr<rz +RbGRV08d#0Vkt_}Ts*OQ]<UISI̻ }d> 22p˓dW?OFTU ;G6ҝB AcMmN!䱻#yL8UeD IgL Z"]LL ɑL ID ˒Av:tק$<)ޤՍl c +}q>Y>q: CLkn;l:'!z5ưg, ;+Q- [Erj +M#T ʇrЪ_ +HWKs7 WHvf7|#398r:i8 KI&AזyW#Կ^ +Hg ^b#z rS__(36Sz!l hX%+
RE ]icM +k{5O y!je='/=G`$8|Sp>Э$ƣòJ@aЗv;r9W(2
xk +04;\JA /(` |Z`sy?9A_%YM\u$YM++X~#Y#ӄ#G2AєKcJ 49nqO6z9379*~&6&ohƾBNg:%'^> -j\kpueb nZSH~n Ol bxqs.6X';e[YN>H3?+"&?Zm7%@Z#[ F('
9 6bXW! n pdƔh6c$v TO:T˓6 jRraByL puU3\ "$hB< ( + dPۤ vwf\VH +rrr +iMn!Zp,6KNmY;@_S?QAрPX +#/ Ŧr>JK\%>W5@ Tck{ LW(bilEI &rλ+ +LYk.͖dinSh \!͛z*y9
|;|FL gS dI *D n8cukIiXm*˶oH/իrTJJ TĜ]ےX >Wӑ8(jl&JdBl4y]B)ځdE5H.m0h=r1] WD͵?_&)ýߗBAFT վ4]o =4Ca"ag4,,xQwG, u0<} C Eb 0 +HW[oF~# .}p,
PvmP~6jШ 0`
眙seҕyaCHm(TR?ɨȋBUI8I+>Q:)~ˋx`0jA+ fֹJdnM`>=nE2<ld +dܭ>⡟<$dJPG>4(:=+va/.wc6x F 4t 4|p$'G*7<5I >[d/Q(i+i ZȮK/R*"w)RU$kذL1r +Xt=]a6^:HU0 iV#L"L`Q 7CdW6,ay %^gch@i6 BX| +! 6b"S2 I#0?W_%ׅ m R В#9s]*ޱWQM1g|^of?`XXW#Q +Bw@eF(fIH$oȤ +,0`roOLo\yt ;]vmƎ+?%|hѸ Ih57 Y<X hvj*j}Č$;h<N +֩L߶~~V{(%6bBW"f[|%ez=Fv)K+g C3 +1 t'lcXST Zq5%' +vЊ]`@+ <ȋNpb EqTܒ҂2O2ʐ~ +v/^^]]|'etN ){ovҽR}| _+NKo}q;ԩcB=I_5SƲ5Md|<%뇇vOS{-ݲؼ"Ѷx 28le?|\^t
[4WF4O:Ճ VM7/ױ;LD{J +[6s tk.l~=b^^)C9/oے\ +4J*p
/]F">0U: B ot(}:dS>TiT;Li4˂q;]~bO76/?ݵ$kfgA q=Lu( ̓|!#mCs,4yp5])T*"L@jYa}jȷ6M^&XPBnWWw][{KtuJ5}r f[P.H }Z1w`e<_p pGXtQ-vT[GQT G}!* v=XozC^4՛z*L,(j4:c
G O4'[0ӘB Ԓ3 ^Q3 靨WZY- p0}\gJ3|Xc /fu{Ŕ8_e O| +h };q@*JL5-78
? +*X yp f_ɦ9YF9H-QK:U(ژHjlA'20yHd3yH6H <$!#y@v$lo C<$C=H <$,;dGl!;;[CWW!RmujUΖաb| +HW[oF~# 8Ccɀ LWFPCZR +?sRjBm,ΜseNeOIcU&AqiNH |v>}Y=i\M6r2mvlf|$E`. +6 $J>> f?f?<)e^椶|6⨭֤7|=_rlSb +ܧ9@ 0IУST@K.c#(hN> a +-7:{=<H2 ЊƽV;"<F^N^afNŖ2Ȕsr'[Xg=xɷgF8E>yWʽK` 0y +z.
FݖKwSUNẹk +)o:ql=㤜^Ac.ҷ-O
!UԴ4OzozYd G[ + +gOt,^8QPlXs)tOB~ @H-2dn 4W3z1aRڭy6[S&\i9%ybw(? +g +0 +HWKoHW<H~40'@0b!tF[2,9_zu-'xbUz|Uu 3Ʈ.t ٧Q1. +]e偪|@cøRqm ^mq5>YxG<7ŸTMvy Ȍz + r9V[¿7;eA=}xydBǶL
-oŸV(TE9ǕzgҞtdjt` ҁw>/6 [~f
Vh' K5SR4Wf-7_w;EnlhR<TƤrly ;k.XP8/%=_Q|rVY_B%HP `ljdi +3(_q#H0sΡCLO.[[5hu%U^^6)4c iGh_ճϑ}>u&O y:!ܨr~ &ZϾ4 p9 2ҳ$׀A^pF9Ő`c@z!PFXcc" +y u' r+ +_2gk<9U2\zEz3
궽T@ Z}iͽp(ReW]NnHkMbw-~ႺlWY$" !ߑA '/<`>`~(. y {?Baf +DB@R_&ǼL2J5/!}N &AşlÿPOE 1e
1}Ċlۨ +ZG+"%f +qLGǢ[:|~#0<^Lu2y d&иJb`ɔza:k!C~ŘW !9kyϖ^xYsj-ZnFo ImҫrNn)5 Ϫ%Ŏ +s)8w^I4V]770M8
;8poaTX1T!|UIp/ E :0)y: +)_JqL&^V+g#ҳ#83(|́FU%G
\ӵe
V?Nrl) *ԗn9*7x~ J$ϰ,x|yV<c[(nc Hʼnd`V?nj kCcQ֜ 1`96N?49IFcSAͩtwX!%3y%q{Ю
j
+4*l#N[˜j-k%˚ܓkV#8 C/f<4e} SEwGhd+q ƦiPHyK5:xNmƲUQ?b˃l4;m*鍴ăn;^JtV<˱{5PEŔ pOȱ098^Rs34hD C6K̖Ԉpyә{ק^t"bZ9KpEqg^6\ޞS 30;`5z5oNo<ۇKC8ڬ,7YqsjNj[ "W;JK]w
C+?6- +$QGMT$r HSƋL 2 Ȳr!UGe5 +,5}S':iIC'ԑ!
^{ڈjFqU5\6 :EK_w8 is4,Sb˜Qa:.>⣻0*~Di /N;dhֹ;tFB ~څRglR оb> QUO)IR^<ek -,\@
1NG9 "9 Y4C* t hw /D +KwM48 $2*jHFe@l,.Y#܃5NW=7o =6֏ +HW[o~aQq9@ AE v(D9"m}hp܆8E,r8sΙ3og&T?Qʌ(0j;~T͗g٧ۋ ?sjSmU}{OC>xHP?H(eˠ.RsSjoV>G?25SA.o J>ѹ ?2Q$CTFbE~Ak|?.3ӷ웍bSACYWF:+/3-oX?F+k͏( T /OȦՊb9iĆw&{/:yFzY7P{5 <XWSWɃ4 hV7{i>V= v[6T YjWcTS ~V. /+5dCjek"sS+
_!=rѷ1ѷ |P˛R^<_?z _"J"4̊=Hڀa@2+L]Pp8j[#Fs]uT_֚x;ӻ h1Ņ{^ +ŵ5(u[jb!xX'Ukؓ
YdVXYC1ltU+ 1&P`o*c23J-+4 ܛ9%3@ n+(ZJ ൲8J?z/¡cQg0fUkK3al6?%rojGW1|"",e4^ccҋ# k +2IcH3? `C^6[7˦9̉Y~٬]JBȎ4 Z.HA:k竽T;tfQi8iUa1j.xR0@ܟ('n ;t(2%'0,B+C!&8B l +A|>cdEݰOw:y( kE jM FD k]Hฌ1 ~gҷ~=}\d|wN h1Tpۊ~`ߵv"P`vY{@C5nݱ,R%sPomv9PT -3w$&Z^ +73łNAF;9W dY? +" 8$(yL 4͛Z<ӽՆ0uk) [H[2 9g} +[''lG.t}+.IZB
70Խtc\g$A\B(pΛ~->QMX,oR > 2%aܱd_{/ ,B[B`'Glzxs5TI:R%z[rH +ӏ]ٛ1][| qj;v ڸeh~m{ .GnF&PA +-B%ѵ<dJRGy73p](ACPu87zj~s" {zmaJ~FD-U.?*u/T \|,)ϱHW~ U,
㞰xy,_ɓӧњ~g= zhNMuYLEfUdS-k5O>)Es +9ʾ 61V'ϯ β; RhC><$}|2
,Z VmHRaymϥ*֓;| sm !-Ch,1'^ Q+ҡa~6a$u I +"u(?p[|Vc, UzVD +ԩ,\|Dgى=z@&t a;̄e74$/h^_*-#n_K*nBhe</Bq +ǔ|2`ii ZP(֠_HT_R8` K+f^q_S3\O\OnE{7j]/V\L0u98krj/x;YĚRJdžxlh I;\34-@: KVҮ,c\@eSyH(Pkq2APE궒
S f\Y1w*0Gٵ7b*_`n
9rúua =[,u\Te$&սl; +HWM6WH*~bnA"( \"(vׅ.lmrFKmXS|7 yRk]
eS7DJi&T LӸuV~UB^jZ^Z QFWKr[9'<o7DZZX
E .F^\m|L3Q18E/VGpՊ,LX i1lX|>L U0pqK +D<Ibu,5bme{@Az MQ"Q xS@e]8T ū32.u4x
Ot/ևuܹH9`QUtSs)k(w u 'NB(gtJ|_ʮE܁Ln +6/b諗?`;)6vR v[cS)ܑa̻jaoN\GND\8E#?rgi _nx.e h@AJu \ovY^~ZF1v^n!߁e 7fbۡ@:k4==X߬ouo^xbF +Ʊ>mSTm l~D۬s$\¬n-]_R8spRc7TM,[Ӥ7ަe}wV,hCG DuXBFU #G՛;x HۥM2?"*5(o!jDI +/ؐ +Gxڨ#r܋K#&8Y¼4MCjn2h щaGIOǁML+آIs<xnr*Xj
K- ]sƵ&xL +r%J ,8:L:7U1W +o_zӹsw6)c\i-aնnìA= 2
,MKôyϻ]Kijsi,GqI>|fluO!995=ԜSS SSsj +Sk;,8t}3pw&(3bECKK>yKߒgia4- dYg:ww`߶5ퟻtXN?jx_5{f?4+~a;
:?aqè)M uiT5|5 Vw2d`p*9r3@%} 9rӸR gΑ{S 9rR gΐXs3 }q Ù) 87glSv%mUѶ)ٺdKPWelOQh[D( >Ű"2f$Yg ΐ` Α3!'ȑ#g8G#K,9r 99r3$9rs }q
Ù)`83gΦ4WE̙̙̙ۢ) +HWKo7WHzI. k jM XKX5$ىO wWFVВ7r<1_mD (k.j[j1Lˢb +_&O __*\i BR^i-^Mla!vۤ}J%jG<[I]Ԯv^v
B\ F'g?U7+ / `|lYm '*_T#%LYTV[PI LGQx +֩_^֣3Tȿ1=F]Tv2 zpړsqwi/lD붇pJ elι:U@"LlCBZ|2Rb0-3ۆyv"-t峛vq &pz(9dnюwnU.BBF"( AlU4 >UjIk]QP9G~QYx[x }{NeR)ըDu)<cJŻ
ExU#`ܦMr[n* Y@@A~ Њ'bie|ls ϼhs^ZR)=.Jq=2%'vC.n7;"=V4sϕ"k + AN+%c0%}76~R[\Ub}>?~puB3 ?4iWX.fAJrMv +;L 1K<J+v쓇=D!ݚ:iZ0ǧg +ibϋ%ise +tCCf ҏu=C/jڈm;T{Z}.-!V GlCIn& 66]qL:HҝǤ=e;HWIܙ|Dڕ'qg1pT2Hdbaj9RW%zSxjOꓲ)YO2cTwT [u5 WQL'S] +HWMϯ"Y
`rc%^6 [3t{>_UԳK0c 6 뱪zE ]wu۴D])-Zo(RM4dVi54^JF^qq<J tRաx~vK{5&$56}> ƪϗ⋿ZpߐG+t}{61dRMɖ:4כ4QnOS9@؊k~ ZaU _|<W S.`Nw.AB8 N1Z7g-9пJ 8+ved}sH3O6: /
n " G &D@9y62!Kr+.A+Ca + dj`"ݍ<esMKv !Ui89=roxB|ȆɛmtIL&g3ә>t}Hd( +ː3 eC R30a q`Aooh.Jd y"bZuCr8> pwL"`2 +wD #D2NXf2]V } rEZ"_q[Ke҉iY?|3C[d6Nz'5Qy5W*NRR TC!+OkqK\NO ~wx[YNe%jY"4ՒZ + +_W _7u~qF6֦!֝:Ng<Y7Zί6 oSNcQ/|vpsPufҍ:kbk3g CSshjM'5Qٱ945;
w#G!K翓:gy`4-ԠЕ;c nT + Z nLCE#Lʑ{ $H.7PP9Ϩ Ui*zP,vny_Y MSM㆘&ӱI9fNjî + =vDixA)r_ ڧUGKRl_$ +>< MFỪ`` ? 2zxeKHMiϟG+@ņVq4.VP0p6;Y^Oz= q 79Xxu%OM1^)S0w4? +ZIߖZA焊>{Kfʘ͂n%8n [#%kLAh́ࣂڂp%GZlu77{ Yd㷂 tU.M>}"z&8SܓN[fi݃B)cvdDŽy0dbBh *ѳ:ɠ;{` +:cn |)x_m">ti{ȨYE5ԅϣ5M f Tw u-ij .3\ G]< M<p<%`<p9p<r< j
dP.Tå2)?g[[CͪZml]fPWfPLN".kL"8péZР3;cZ
klgi%|͌n!T>^QnuGY*fXO!eXº+ErKYK.3\"g,g@pHp9+`<rK䬀% .p.UA epS~-2VPjۮٲ%4ںU[[1ALA?J:9|LgNStT!,l_˧rS +HWn6+b ,(N1( +ǖI $J1{KK"h M>yΕ୬J3 e- JHźE-ʳnŇec˾|M'ZJI2+@={HCLF_h]bbL 0~X݀Vh~]| - +Ww F+p姴XIv5JeL61hI?+#Z>w +BcY~Up%o* '?s7|TsxL /CxIo¡8E 1" ZC)\[X
=Nm`jJx> ?]bwU#C#0 +΄O Zlµ#1X +Pcj@(+ʎ +X+PXo4?:|7Դ.L3
F 0U* ,-dC#RhtIoAMhIOj|qqc6tuF?'#iVr Y} Kn{yS)Z$*|iv/5ETP^F](L τ&x.QF<~LQ۔PSUE[YuMɖ*C]b*w~/#TP}UoW0V 1cexZf3<cm+u0Xwg,֝9PJgB Y2<Ö#q5ʒiJ ꊶh_[ +HVnF)H _rn=̢)-VIDh/}<ogvgI0
pߝoHfK˅Íջ`wBp!c"2XH?]rY%%:ZӢ()߯r%jVNp ɫٟێ-sSCǶ./* +(1֟eL%(:/47HCApR@up[{R1*vyoѽU tX +cx6VlHNFBN7- ×5uJiݓȺ6zMg 8v)69GGHE"6бf)> T4Nrϩz*1]T ~}"'fd`k(I;rIB% LR$%" p} 2)3 R]֫
Nnww v8f*/3( ۳ $ʫDcV lKNh֎42١Y6*{7Uv߲S\ݦ
\ NKY͞T]<I7F-1L/煤E%.5+KB+yhIBvW1U)u5I,7)ݒ59M:X<a3A)xD +=Qv877 'S&h_ZKpkF R +6IjbfG {7 Ghmk:߿;۔h.?yfH,wAYj^alh jDc)S*7hA[Z;hMHD7FXi0e\B"Ֆu(WF**0dI
+P *Cr@ "@ȡ UoRgZvUCa!A+ rϛWIW 0zM:*(u `aFaiD^hK Q`3AKر]lgQ1eV<9 =ٚsԸ9TY[1gkݜ-U49[9
X0#T̡E˨ %| V}Z 0 iJ×X5i k-\OYWz.v';V֝)jvT<1+O
K'e4S3̚FŜvsjgmͬz_ +HW[o~ϯT5M31- +ŦcmeɈdwlpϕb:<<<|,~ƺMaRӱ+1MҚMi^em ^oWq4YHꨋKf;TEϼ|綧Yl6)v>&i +JlTٔs)Edh تxQƽ7fg7`]dL/j,,cEe /*ْ{MG{<>Nj2ɣUto4a# |8з<:/ Y)8 E%8NiE|F
Wˇ_:St~
2znmL_CT7 Ai =Ȍ:ʨ ƭYO"8ઔF,|}WV\`k <wGp'ȒSigY%)+ (2)˶j}K"A䷲A5lz.M1$0l,&L^NFyg; {{̠M䳇/l(rГ-і
;@J0# ~'ONS
vg1XL1ÅƷVG{3wN͛# EVDRԶdpi#M<}0r8,. Z{">sJU|. +G:@i͞@)#]5}OgM{n.WυzUǎ/.,≬h\xÆp썭m mќ0 + +9=zm?`!aNu0،7 e6%IF Lév +$~sK0~o($H+OSO b|le V +!E~y`P +|hGJT4>Ja<iD8 8g +F/v&nʷ]{x 9lA +-zK >
jJ |mssQ my^((4^̰DD 4Z[oki\[혈|D|FΝAOA.j)O $Ӫ^2h,?q~6N$""\5oS3Wd0R5 S\V"po@æE`u`QL^3:˄QI/B:ktM}憧#}Dǎ?vĤwj!'7QUTyz<4)5! (KU??"([=3rK~3W%莖4xZ; +iZ* T }1gz0>#D\C+ZTqg@S?<]Дƀp)Ă 6+E=0}́wq`Raq +bN<Q: 6K8 mofݣ|k!*}1,)c"72#i > +qUH] 5i +R%
e^hyxH2_5m 1_G 5C`˱rHήd7ceΐ3C>B4:n[\w?]q ì *X:L0 t!`ʷ; xT"y<HSuJcqF)> *E腦"zF|T^J:b$| _;A4N6?R + ZW3M/B?24|wM_ tSZ**DdxA_NDO,0:;' ]tw B;Jv
9]\g{3)E#rScJ>YTt r20LQH/ݯۂS&ʿwtDtu<]=]JȎW3n `V9i2t&J0FOHYxtc@\3 NǞYk\ ;C~)˘%w̓CBtHqp +8ASx_ +%hl@iY*\,W-вd2 ZAIv%ׁ Je*Ѩ
T(2Q۰HU::%gi%ý[F}Br}udv*i(IZb9WꮌWCQoN+] fAZ(P՜.:̌zq0 +T{2DМ5ENku-#@Z5P!l\2 C=e=ץu%V5NH#;ƫ %vE6Ҡc) qy,:ЀL%NG$su$c䶗QҟFs?<XNOFݳOuJoHBv'cIC-ॼ A־
`X +%aH{A _F + ``⹒Ja"<M2Z_m0nOCq` +Hn_13p7q,උ c,RSTE> ~pm(EaΜ,Ϣ8-KQZVbZQ ۥ__21^Yb$RFe N_oEa4 á>E +K_os檌ʬ̈ M^Q2gcKdGkMEc-'Ã2.pȞ߯_Q~wZݚE Rިu/P(t",R* + +qQ&~.I@R#(tsDzN5;?sX dT4T30h%Ӿ߰ǚmj?M筚9KT~ Q Tu2 Xob,D\FPm-MFX3_y; ZBeAKA/HBʊbpX;p ?zB.XI=,J0（r'n9m 5EJ`T\Mn+0K zL?=^EU>쓴8{) 9sgrþA 'S /:ruYu XNM`MEDŽ & !$]զ:Ǡ7l .ɗR6w&fJ%W +) +4XǃQ=.0 7 +/#0 x69'iUaNrj(9 @5kU=]:\t!<S`K06}'Go(2psPC1h҈7~ې8y?$ض$==_"eQ?f`y,E %tM
(g}7s+$jjTEkO1 U54V f?^0\hs^Ne`z/>7dy4Sa/˔陵*: a?OÇ! oy͎ | +a=L=y'@n6su9|*%W܂`- [^6E;~G^<,dWn>Stn\a/¾ +лlѴ3VA4hAi^?O-c&r5Kw.v2DM'1eR`aSqǠp V'uӫ>Վ)T"PʝBZ"¯:)i@VgjGZďWUAP)a6CR<|)p檈J[f*?9&y*u + ]Nq(K02gnM"!fvږrj5L?( QqX^Ja"mT48qujٸSu\/ +ae B?O &=)@Jw t9a4@b2[6ͰV 7Jp:bA)M e.ؾTZl#EFɸ (i/F/JRO-] 1E7Q̲>`Roqн\ r 4AĚ9YOjm5D`*nht, 4RkhZuta6D8 1".+ +$L94tt +x8ů Kb1c+`w<- vX0/d\ho#^9g<LIk`*Xwm c# ",Z #*a脐hbbؖRB7f4 @
9%40D;tP +Uo|Ux &G %j odi
ALen +kў56 2ˉyB +60wt9?L]wԍT[*nƴsLN%y2K r eCZN [,oJ X94x&(rJo0MF̮Sq d B`o`o@Uض|5@!%8fYfKM4Lj b=$kuOx%'(" CiY\ 0ܴ +|xFo1wTu{B?V^;t +5VnCPn5`>pO͌ȯ\0+Wq0{RXU^J>h +
z,u=7LF}cy0*qS}H!-Kg 0 wemPq2e2&_COzÒ =%y&¨&2~6(L7*PvJ7[ÿ n<tՂ 6C"v'ܚ =lcTRX0J⼟"@ꅴ>p5#ؐ]m1%ՌO_BKmhtM&MU Y+LñQqaǐ6䇆aT vX,Z\;#IEU] 0 ekR `_v*mT
xGv{kÅb\:SWv$! ++:-)m^KS\}p2*+! X
ހ\6SI܂ƙIg6b*(Kh7hTOb2gA/SF!N! 4ap`O֜8ƾV 9fM+QvIQ sį:$ +4jUr.x0 1Z- +z `
s81Mm` +U#$ 1VT 1
c9ہhk5 fdW÷J{EZzK9 ٻ7Nd6$JRFE`h.;=Hs+{]\OΈ9d#B.}U$8E/;V |Hrdcuwsހ^E L?_oJܙklWI65Tr-p?e*-D: gT'b. +(i? +HWKo7qU@ ߏC/A 8Тp@qdǁvrgWk7[pf>{ش,6R ˜6Fp!\/rP<l!xy<91Lec24/Fz" %,sXzvlee'%{?_,U:\]w\۫qnC]Qm"m0H|f<4]5pȌ <tRl.,Q 1'U:v/=3씝cZ&zNEn|iFXfݼnnt,4VJ{xE͍0pXWUOng7] +>{^*9"hAxvhK.cپp _ +<sw3, maL!B֢Eʳ xRzv^QMQݱ e*+-枥q.6* g瀃qgS:褩 8|KI]( +HL*WsG +BϕDjWjv <kQl^O!5jBKQ3rO\Pn(^!x ^#<#` ^OO7x f ? +W(O#w e,5+M0#GÎRYXpUL(ZO
PNeI!45NBz$(X0#Gtm +
s!x+ feߏ[7C+ Iy+#)*Vl*]f~[;wiC0EX[3q;|=\ +JN W/j w4{KɺnR<'=bq!ztLjU[3v"E g'}Ct)$hrB+7\Nf"x 3hPB!xh{PR#23rOIQB!x*,upiC2T ud2kߴ^5JxG{UW<FwD"gCYypVKO%Nl] /9*P6 %vO MwL1bB
)MPNYO5Uˢ8Yv ( ؈D =13&RɌHa!S )7BKa3 +vwa|^nbf E=oXnQF8XKp+v<&F7$ ]QJi:1
h| aPI0'O(ȩҜ(Eߓ=<I`S>I*y')ٺ0ˈz O miėχX +HWr }#WU;B>yu)J%qYRhJ+IGN9ݸ f/rJe/qh@GI97I>
k=jMImoɯkoG"R!!}: [ 1xӿW~tw+; 'Ǖ "3~o_;c?~Ҭ9 ?UݔUoެ.:Aݗ6B*a;V8=Cu-| wr@hF=hrF&1qx LiU`Wrm_lrBZ{n| bVN';#Np|Ƚ/qp ʩkV S5 + 9O&W^RT/}=pԨ]4'a;}gmɻͿߑ~'! A |m'읢 sʹ =
i1=̨H/)z5s2;C` A[ 4dא٢v3 /ݬYd4\Ҙ؉9|DI>P 9<N[]so( _7 h9ԛD N!g[!m]K9f
[;=^?"M)%(3E2┉Ә Jd=04Nv0ں fê!pLYC-YwQmDAECry[Lc| ^46-!}?p )79JF$;ڱ=ۂ2㬄 +)d}g7<Q <MGoJ^ a)J#R|]K%#{GI6gt?+ +1¯mnѩz}fMgNhˢ? 96MրNpU<-?%w\HRI:0SvJL + ]+<2h3VY4ZY]EAs`E7I͈CLK8ǑTCO b?ivMZl0aNNHv'3Y&= 8i^y]È^t830
[bǷxq$pD oǐ 98@gWޥ v2NM";VhAsZ\HPEA7s%̳z/沒`T蛟oJ+` )Rw?>|v;Ds օ +>Ef7&xR#=<:ʋLc qo '\@ĭmOsfr٦\4Ȼ2. _>xu zŔڼ. qsStFͱ5ĢW=#*e n+bA Hqib)mUBI!Ұt J>д;3O/ -0vsmЗC#bk [^mVkt,#^>a~&-E{+ag$f ,#hFfԋ=EHiUҋԳ20g9y>w؟,:66zvG7f0&nv mg + y_E(g KqYj*0bFhKG`tR-<A7!yN^2 Ɯůx?zO ||O6vr%c_cm]WP}Ka9 YQ : +ʺ;"Ո-nw= jz0t '(`1vNl(R~=ͮ֏DT>6vu]ހ`_ٶoÙ[o`Ѻp܀#( <<,'ࣼ;[!!ߑ2F +ɕL0\A:9(K1^,RV}iG M<!o*^i{[\SMj{H R7)J44 $ +f0ڂωۀtPf@*ޮ4G1JN+wr$B!Erm`&w& ɋ&Abb^@,o +tWY0pAwNsLtNoutC4 vGRg >r58y=ӜkW7u"`W ɯ8N5PDEbf GI>egXt5nX { tK-5I*}| ޙ]WKP-I*f +\lXLrBB7 Go3o "JP-vt5,Kɬ;(/$$L3hg dw +%%cuҠ [omWrnS.tFFK0EipõueHFk|-[!Xh^/eU1*b$A*[7+ҩ+Fh ',Y"AH*6X:;O'9frE0 U i^Cn2 9#>|~O زi +%6 s +HWr}ǁ<Fǒ(e?\.)82h*ަ%sn}e>NH_<0'l|\զ? [}>˙Pl-{7 ]mg~^ 0LtLNlN`ZH㓗 Ȟ D[ggly`_23cKvnzsx5\ s8xN&фN^^ßLss; 3~3{xO< ȇD~)1S#l+K"rA]̸m2˶InC~Qƙ |Lo=P*C̖ +XS<]2.fȘ'ꘖЧ[PDA( I=$_檿\4 ` -e:[ \&oܯf /v[C{a{E!j{FgzK9o>e-nar6Weʸ\M|L;8MU+`9ûբ(P-)3p$͢9&-wY J:۫ mY?$ 5ߗ/zV0/Aʒ SnLe@c ӄ>s w ḑlGqT7efMH\ܛU'M' b籆i\[> +kfJ|@Ȥi +IdsuQ D1c<9Evk 1 c@[M.fp# A,=ĢR H jQf Kjv* c_e +j̀u )bYGD47@sy )Z *APZq&/A#s'i!ZC +J[8CAĊ̵c@8]5Q)FM\oϰ!V65ǟ7um6%+S ޛφE +u<"B |YV%G,Hnu\kOϲ$Pi +Q,OHWoTUvM+4,%ĵjj?A `aI0'@I#~WiD`@G<> Ju7`(8!x +HWr Wq qDZ)ұÂhR PXHٯжALNVguuwU`q0f2Qf'&!d.o6c_6R
$ड़.mtb'ϛ ǯ0zz7q +!p)< C54
9i]7OCz +c{ ~_hQk ȹ& j+S
.NM:X?\~Aqǻߒ$/6wڪ)½|-^BlW'H {>EԎe}j *2*h,@?\o~>]|!4 ܐOȪ{z} ]NcۛX ȁ.G:HT=w-6> ZBVB+she +ϡCP?=n obj*㰕cgj s9!r +Lmmxؤ]C~A>fx;~xWIJL6)?F0ɠ 9v) BVJl>!1!*IzX$o +қ5[Yҭ|Zthaŀ&sQNN($ ܈| >՛]Rs~dp(ƫ7_ lTw=eMe1ņT lFѨ..!ʆ):tBVV Ǝ#8?>>L|zR8MˢnGENϱ"|ŊϽ !j +-XxŢ2֢ }utT$Z" [ +ω?9ŊDBB2"йl;q+'!L&@Hd]cE +{"<+?^ic3YF #s+X:v9"ШRr(NJ&;tWj:R@c5CjJCrd5qHm^QGjf} Yx8]iߓF'D R"^ZY߮JG8]`=_ϴ>!7JG#WrUG^7͵>VI:'_; I␚Q!gV<>qL+[R]"Y#Iq~ _Zykm +DS>!y!H ݷE3k3 |bRf+ds>P.+xa '!y)qռ"NB@3 sL Ħy@뜄De7q 2WPU- XGF)7Skz&-&ܸ8yb8lpAse'. 2hM ިɭKwIW{ v#ڿ_;cOIXiW̷8d O(TEnԪbX2kq&!h30#-^~}$ZB YxM ҟkJkg#5NWU# ϴx-Cj +1!TL|6RtZqLW*U 8]V!,n ҟkJkgCj +qT*f8]+UoǸDVC^7ϵ>V:;; IZK, Yz8]gjI T^֗
#85?2/QAI9>UE.#c<)5+XUYY&χbA:7(7 ԣRCjS2(#2jSLJp>? UI6M:doﲽRkb.e+ %bWÌ P˘Uqܿ~ +Rmrz-zRkHI/$5d':JhiDYNxW=b,Me1e=uLk:O:"}#+@h R^ +Q~ efI15QmLU !5Rƫb3g(
qlz%mnI6L *b+,w/t#X9p@`VSG^j{'ӯ7>qH)86N_opljNɑgZ
D RkwJ86N_oplNɐgZ۽DV Yz86N_opLqH)9R̪qL;~Ꝓ!KZ͙z|4cMJ":(6ӓ(*45n%uۈ`R)N!y|]WF85)TY %w.I#gv1 hl^%w@K7h + ܮmh |K=!<Q^s@|7,Z<cC*H ݚ Ibe,YbL 7-ST6vYb*%G
؊jՌi t2ULecWUWL﹤"cqY1yZilUDdjTK:/.SUd$;Řq%)9o* +7)xilUDdjT+wl pl D<HIOvOؒhZrW"Iq ZIs +@j Gq[xi};߮r;ݞ? m8&qyJ>5甧cԓr 0iBXyvpђ j|6 ߏ' |~ Kpi&Ǽ
H/<tXҠF bBP2a\Y''yM3= 8[|,#>&$k'[/m#i9m#i2R}%2Uc> ʏ_Py JY#050딭T M61=kk] L3Y<7 KTvI` +HWrF}W#eKƛaQڤ-D II@ER)_}{ b6/$f/ϼ *\"l(#Y_8Nz 5}==Χ0iT&翄06,g7>fƚM M5Wz^bc X8 :6'ōaMS>6?5} CE `D7oI3{1C[|b<51uEeGH6!OĆ"k'$Q<D~u6aӕޝ.:sVmltVIOaEF6ƉIz ZZ.ȽWeαYZslx4-RN ,0f:`!u^N=lU)?QD nF+y&|E֤dA"%6&sߥ[ӌu[zךG3y#
ܡ5ÖE"씘o
+Z-lݝjQ @Y"\'2!㤂2 ICTw&NZk2v~@)
㝣4=y +(ֲiR}Dg? |~ yAu
""{٧^k<5' džъzHHS Et)S@P$EK$k~!Љ(%?`$iΌ +Rxf\5q[M%yyYLv^gːpgaOd=KFO^yFV֜ viqct0"հ,'B9D^.Ne$PtuNEx ( +P
i:jx
ނ:s#/~QD 7t.}VYgr < +@PI#rN
c:Z( N,٦*7N(A꼜,v'/[VVi#aR0% 6jy('2gFGJ=jO(-S@q@AsQMʏp MT:m4uw4]O/xnKwg2:BgL +^*I*N*vTYR.[p+=iA6j
Q6ީ-_]u;у W5L+`:nG6=ZMA8Xev ŹAb㱛н dl&y֒;e}R8\=q/5^2Z[7cD"o䜕zJC9w* J~uuKmFO&\|ZO ǟ)QCb9?ShKyuW-QTg<;WF (umӹ{/ޛI{[RhSܬbn C ZQ +K=:/8֖4 +Ἔ,4:3z '9?H XvU<)?"w{Iz5z)IyW[=S'U xf<֨ +jбpF<J/ (wb}G.m"TXugT<]U F'_ U/NZ49)W;=%
QW:-SX(UX)_j6c} q.U35xVA($܄uBC'zs}(H[/?gZZM6I I"Ї*ۍ놡zttrKq +ܝ,O4)F/4-
c12IFt2Ի +@sc] Fߔtɇa +ç*t"Z 8,(a 2r7 +atZ4$#@m
rA8gSdɡx$$p +^o"TO#w|ZG +HW[OG~JҷJ,UȁK yM>\f6خ4Bxw̹|6gS.g\b0Qb>iUNbz397'SYDlNG</YL|M<m,F>6msY6m38Ok:ir^ iAB([ |DuÙjH0l @=]ʨB#& ,WQS z^]m +Rp=U +u +nڌ !6rXD BjTfY9 +_X9I CeX +:#\b +Ư-ŚAi^96NҰy
,ʑ +y-.(nW|Eq4s\y2* ?<`;"5Mj#xx"{M^k/D^8úr@'{^>8e7QNq:'䆐)[䮺JdN |+|m-_\([.Dq];Ol +& ة}hQe#4o ק,<y`#[2Xs~WZdђ-(
TiK<7`(b^ a=o uK[|T(] }#W4B#R3f=bǪ%X J Gjęf$EAjf'i"YZ ?ķ5vbƠ&9.Qn?9%t0Rmi+\Iex(
ق.:Wy2t"Oc`:y,+uuKqHepH<2$[<cu8 +МyN4!˴Lfe]巰wFnŗW̅%_.q:"y. dNj s r 8Iy2j3@a=ͮkCg.w;!gз{,+ Pt!^`nIb*ox9P@/eO˱ݛy!2`v|yJF/]IE-[l)%_ T2;A +JP%;a +e֫z@9[ب +[.nlN,|z"
+Lb~i+v0tN t +HWn6)xZHI lR==Bqc%; mm #3ʖδ +a}jQjVi\)U$iv-2/lnr/ma4߉6@|ۃ>.yjGT,:_ܖLE9`Psiky l4<ӕlɔx
S!5Q;ģ&5J+m6/;uUPj0:棚UfZyviI,?Cjcs`ည4l@0D л̊sxW[He#+V`Mprq/dsyEA`Hv57GEQT5GÈՇ1K HѮ-˫g +ԓp\PVd!on@m CXEV\]2d AZ{y#Y#8^
(l"qgVM,yxZʝrgUP#U(>$qXo1wC$wPehZC!D;b6mCwE FTvwv0h4 Tp@7~yě{q߱x +"Ru|EYMq|bMe:Iadzǽ͘=!chG:hny(-15{tl:fҙM7ղ#~AA= +)"w߾R# '-..Q$^)dc'Q.DO y*xv}}!cv=g$2_%jd-e&^b/GfaNZ14%F + Ot!-1Hm},O
^ \ 7:RSmheEg)q%ys,c 9yx +B!{pm {D=YxE(_+}8* =zpϚ!clSIte bX+4 ~>k5PR@5êr\W JUrn7{JlwīIyϣ&aɵ4v45=Gz.FF ]蚯 zV;%Աײ,X'pz qVCWt<q +`ᒴ^,g{Ҽg 9uD$PW\A7{c. '$\4f8 p].NpG8p*7wNp3 #f8 wQL; 'Nq;5'#f8]N6w D{3 +:5ɳf:ꩳQ +S +HWn+jY44o +"#ـ,! lq)&/}Vz",ljuS&˪0KLi9sy}" +ȕ9.r?\l"?I F) D'ؼ;l/2t<X0Z~ +9An?7o9*2")0)Dԃ +Xt=@]lSbo՚k*-d|cA{K8֞vyP:) ̮emĺJl+7Uf$G)WRԕ!q"E@q% W ;h}{u0n5" H;Gyas=DZ +e-0!+,z0 { +Ft$z^hHhǥ
}`';Mb7#odzp70%vICA6S WnsX"M=K/o
{hjqLNj75H?t;(c <mB +J鹩L<)sE|~g=i:Rڳ`7|Ϧ|{[:-?zs .yy)}V +$6u,}ԫKI]7?`NG
fK)ӷٛ|7Z !j&I +D/&e'mxz bIKru)F1 6$Mfb4?xlrx+ WEbᄭZ!l="[d".w7 mzfx+ke,#9:$ +]Ý:e=~ +F̼Uf?' x ')sxh ^{ǃ4]+=2Ot4̮IߪfT{ g90GD$jx6Sۖl+9ڬrfs's%?e.!+C9HkDg# @ED"z6-&@tܘX ) hK*%'v'oCu4f* tl +FK6tbw"vZ{<{|5]KgXCOQ.6Z n;dV"U=|;jW"&34_|^_H2L[|[ mBQUM*압 OޔCVXYY9ֲ#!Z(+}xJ.+: +-ZtH fW& gzN1pUhs@Q
-M n+#+WŇ ]G1& +.*g- +,W Կxx% ]_Q!Rabۭ4:VEq7xҚ]pW-LgI5& {-eQA3Zg& 6C,@ ]OYkh%T LzxdN[obvF-o? +} > r.; Af:J?fzhP8VgXIc29 tݷ{^֛h SOaF@6F:ϑ\DlPod""ZZtI isB$:82D..ץP7[:]M/2 nSϽ + +MtJޥ!3B~?
]D'tەL؆bZ1 pYJuE+[ #/#Hw:b|;3b"W8 +r==MO*-َqv~tt
֢=C"w F=Ƭzwz^Rc1z(ܥx- >[$=ج;]
NnZm$ :y-Bge@.f722Ki +pi"!H>||Rfա9GMa, [L~_փ-1ZE~5SDM䮍VuAmnx,TXWz| `)˫.<˥\l$6*XB|= 8c4_تjz}&9<#烏W/M9N2$2X"D wVW<oGSnXtM[0vo6*u|NZץ6w.:T=2LiS=/2.)ㅣG,LWqC OnSF
)2
ēa6MU<*HT2utCJr9zNfun>[shJZ +HKo_#UUQ(* H v̢pl9 XeC{HHmmX$?~'/)lX[|(Z/f4|AEf^o5 Us^2o7|nbX}E7US`d|SLah'nQL}$gQ Hؼ +p (t + 9jc9gX, ff`~͜aLLnH +)&2?37z$t_hȰ YuV>3 +!!L*EgGNhDYkDOM~^_UmxHq^d(4J-P)+d5z!ÓþrI' bŠVuM
5%:c+uS}4v eutUߞIl!XRüv0C_WS\B?]ƔrP +A_f%9~qK=?B_3ϝ9{JnS$W^Rص@.ܨ[Yqe* jBjU +L9nbbcH=Ŭ!uC|njx\ +ӳ:Is]e +#c +U!VO +[Ind;#UTmiF
! _pE[m$cn᩿FEfZ=9VS@^ w0ƿ8[hL^s93fRBAuI&,;1XQsE$TdDZ [Lѕ.8@JÀ%'24i4Һ2d_b?_g>}d.+.2Q|b꧙,v<LQMF4OL HpY|Sg콰枘;jC^ 3o^ĕ?c_nqUM'<RLa^i6~X))i[o1k.
qVRIWT ("@̜*EJDs@6dxKD}60һ͑\MK4zOev֬, J|EēCjm.{aTI(~wPWC1 VuNE8L;.q@CF LR+U9?xUX8 Z6eNПOԝ j*J4Z/}㏔"Y+EJM겉eM>"`jeU3jWW3h`o$!ސ˂cn9cF3m5Wנ>sm*0>TCu(qo明3d@ε+' [BO"=?2":TbY<LA LIh2)6_//,Ljg;y R=b +ZկCMaJlQ80P%#إ Ŏl[TS#x ST F)쪞f3G)1RN?C SP;k&q)*LFcj +RGkHP&$| *&@
#`ΌQlaKfa x [2c [8cؒ8c`IQp=M3G#= 0 \czu$y _ +HۊH kU*]0ݐI Ҩmۋ-emuB1Z0Yeih:ɲ*ʜI(bkǛ<(mi֛.\&&?qyW6 ?!tx*>X݅2rpVY&pR9qTfل +>vν\Yd~SEUVe$ Y"W Q L(IeXEiЄ<* +Cib 1,B!M
9 +c=g38Kf,`c`R;~>39 RA"UcϛEUA& ~?]giz+V45hA-kgg<sYiV1sXy0ƈ|y`F$ |y|D +!bn_K}c-rPkel~ + ^wg< +?6[SW5B cZ'쭠ypv gJZ0v
__Pߊl;#1BPCLJ"L r 4hiO5 +/ Y@dekS2: =]c(( d4?QrP +P'> EP㾇WPJW8#}OF A^x+}U ڄx= |j'V{`o:tP1])gP22a[[!dڎJǸ"uPo'w*f1žD >`xHJ)=0d"C$sst[0ہLIE E;1rkH UE >x(8N
s-;( t! b`+j K$y;%pnZu :/TzdF 'e˂4zU LIB #ŷft4~T~<p@)x'\LݛQ18#tE%ax7hD Gc sg.I4]+5,װTZ/!}8K9ml"-ˡU9Nh' r{%,%0?"V`]-qA>pM~n!9EMXC=Ԃ{bmYLU`' 7&Sj|`{ ԫe c{$llե۰_E$_;уS78ׄe<ŘNk&_S=
~d+r yF{+U\Mۆy1,ح)hr +S5 ?lM5!g;\} +#EÖ =3~Qo}_m\H!aw:&4Jb'}=! zG_H_ *통/F~^| ܉/4gE1A6ܣks&_'MEtCCض4Vlwr
{ 0bt/GcVGH< +GG6b;44 '?JW&S=]n|%G 5)&JՏ6A=%/tDT",unAnxS]$llď#:ڞ 4P6;_P +J
ʱS ֣R|?,E;A'h3NV Ǐ.bGuۦTH_5K֭Q^}ׇ\ºH75jbͳ摇,i B1Lw '+잔";",;s 1s,ə8<] htbQ3{x^ޝ /WY;3qm@ʗȪ Ũl\v!(_hL;m&^[xK +G=4 ه4/UΩ Lq 9@bߴ&]H Gpoʋ@&b䢋g_%_%7*
+ hL 2zlC/LÞPz$iv 8 KcT] GW@8mRpp1rLfu}zÅfJ ,R$@}AdlP-TjvPG)qCVFq\xKPO1 2qSz6 tak (Px,}P䂗rp @Kܑ.!V +&Y% q:j ,n
JKB?.h +쮃ଘ + W +-IVDv+x"<u%K NдuWګo#|zM-)v +HWn6}WzJ(C;@ +lAQ"oS$()Կ %'Eqs= gt l[nlfW6$?̇μy\qr4`g{vIYl/RcFHɲt}.-ՏM֔MR2Ampmv˴ +Ӓg>UVK]
/9aԚ[!Hvc5g=6mYi~=^j罜 + Izbӎ9,Y 6 +5I =='5OJˊl +Hk4=!?JwJ&\?[2?e- +<V "D9I SlꨬcZ)?o#:/u5- +# \Oՙ3ASl|EÕHj +ee'ji"| >(.ɻ;]^C9.5%3 E,z 9 eFL bVk1>(C2%4.cxCCxw@CFIwoH}
&;=VHb! +Ƣ-!O ~ְ
+B v +HWj#G}Wcσ&}!ڋ,6 &ٖ Yx>/[Hf6x`wwuWU:UR1y*<ƪȨJFښY ?_VywA>י5y3^M0Zf`Rv/F=y@Wmf <_fc<fYlO=j?꼎u$eNu}).Z㓋A.@k +A7[D1(h}oYjZmhS%`M>K)ol˛n'x^FKXYUbnS$Øco =^3. 75=Z~%2r^E9ϚT#2h_,W'-t|: u؉ڴOm5=jJKyLf i~{:E$c <;hأ^zoA`%iDkEϾ[ߦD'wT*":& T=Q( +/+O'sy +Lڐvvm2={.+,^]tXNjزLJ%KaŭTEFP L4]uUZvE !wU%%QaX矒'G'MJW7w.αjfj6 6tuWlw5W+*|Uꈦ79tFA +*j$aǚ].Kԣ?fc_$)~Z8xg$Dt5wGW|%cXF ;̤\eb! PX kv*I IcyZj
$t $XfP 1D qmv ~k;{l'qm&;{l'qm.н϶lvN Ic[}wN "]&wdw@r JC5$gY3t6VCgF}x_ +HWj#G}Wcσ&iC a^/XLZk زOԭg$GM`CNu(翎)j :Q*ZQ]յF-濏nMTQ}(Ǻ]nk3yWVW F?Ŭe {X$eT%<y"C&$ЏFFc ̬L
UV%@0j+uM-yOVd]\.]~'d6
,XzDzF[.:;]iq4U_e_SrdҩWOU6- Ȕ$|bd![dvyī-MEb1D_!jS#(O#dP( 5F\7Iا Kh"Ѩvv%왈v^
Kro
@^ xGC
?l[X +<(,Y\rc5osT3a@5aͨM aVyDYgĚ7缗' > g>M/TQZSVa +jD" 0F+j0BP5nJ<b{eu + k +tI's@s ;9$ ;b BT5 V\av ;HSH@ 9fW^ ~! `c&~ 7J SK{>OÀ5.Ռ¨<ۀS `U_ya8>&)uw ݷd Tok$W(<lK7F8$+d/\thw]TݖU6e$VߞW? +UT˶Bs|"\H.áC|HlFg=͚=?11$[怤T+ 9 x e`}C|U23 +
]!DҲಘ + -+nՈ|ndS{Y˾ò(/TNDśbt7:p +ɔƿJ0xOlj2_xC%Vhğ"seA5cm15>kpEnHT]q_ytFsm :(N8 A +\e.&^_4e}+#9t=,\Ps %+1HeJGd/@ dQN x\2 Ѝ"[8ݫdw5B5 m|35M?~ 2M$88/ +!?O +HVn7+$Mw +t/~[4ke[OɕaN0^XӔʉ + {r:~P#1X 8V< +x8t(; kQ ucPF0lW݆ jm=~k'쩬fH<ߋȲ'ۃLP]k=PaInevePey<_ޗ+yzٚ#ӱY/?.be:[4-d_ 3TB]( S jl5 @4U<tmn\aK5; R`jt2p+X lz. ,* ):)sS\t0o ' 'b9OU0-WMVU?:J@''x|f|,`iiaN 7vd30=0 izvC 聁F!h$z8Sxiħ.fG1we`M@6%rvk]2yEzcK Miҧ?}* _ =)M6y4! M 4xe]J[ 3 zT)[lTgؾm*j'Q52d +DH> 9E]BUS>MFcuՀ_
US{J!'Oj4<bm,X OŮuS+<b$ +X{5ɻcqU*<+ k +tY0*k US6MٖP?i&m˶0 +HWn#7+x$Msm C h[dH%1ߛ*.dAfl|]UG3*g?fR[.qR$Lp۲xJWQG`^ cnj Wxfwd5X{b-~ l1t^m\<[ \hxr \5HPGI=}<ϳ 4C#Z t1Qi -$4ϟq, {.gGUmъ5 >;ω[{ng !Aɍ!qkfOWP)
|BBneSt
斮栈vB=ӬUz5-}%s +6vٖ9Y?H{#MOl%t/ pd˲[.r,-~Jypb;pDa 7]\ZKCm".*!/ P_(,&Lt=LW˴+y$ny4Ai0S2=e^a|OB 4}LMNA$G/sPW*fsP)IbC 7_aD[!$E%}CX(1Cݲ<pOّa{G(!][u\L2[<2 A)0!!YU$'cNC47<yڏ\a~O7,h:t`:l:p-%lo LG$y+% )?~e2q٠'C[kڞ ˛ѡ +]뮫mݵuD" + +M#%؇L!`0~%|)gwՓB{n2pG"x$tblM1j'm夭~6g4)[eD0'BD˨.FK|3 +,F`iO#J7j]k-TY;=#L]k+&. Jdž#r2c3GŔSj'mͤz_ +HW[o8~ϯ#UR$u)0Ifhb \KNq̼쿘FINbu- +4wUU>jpbĤRM'ښ*f?T6i<,}2dB- ~7UzުvTz6?O +U 'dGyRWk ,B*`fշIz@tN,x&֥V,1!)`CTޓw +B_@ 1 8d9i;FLLi IL7LĦ:Yfc~)z<'h&c'ӖN,V: +K<`D8pSA (9b,VA)PBE*""Rv JށEPJP|GP|t&Fӿaҙ<kXBY >R=zF#.N*;|{?j9Dc|-ZM<' i]ڂlgsuvH[Xds;S/(r- VC m~Ѥq}ɨKB).s +Z{&]J I0>k 9S +Eјa]Su_@biPOC6R#w$@J_o"C? _5OQd*]W䁊_o*XYfe[y]Od0&8YnOu7<\S-@ߙS/*r7:s!s}9<F[_~3Zeͷ=0)>ۧ`1q3 (9 +_Py1p~YXW
U:ENgup, `mZyScSx¶N!<1dP!}?d@͡阗7= QN5 ,qGtv(XTRo@+wB<* $u ,[Z6 >?8Ii^AAކG< G ~]C}Ѣ̳ -9) `[@eU:b5:f_ ;< Fya0ވ:50Ӽ(py $]',ĂX ׯcË^)g= HY a߇ߧ'x&M Up,2mNQFfL#R#b hŐLޛ1`1P& G#ihCJ}9&uvTrLW2:&
GuˠB4h(a +HWKo#WԱge{I9ݍ ;dSdLP|_O=e/Q]y?7 88}^0|y+d8| F̟/~t(+7F>s7rQfwt0u˟&q|?Pv&0ʄ U"!UqMc4*SVὐ
`*Mo¥Y + +:|O1Ά?)"5C FiU^`O
J GQ^x &sgTLa0Z}5@饡CVz"&in9-hksS,ɏhr{%~J)g2q?L8J7H5lhM֮yԛw轚ĨwhMT_^Qׯՠ WQ``J RevǢDk-{I'0{y %F
q? i_D*vw'VXT-$nk3fki{I{2X\ۢc mTlhM? "fZB(;7^cp@{d.g-W)Zj:P@lf#R sEXttg
R8,$-)I5d?kf<=VČnIIeHI uj| 5)e~K̡ S2t=LF o;DC r*N8+L 1+htv*1G^RW F'(rY b*weH+LX^;)4s;i942
&2gs,FQا't@7"3b:8f|L ēQ0>K\M}e~erD( Lj1@y5+eBsφF +'uav+2ΎeЦbCs®8;i | zӣ + "E`n-5|{Ďҧɜk<ß.$'"H|/nH/'~%g$Y& +HWIsFWtL27[SNg"^ \l, .V{KCTn)~{_6ύsSk,5<MVfExuf7)u^$imJ&%.Zyg/fyyGۻx^'e4S{0og zV'WUME]$y.f%)j>ɢmk鲎6l&6\Gf +9yd*V^sz y⢞Y,NygT(Rރk K-~FM
s.ĖMl"+ (YtVr2N,v1l
`$n+_X"⣕f .i:ce9?N$#L &ݽ9 ѩ98BDr+fP狿Up{qf 8,<f7}?b= `ƍ6}߮i4VNrJ :h֣0`1QF k>n FKd7,j7lZ92շ iKaC;nL ?fICp4md#)3˨WGZX4smH4^ J*6fT{ 5(pV8`+'ZD%QP g Vf˳luGanCؚ~ӫsPlI,y+5ׯ er vFV3LtKR@,%YZGmP6ilj$MW [6V%cwÞJRxcT뤎3Z`fٍo浄fz1MN9s"a?ʩcP<X`gѭ .a+|i?(Sy at mDբwx?h6h J ֢Yrx`R#NA$::u'A~y\ tp'V@Pu ,R\=q#
eq4}Oeٔ@QYl{I/AZ(RŽиT8*h"[+ݺW|_!U}R3F" wJ6e`e>)=#^SNQc 5R@YvBî- ,sm +tY^0.˜9< +'´M u9TkN?0EF|<9v*yjk] +QyU)iE +36 +?5ZFC+.HH?"O$O0D5adwou-bѨ)yc +IP0w훀y} + skG;yQŎR[:fdpUFNcF>{6̃̚R" @|o| +{33wYjl _aq[jV۟39βJ23.f)48@ +R\V$%˲2Κ^)L;s7 +?$z]R5W8пHEYoQMnJhj!$|gЍ5܃+DC( ʳ-rD _Gi(A%QI^&G;r_iSˬF{CD3(HjhAK +-=uqt'ӛIi QaϡGJULanfkzYP:s5BBN7N}7\{wV30y`s[ڧQ[!Y"`g?Ε\.D5*Qꭇgeŕxr$e]" [N}tܑ ̫94]?S\S kp:8tPRyG&$/ʤ/k"u_eǎ+fm@WwҺ Q-#!d{*Z|T,0yU*,Fl T7YBK;(`zo2;^^.?س5.'J +p. !<isߩd0EJ_~ɗ y YH)X\P (E SD|EC HraHmm +r:˘=Tj9 ofEq`vYGޞ n*<~&# V/#{ìU/.uv,\ +ӱЈ:[vZTkyF5mhҷ_ S;`%P ?xzrĴ|$p
1 ] 4`Wד˩ { +ګ_r$4SdGAmWXm!h˹ d@<aXY%u V lZE̿b' )H})
Iڂ`]!ÎF }n <Qo)b)3zɨ<E=K"#:E\<2 h#ja0C}#< `ke~f#d9 `E$Ej>";UG =4N[P|7AEXF\Ѻ mrih_lQ"vB4nVZ S6r=lB t|s= + Q *PWr]y0h d"Pg~W T `?A$S&jV.a +HW[oF~ׯaa2 /Di +YBP1G9sݍ <B%Zm=lVڲ oEVWIjrh5$-US6Zǯ}RdF_6_AEv/ ?a-KZ' +Q^n4_&i Oonxћ\2\V 1dS絸{_ $ԫ G +>j O=)8ef,='9VsK7Za؊?_3m1M3U{g=y̾XV*Led?,gE9ek(mY| +Bh\1Ax!0V 0ޚ< \ (N jw ,,T0a)lpnJj4d#ێ +KͲU]|GVx"#4[JLL9m.upr8B+1덂?p8 +gI&a{X)W pḀG +. +UQ`8SJ7`30nEy/҇=\G|?݉&qXf7O ^ +#OXH8YT8 To;8{_.ּe{uhC++l:Fo~[ R̘% Y!: &[ǎ[ +T%T9S[Xigh[[Z>-1/^cO />27!_eYVw i!>9߁0 m
g 5j`J<,O9.: F8B!F'|( I ȀU2̘1ҟ 36Pސn#T OϜȩAj;}Cu
&A#Ku%_ fJҧ]KwDn9+ɮ +ِ qt В N +z^^C=V\AXV 5`G3x^%XJX š)W +j +MMx ~[~c(b˷Xkӹ@g, eNZ,Q&v8KB a!X
/#F=^Gumإ:U ̀KW& +dJ U{ gMZ;WUEUMS~\7k&u)]_Oj__Lv\3'uIfUu\_ +HW[6~_GkDꞷmt mE ˴,y-y.}_slϥXl Ge*I¤^Dj}1(2/1qp煱*gaTܘ LDn .fWЍn~tCJ`&(t} ˴LiE cHY# ,~76H[žL`fXW̆Vaqul*8lY.T`,\h'j& ^:o4̧G㧵~LjԕƦ~uǟepڍ:Eڭ`VºD$IVzT퍫nZ;[۬qU1=FnZU~ +,t +p3S-)I +a Jc mŤ}!حmuLG=b t@ +H [ +kyib *E*f` ,^;u!(W-85ľAN=&0Hgc.! C[6]ߩ6b9l ݁~F܀aS ߠ5[TvP<mub*xH\vUq
ܑϹ"'S ݒ3O+* ďIZKp?KJЭm|~e%e5 L(| @QNF>
Q#K
1tAë8O<>!}e2HtaY;WgΰYeOKP"c+2RDd~- v+:5qDoA3I sVy~`=vCez{^x-oF'̶g!wHPEa=3~vӻ9Hd =^ +N%ufKU +! 8ģ$b3k +n5X'0;~ Pi8kV\FE:IyX1P2O gDyE?.?5-&QJ>ƱǔA:bCNO J}4;L6H"G_FlxmM Iܫ899C}(c(I2"sF!Zޞį/g돎hG<o)$x^ ԁ.PgRKTi6iM>]:0֗ֈ/{ԩXm0gzTv2H' +n +z2jIh?`BcGi; ~eŴ^|x@0^/ a;W)>MׯwZ?MVaن6{CEÛUu2Gq !vAv뉙uށiX6!f(2tA";Dhjx> ֊?^YǦ;F: KBl i
!:'^70r2]P~A롮#!F2ry2]46;Hs1je2ry2]0+#bc#!F$5dq(HZFcTbl i
1:'U E&!(0 b>ctOA~7B b R 'Y*1j}sfIJ
HZL&<03)M7ךޞJx_} >Ѱ<R:Z[n[[vej[DἝ x^Qdb$kQθ*p +wQ<6)χ7"%G"W۟WNcXq^ڞ母4e"&kHɀ1dfgKL_!DF | +Y!Հ!y
s2Lڐz tg_5| +<'cEH_e % U7t@"Ig.T$PwʺQD1P| OA߰d@KYӫ:feʦ40:l[5i/xʺQD1P| O=IMN>ϔ3uG$zR:rkD1 +5$ƇlyJL1}>O,'~ݭww*gv}u +HWK8\3 2 M2 :Y ԶƖo=i Y, eb&O SVIV4H4/p1MC0j;,\V&~s97WC?J;,[?.^WeOsI|Jqy9w")mgnV'c,InWuYӵn +*üLVvT3S}4sJ
s +8 8- D` բнdotӀ*KӱXN ߿M( ݈S̡S3 +nXזV:42tꮯb wC$$hJ|&(҅' W9t^M> x#mHM`80bɊ|~NT[z$IuI +쬀YwK(_q{pqDi>Q6 +]"dT"ؖblOo&!n*Nc}muU g<0fPy+\ɪ1!N`ζRLxL{ƁjԒ RIug>;2I&[="^ v|XqdUI ?ي2K6LzLФBL +aZdK rSO /? Davqڝ>b{+[82 WԣTJz^jmV"6E-tĖ#{IIL:
8;霼647룖$ QO$!8.3Sp +T8 +4N +%]Vy d|2^doDl=zyQB
xO^YNEZy8;HsV*Rк5=gSЫ&j 5 +NrqAoeVnЇ9ܤ.RR%nN^e+ +5mb;E>W;kDꙚ/BuEu\0 `<;y @_]y˫TZГґo6#=n69s|4z#-r6,-~1,I( hwI`4揮KlV +[(H<ɘyCd1@
Sb;+QWf] +L$GECb*{uwնD[ya/͓vb7U( s8 @fQeٟY$16ȏ#٥<jpS_A':yݸz0
oɥ1ҬQ_="!ZVYDrlxb"(LQf6kٷV,E5X/T`vՍpC\9k;U^JBWkğYC x@f͛B"5i]Ԑ +>8mJVʶmg?I +`h5Gf6"4J>bVQ[4JI
bZNCcħo=˄w19->҅ +T= d79aTegl~B'4u>jgwb&Mw+f"ΌM?Q~OO^iAo71֠1Qچ3Yɑebֶ+qvBV=q6041a FUiOrnw&ue`H5a%ҥ؛tmM58Vh0bnM&$] }>>67\ ] W+dErViifI:Еt83ɚp֔u^DC~[A}ٷ>ӦEXomTj䌪dt/vgsL`w]=n##kEB(Sm~].8iU0ƻϱl0IƢ-0guIV:m
[t<)s>!YJV"_肒܆iݕ +#-~NŽ:\W_n{qEƟ~`!7(RYk:Ȓ] @v +Xq 46|Mn;c$gc#C.fC Cc +hk\ #2*.j\'}ƌ 8Eai}g?ddz +|ӀMxBQdL}]F: +%E XJ%AZ 7|Z<)6\Q7q 06lK;|1\;@GQd(|Eo3ȴ2J2Ú Ca7/xq/A /$akȁ< +Q`w%f͛S[ֽ,UTG\- jD +*XCFׅS +# }]Nk k h> 顏ɖ4iy^2g;U?W4uEP@;OS=45gT2 +p IX\ +ov,AMԃĮҰ7Gy09'GXpݘFGk^nj$[w;b6 N VX.oS6w/bi0ɫv~5m +뀱 +)#r0 +H|WYo~f`qy {8؍A آHE;O멓FBjQ]]W_4-46I'e&0" ,j}c0V߄ q/c>Ba(덽 P;~8)2-S,C tY(MP[~f \v Y-aiEvbM=;xOy[(6W,PN7dj .;
/sb?VuEj{Y + aMRm5"||^۪]NxrM;3Ń۬?cki07V]F} I_0R +֡$(bb|ZT16f lfn_?$hUx\oM5Y)wf2RDjŢU +! +F3:g ˤdPPk.,8؟eȌZTO U|NӓK"ȍ;&vKSf>V폓3 c,|3P{ +[G
Z~rҴ#;mb;%P{^kp,ί@UY>cJQmmub7ZT3Q0\`_ "8;sڪP yE{X8¥ +1!YY]qUp\j':$z}[dأ3h)N >SXXRY2R8r(~/ND֓kh~žp LFcAk5N'B]omx=s (Ɏ3}jYçs IG`yPeвhRAЀ+&=̋F%"EV/h( ]q1{" ptkEkdt> [1-Qb儈ZL/5@* o G| y;#a> NO4xġ1"IhO:BLI,أ|s}G\犂 ~'J@&~A¿/xO- {s)(B{{L;Rzo$@:9δ,r " q7fptgd8UT"ho W' Ry2ZUASB/fVF<3> +'@M6F +$0z3ϱq;?)f0[30J|fef5 V=m>Ȋ,= 4|@=
EB"؏WաkRf5_+ <$"G
++( z̥̃Sd4Ac!<<gלVPl+ +jmJ~ǔ d(b*jԁ0jLAZMAR{&~+WI.O\ +1\ݓ[b A3Zl&xh |% +{UyLi10/`6}:O1ޜԁ Gy3X +HWɒGWz:}9AZ 4h 3j5Y`X${lU
+H50z g=PZl~&,N$a! H#+=IhYk:Vdx\LC'N52{7w'ApoEDd }5Gѱc__3%%9mw§#iAb {k Ik^o|s}jb|ݜ4u;`[=i dÚ^{~9~ɎZO e%naFY(;d} wl'j>r RTQ]I_ 9 e}vl _t@3zZ-p?eU3uukFė8 B5KtGgd?ZURڤSVƝ>VwZek6\ՆtFG2v[rHW'q6h4#_$`PJ] +7-YrVͲ, ㈬0e=Ii̶h4!>%A!KUnȾ!tQ9.jDQ LtI<
袆Ϣk!b0 b1<
Mc9gMV7]rNPrHTDjqtIZQwtE=np7fMSߕDUD +?h*a繤SO
VrhEG Nc .Fؚ<)I:5 KQxO!HSRp :d=^ /Bc. Rc[8 )(+ rnk+@9(% |d̳n34$ +:2 b⺾<6 x|P儛!Üç"!Vs#%ڒ F'QomEQ>V89J"Y3; u.J @]a@PlBY9N; +!0s1M!#25B_Bv
u-g ]b#dMՈ) +V pîcq7T\l}xJA3)վ{i; ZN}qߴ2Re !]) %J*VgIT 20`&$eEoOj,^V$Ela $"A3p
(%> tmDҚ3D" +T ΐ5$uG5QҴԻ]RuWz8ހU֙{"M43qiႎ?씉 SB4#i/:pZ}p{bʢU(BPYġ!SG j PcfZߺ`1iWyՉLg:e
1,9_f95N04P'5z d y@o.Z9;ݺn(1_uJx
/DACA7),%U,8h8MnDVzӇ #%ed:4F2@ku# ++mm x
ٶTˢy&rR\HڟOGGY%_t?z'$4(nL%`њK1bhrON+5 ٌ2Z=gp~1 I~H8B` KŢ$9 חÀH
# JARm:#x?9,Jʆ2Q&+C%"2 1Yt O$14'LԒ$b/pdyX|,|K&<KC 3)98#ί 3}yRr D Y1 +(kKyExL\xɝ3
fMv<Qt䚩uFPؤ7] +FvZC+4:nhgiku
j}PUG@ư!bzFӠlEώp^<[MI`o`Ɏ6(aȵ+.1Ew8ɪ`A>~ UjZ)nH )pI4<Ĺ08V}JYx ;0^6uЧJj| +?\&ps4 `ako< }5ݲz=CQ=Ttw][4^~SPkhӜ0s*F!Ӕ s[C,FC [RPYq\Kn2[Q,y"kJ/NMFhvg +T'9 +,2rx +Ò'<->%T{=6T@! zDIpd{An:OU*v))VAj[ʣiRqxVed
R_Eq6; +u7: e\9b,-n r ԯJa$7Z` CS@.N[ q + +iЪ a.mњ ̂/ni٩$g>;]F
vV/)ԘkcCo8KӰ2p |z{p/NjnLj,y0zJ@@cS2wYJhxŸu-RF;ޗػ@a +sE 8X@E +HW[oJ~ϯ"V5a R7g9FzEc{lIkIWep8$H,,1iUbjQJX^Y`+~I0L\X%r`? ց+ ?`X +D稣v'~FaWf;
O'cֹ|\Gc ?kdPsv_? |V'bϬ闺XN]+M'sFys#5 ]u^$1/t x`$Fe4h: ;#_ql :c}sӛ7dN|zkv + #lAx!e| +f
сpGԥDf6= Fh50=ZGqNx\5K +*ذzG+Xٝy\OA_a +|S@G+eTncE[|Ma(=sy|G(pt +Dϣ'ɿϼL>BvD3(?RU24ksqB[CpQݑA(Uehj9Y砤ǢykxxSN'AUb4 BrTn[oD+!ӿ5 +BH^!;ł&I41%%!'d^ +8R + Z<*/ ? V+ U Ic|EYpQ2%7GbY* P ޡj + ZCFOf,0^Y@q(fRh Pp n+KiW 4q c9uQUj ^` +\dYYi>'QHb\g +9BCwK m?${ `Sb'Co my$4b50^ \mme ˞UfZ.%!itKN7Yn
2C(7GNmrSG` ][kuCS?_5$7>9HHPW,aENA$aSzH>eK`n|$ߣ +ml ¸^Jk%(}+_NzK32P|,H0a 87PBܜ.Lc ^Jg:'Jqy } +]}~KZg1+%UG8^([$h4X{rO }llHu;rF ={bq,(\ׯETmZGIZ_hSdp][V3M 0-XJRmcC >E{]~._G8
/TU'/Tb筰LOҢ6#A hZPQ#K4S:J0XEߴZ9MGXRuUHggXQ/}Sd5#3RY6XRD`LaW~svBhCĨ,9^tnv`[1IJϮv!F/A]
VA ıUXCezDVfQa '*mÍ*K6H\ZYƉ$*^Qpl#^tb $j,pIn* 5G⚪_*~hqsۍXآB!t[V0 +`t1 +MGWTdIW_R2EZG_jdȟB #cudN`R%Bm\a1oI8'N cE| YhbbHTWPyzQJg\y*)ѥAj HY *^*Jj)A&LLu ?Y 6{HUynx*: ȩvm pop<%Ҹz
mEB6LwJ<rS|\1(D8lrka)]/,Iz#emϱDBF,d&krY%BW]a} ?
s9 qdu$`@;\JJНT
Q4Jf:/ H1ߡ4(6.~:R|~Ts5xP. s Zx!`q!\M!#l% ~8QjzH7/ +/0_ȄBFp + ,EI=1C\ф&e y2f8]Tww#+W*|;z41<ҀEw$2$2X'u̺mjW#3ͅh3Aq2Ѯj5 ra4QnOv`5'̻GLt"'cA+ܞl(El9|a+kH\ rt?> ar{/CB45L~|Lw'Nv?mq֭;{B1<SLW|< xz +Tl* +E3<9t'ӓd&HA%k9Z-M9 C$yzz/sv3L a5^ +eXa8Fjca&v! *,ɗCRSkT-R= :Ғ 5/: ȒCEz /UQ苀 }[?1R{#sRʡ;)0u? 8Kn<0tX;=uKwM$ S̭Z~}/yܾ*KtO*͒$'IQ^n93º&\D].w.8=ɫNު +}k V6*^.<5ΛfcQ`T}ڪUED +t!`M dw|lJB0)ohpVWX s qc|8~<!ɱ^,P7CYN,֥"R+iKӞQE"J_x~'1o )v䳸!KRR,3߂+R,6 2 /J^U_]_,wu< +橇SEC"fz8fWs/ Y8__ gesղ甝i :褉sRxC!
|7,i,T ? ^|jÊB~ LQ3eZ)3 +AFYR<Ѩ gcaH(K𘦩hNݝ,\7&}v2ޥӓqb7-WO%/OLԃIq:M9N%[4ûϻܒR;pE4z77ޝ[NMrt-` +HWKs
ϯ~?9$GI$nʪR`)ŮR"%rzf X*o4n +zΨg]:e
VG\չ&:|xH8qDںtQ h!OPwEP%ka"tA*Up wѾJ&S_CͺRK[<cORwg[9&$ +V? de +ˌHê7YB '*Dɶ>"þC<HR2hBB '*A3 2>X#AĨډ))^lEc9bȻXd:-Fi +q\" q%gI"e"KGJ!`B'(EΒI"B#qCgwH}H0` aFad8ŀ0ubYߥ#!TPBhPKpAd8XI*2$mH D]Lqju.$E[aYi5hܸȰ-R[^_g]syjU(ZTͅ76/\X,c5ZF<\Ekz.9a pk0Uے*! m{..j]J%JJƻ# +gKڤB)D +%ڶx- +m
J +ctƯb<֥2Z ~A@hJ,:{NC N]dhg݅pAH [Rzx0bln9 #dɖC;&_ jn{FO Ӓ<CˉSQxЁ/ڕY-
UhaI5C`,PcwHs>
u͟%%'rЁIRc܂;q$ħ :PR uUC71 u $JDt%Q@S `6 Qo 0"]' mM8!` ýjvM- +WƻyTI 3R|xzuOd>R
Dx" AxMaVˬ6Cxx`!7{ [? ոTww;ɝ''G +`jӷ['k?iΠRۡéS{b֏pF:k eK&<Q >M!ppk6[IM8ziVB + l + $gϖWp eu6:O
)I|G/wY%RG`&{Br}%Su17uGE"Ej M,1hYo 6F &k~s;*$cV +B[Dn}KYjz1d^O8~&" alrǂ +gg,m(wR=[P}<I;OwH(@.aHYw D [Lqz5z-v?=_x +>s#\p{탶ے@1{P)F戬ۤ +4VmWg@rSްۄ5H#צ +5 Q$ƧQ[*Lb u;*{%[dT&ǚÌ@}H3KP r(\1FdyqLp/Uzw5,Hd /+WeBQ<c[Qė%-er,#d9H +->b"1Y됳j7H,GjN^[-n5j삋0:M7[AZ1ЌFxt4q ĉ9Xm27%E4(msn, aF0]-O x8l`zRhFVfWg:|`w ~*n
P1f(p +,O +hʌLGoQ u0CJD :8A·E5C:GV(@8V +,O +hʌLosqEqw 6= + -c!1CVpјHu4nk +!N&҇~Haţ=l_31A +q
bZ!DtDʆg ~Z`V) +< W߾?\ xQ Bt]\J4<W<HdC{(%]5~eτ*zA_)q6#[>^u\A-LƝd6ρ@`v2Fe u{Pm&Fc ^h4{蓯/N%6(!\ A2.?U^-*vU<j0O\J}UVk}J,*-wqa^P/q% +]BV 0=)4V4ޫ3Ma +ɑHEt܅f
В
@F0t:-7?U͒5
f,jeF? _fs| 'PU>Nh +huUh\&Td:-_LjA1BU]k@Pע ] kJUG*uQ2RХ] ԠTjm|h4z,1 9z >瞻&K$HQ/r8% u
"TDRt&pR`l)?yjjcz'u}; 2! ڝ| i4@_ 5@q#مʄ5h IOy!p2}Bxʐ `epipH TZ[`֢ 59+lbGtX|fUw
mnI\n{>|!{wm9u'E6>n.euH6s< {5(K 21kإ"rqMQD˳]GuKn gԮk`V\O +[ePXpT ΊRS 5BLFwSJ5Q=KhhS:e=e6iNˎîHfG|VG 7'|(Dn~D{Zh>UWAO[;Y_
PJ +E l,jɆE4K)AW|}`PxEvN /Zf*R}J%(o\5m04lVN|i@r /@yキ4@R
a$h kK< P`k x)[#h/ +#徱lFW +ng.Hׯ~I )@R )-ó@}4e+sһjBCQJ&YVf!w$ fB + ~KY ޱAś$1جTzjPYI%WwR ǜkuK &B<r:HH҇QkNQ!#vf `(܄ikFwS IPB=KgW)n Ԑx6r& +=V;+ L onPc +%tu Ӭp92X4] ˷i~x ' +HWn}WcO +!IwKwGeeV'fj: -l^^{eFs"T7z#KXԣhN,{ +trͿŮ[)+2 o75/w1ox r +mqGaAXkbGxͶYOlӸJF<*TCh`rLY/$Vkx@q@m T_f]JpGgqmuZ).\ ,ؘ: 0-~DYe+8CݜosoPxũU0JP:e;
w-TȿihUH +UJ8Sb{j'c@Ge!+' įĜ 璂 8^U9rq[J5+1V ,kk8i@h~Z -fd9iXg m߾'>WhmЁw<w +6g!Z"38K>`zkS@N6^[jDis D
@z'?Cl=Sx k *G_ wX
3a7Ae +9b"Ֆy LR #reTiNGUO
<nu&.^vL+ }?I<l $"r*
+6Hms'(݆I{EpE' o|٥ _ZZ ?p#Wd"Eo Bd,sؚ,) nNaӺ8^ dAg|u> + +08 P5IJֲ
8ծV&к/srG +<>;>]zۊוPRGMу.D}:vT$-$(. i8Sl*Dm +4 `+`- D\@> +!H䲠o e-9o;ܝ`3QMQ[Gcƕ +V υ\(־ +HUMo7WH]e %=- ֒YSE~oP+ފzog{!5㠕X=?㥊, +6
ut_> S!Vt'i` X +4>o[ֺ8vM E 6Ϣfݽ+|lU *I0?v~R7Wl +Gb.$ٰ^# b'0|z.) z}< 5Ie +K;m) +\2o挰T~X6*_l&R[P \g)Xr"^赲nƒ? }'=de/"߉&eذ\y4_bؐRUT~?P٧#AFO{#} {y
`Q"1 +C-\0qՍ&OI݇ρiZB ?ІCW#JZc=/=fGa5=Z`ט`Ga5h
5k ,DOԥ{ <},FS%\Os^S^:c% 6x=@ҏq13NzWYѳt}G͎l]Q3)ԅQa +G¸_fV
5epw[- npWMp(7
+7 nr3-n[nq[;npWMp۩p
napWq+8սlj&sa2WM~* Pz +HW[k 7~_GMa ݕdB/i]bƱ"ڱiJ <Z}:;s$
6 +1D l~%jBJl]qP0l~[b𡝐y +K(z IOU"SUQOEf/R0eC+Cv2pƑ ׀midD-ġs*Yf]m֔UNX +<+,ؔM > a ̙WOJ(b* [ +%֨F
5hԠQeH@LKQF
5 j.(91BDA &½+) +/;ÖZ"V^wbX +wWxyp'v;_ +w,pgoMӿCԄ%T/¢\aɶ0꡶kpZ4^ Ǡ/Ï5::)F~2"]esU=p%@@ESC=z.]l0OPf(~*icƇ2x3VUs+cO+ H8b겫6 +CUvҵ J&M*GKKՔDnEUr jq+z3 +HVKk#9W( Zw{̐%!,Ncp 9UztjXذ:R}RU}'T*ڿ&RO;.<^ Iͤ\HJ䎶S2}ZlݚLwj螩7t|d=> =aN<`(-1-5RhFLsC;&9CE_L63yMu8`nX
t" ?G; 䆶՟ C鋎ǫt\K-%1y4tɪ\5}?[F܊j>MpGEWRpG! +ё 0$y ?Cҙ'%7!FJ_ +tp<={O]^.?F:eawܲʀvD @pKW̅QhFcCaV2||D/VG
B0 =]%֟b ;r i3( .l6C:rŹw}]<M8~XmRdiwȉXl N+Ad..CXs/+.<i||15wG FxP,7PR zAjIբRpԡܭ +[ ^;'|]]5q +͎Q@M
@M@M (@M@M"5Gfޢ(ch9kB +HWmo_ bo$7}[; ( +EblՎrq쒢c2<3Px+\(Z|8)ɬ,R7j:ɴ 'ڨUQUk]+W8UO'o\om{ۭ[u^o/? Y=[&[$2RTfŊRЄ\pYkS:&Pd\7Yϵ-L}y}kl+/Y?;G-z,1+a{y }r[>g8w2*EV¥W( 5-Ly.`gdhYC"OXwW؊T>'Stut$;/\峪8IVsV(dwv[mnh!df}U7ӰZ1/&Vtfwt٭zg+A
\#u0MggPR}CuFx ڸbt!fj՞X79! mW6 +ͱu<FޫMm Aw 6y%ȵ G0r3D^{=^'`8 +QG^@ڽǒpU쫲b, +T8ӶO
g?]^/ЙaPWɝֺ.N˞B^Ux6gW UC>#e~D G9+uN ڸ +zE;kisQg 0ڑ<0^f{żޗTc.\ ~ïl Hy ):S!?$VCV@rӥ' +&Wky(RE^R&)mٵ,g"ogљTQG'Z,sT{vPq{fqKL (~+"du=_k!v +9'S8_7cuoez{{W
+TmD jv?c5#sWih<&U^e߀%.R>^*vh:5t<m ڝڙʍ3XËޗoPo)ESiyu6`5
}Z]Eռ kƌf8ɿp_S"ՐdMذ 'q)?W9MA +j)Tu<+ъ){RѤŨW+` Ϗp[߁1ZX)BMk8ڷ'NR)W6 v\N}=BN z<&;d yLQى<";GdOK<| D c.1Mz,G%l_Nד)#9#IcY2Nɻzn9u7Sw#1 `۠EWhdFs0T%*f!?NN{xK9=hiCbEǠ_h(R r +1SIG&Rg3q6 Ζb$f: GG#-u~L3(G":T0
m(Uׅ5sG +HWMs6WtF,AUO:csC-QZYHr[zwAR4u>>,R? "H y&$ω)2;G'l@i*Lֹ#3+I8@- g3K5זLM]yӚQ-lg[Âk g!Btl =PҪWPK3< sCBV#[ dLhd +H<0-o:<fa iVtņh pp -T?!NޠDs H:f$T ̥? kMWF" +(N?-:w(NptT +pm$' )a7)ХM.M }Oc[imckš ȶ-H@.GuF]S0F _t0*=0% %lǐf!9qDˌ;b +{Kn<Km$x JamM04: +Z݅& b= HTS ѿ@Ar)ML#^!ieAϻa< r: _ѵ-*qdX杦!. izh:Ekq{JVlhp[:~lpVNe|!͂pd/S,*Le[LQc!wyxY1*/2a ѱP}fmm( Xg,ㆰ=O؏dæRyv+!*ut`_CrlIa ĒUYaȶ ,FgEA 60hdhlkuUZ
5Z`xu HɡVcE%+T`T>~ߚgq֪wם +GնoՀsdi +|,mc}A`SdiSdH֧d UYk0sV8#V "kd#Kמ!K*qD91qp!ºSd)ֈd}JRp^;g\X%ֿ7 +HWn)8ߙ6D9!1 ,F2#4Dz{[yUU )kVC꯫V9WXkpRY]յnbuRhOQ5~PQ5ZW + o=m/bMwl:uݬwtŲ _R era?*Y4EBmXֵ%-H!
UY2V]ܔju Mۗ-R۪)qY8Bby?S +mBMO<[¾d+<~"-l/5;dꇺR"HA!cԕs>& n߽,g5'942kV%zW*w]}گzg:T:h\ kE9깚mWt+nիͯ5RG69yzAuewix_z>bM-z{2/`0p^8n<%
̛ ]>~{j(g߷\ +&co;;q GZ&z6y vj{!,]-_(nP"N5/2&9t۫Nʎ.tN I+چIZ7TTo(M-3Ce:h% ZR@·ۏ eW& >.tX[9Fud$9@[J$RUkY\mwA/}/P%vtW7<FtB
(-d[$!R # +T2LҜI&l3Ȧ?-!ք
TNZ'z]1Bѱ^(WdV +wʖv2}R"Vnu-e{|ȾQE8er EK,)}A/)R`Դ<ۢ[$z]>08 1yAF&0;%VZO h +d>tPZwJķBQ띺5k0Rd%̇YU$ӱ 2!%tL:eAfɖ#4 ܟ`[lͅvjD#α56"& Va5 ~Xun:Qn|¡%B0hc݆G6M,-hSd3^ $%3pJͲVHĬ
1u` =XGp-v84ii (ZSk{-ЃC
҃` M +-/'z[9 7l50>x`"L1_HRHRM*ոdS2T3rq}-/%ClDδ`MSqyĸhuz5&
2GiKk +6|aE +h DljSjz +HWKϯ:|wӀ㱲p
[s5-d'ԋ-Ȓ` + 9 + 6}ϣvu)pֆ:Vs(T YeK { ^k2Uk= +8\v = X5rPV ql։@5,lb#7٫-!w;fۋLI"DJLN|ݣ#軇#wb_ +O +Jᆯ RI25dLk 9f9~`W<Z|%z~ѽ 9Y$tBWS69Hi N +^0*vUdꮨavd,T[g\d) ȕ*gwQ ?fp0nU>YlQ/Ò ! + 4eI8XM'c >RϬs]=ûrnx]Hܔ{{ +,6JDpk){t4R?˚ Mj]eY?\ eTסs +oT +z/<{~`B{i1'6> Ax|p9 w}w [3K_"9Bp&ѫr-G
m +nš#_ w~ ^^ $7:Zs 5 8lI7 %͐
ڟ)Rg!yjh!:FtEgX(Q x5H~|_6f +$I[JRY]i}` >].*3xv >4|Qd VZd hlAc@ئ 15bb~4PmwHn0)`l8I`84{(}4@Bi&RLbP0HMHڀ}k]S1s@+pU2V D +ѕ}mSbӹG~Qa;2Z/ҧX&c<"gZK
c顺 ȑF=;'l1o5Loa c|:SO^:CrZ5 z`9O?A< 5Ѿ'ry+x!O 7skmC+xa`'V{!$V,= mw*^HsK:## +HM6<Rco%E"$a 6v5)R6TP`OA4;gFb% V$?5 N +)UdJbMpGP.%5O3O k]b2hrʑ- >77 ,[<6/w
8~. m
9mC놁wi;%4g_z_g9:%Z_s$(sMVR"omcs^oGkҲih;C(QYٛ8g3qzg8\3+5+~I?)ZpGP[* 4a !GR""L+2~I+43 (7/J#~ <Imil\Fks3vSCő$Z|" +5K/XKԄUVЋ+\4(lSK9f5ku> +,0UX6B VsX6zkɪyo
jzk\յ: I=hBC2UT]]A0U%ePXf5kU> +)AkEHGP!1bT%mP%1L8 +l5ъUU蟐W +HVn7+$tE,0 9uGa)_{{/R#& Aha̹/33 6 M @g@oKAd}_3>wͽ8U1,2h+ 7da~ˢJyx9%h((L'h/7 +QELu@+1dL$ůseJ^`?XGX
YkXy$0M%S 8Xh%Sfu.P/ z
*mdxAOj~ay^HUy7 a+Sin2N5 )0R cncqT Q$ +$:f
symi Lt+e8K}àP*UHDP"~dt#Z,|z[Fo6P]3\&ck4d
qd }eagxշh
XVk,I7hr@.qnEty,C}Gyx}aUc fŽG<mYgq5HƸr'/r\yyh|˖Nȝ#[O5Dg[bt:=U;<Mtx<[vy7λa<Ws6B
,
7L~}-[$Q ən.΅ͭٹ5[5[cy`n
րZ٢Ĩ(u-%+>G鵂vZM AU gy9_p)fU\2]/ +HWn7+$tE,0qVZdտ^Υ2LA( +EmH +NR|_+#oT
_|}uZVcFN2ͼ5s:tqr.B38/nԷ^2 Ljyy7?Qbw;w' +k㍲T+:0ߴsx #UgCO~RTNj5W8 v{MG ' PeiejqAvzrM> vz
[Z0jrqmw4$o1C6AJ˝==B\GI B?2ε]z{Fo&},ǧt._З>mMߙFglΦ/=}PƉ\feL
_oM/ Z0qA{yxy[[K<ߵQNhR8m@N;k> +to~;-p ޟt3/c}t| =97U`|+J|]ݴe7,myTh'rYgg,?พ] =ul aLZ`,,Age`i
րZ٢ (u-%ǥSP/3dk< Uy,/03g|! ~6?mes d2 +HWnH+jI"6#@4zڙ,d[ӎXRҽ,ؓd&Eeǹ:uYƳ ̤?Hڔ&K?J4u}:z&llQTvmZ^&GuRړ>ydEWF:38#X%ӸNh,U\e dh .)#}\lyJz(ُs!b+Σxy#9΅V=FQE:3_zZ + [g +)Zз]qIy[U +vR2EF/ ]-AfY
mYrvVX ls6 + _4%lՅlU 'Wby}'@E, 0挣e !ǰ9
"y-CuA+>^76*)E ##/?zg "E5bղłQ +1Muq%BK4tԺ_Եi뱚? C`1i [KUa8 +BZ_5IҀӋaezѱ Fa6 usMW-0~x<\DѢ_,pA%cqy?g}s F.ƍ:Ь-Fd3WK ;CR,wFA\G*Q[HK:D}cᑵ{3[cMmh䂲[ku +VPL f LE>CKo(~1h>14@|PA ++2%oI= jIhɷ::Bc ;vg6q4%+.eYS{HLk!YV=ȷdѵR?Wu|Vh[-\efw9t9߇)\S +2
ud3P)nxhoL 7]dV)P<*1.xt f\]oH(o/=rWZS]Bl+}QLuIp(]:e:ǝh <wJ#IZ}aWɭP,=3VĽ ;-c,=?cÍςN"[M<cMWSz)S;WEjl?M误_=`ܜ%D<ChS+c 9@moDVqn bpvvMZ:#Dnl/|'L~Yav+Jf6BAk=us_lL+ p+9dcꜹ VvXPuK-éa =mu6ł&\ks+<'dk xlRd/H f>E%"4 3DY*\ds>^ غTSxH\zR.m4 ٯg<5f@81 +kz"71-
Wqpyǿ7KY #7عS]}-P?N_RILnh)eeY\߱4\fAsLcjHRObMJ+
Ӝ++ΝX/gBXa?E\!nk{ x",cm\QB=`8K,7Jk>%pད U>%:^aHP&l
yyS̤ m 7'xʩ{I|Pζb7˜j(΅-? +G8wk$ZbN<g_Bo" +HWn7)x ?=؊0@҃QV\ؒ!Iz[y;Cwmûh +'i Z.Ǚ%F4MDbq=Qb5Z)bq6`Z>-a\ +8ZWU@ϫvuy +CVT,~:hS<Qhk9PbLA̫Hf U /+ ]]ARxRN @q,^$6.xM*[Gy8gM5:ڀ1ŀ2Of*g4`mz4%כ,0 d0San'1ʫ?*9H16A ,?itnt 0Awo'_V8=1ܭ(wm5s t +GH|(9 A.
*tiӒk%~DE319 +u2OV;`
d{a:M [)vyE<[Z T|w8TGyl>buڮUV?bݗ"lO#=N.M.e582ʄDɑAtEu"#3]UJ m lߩ%%*G%6Cfm~,$qU 21Yqvb?+(<KYgb)fo "oZ~ls}C!X<2囕#dj2DRTeU%& eXi2ț6g-؏JĻ;7y9o;-!Zf --z,O//S9mBAˇ {ԦsQK +zY_W!˵MXr\Ǯ%yss^P~0LkgQSY}q. :x9g<| P:/^U9 Uoz {xէtM 3%e:#\tݡUpU &Gd
&s:_Ey 9SHIQո{wCQAC)l Y YϺ~
Z6)w*?) O >-te7f$R>C=4A
zhM X
zhC-GȢ%+AP?:h `XIkL;V<6b']#_k#8y$vu[g 4Q{&hwn${ՠg%H'N`5!:uwi~[ӓҗ]2{rq[;DxXut|hm'EjFjLjRP"ƩPljTlcJCY<;|kjxwfo" ]Y<ۛ1E<Cxwӌ]x7|[5w., GʛC&}iƤfTFu
chHjK +HWKoFW<ze'Haā"$( GR]!(V ΒR*
Ary} G +)gdžJ7E
P5VC1Jk %s5On벩Zc]9Yݗ》uy9NKQ@Q>mTo<!dHh|ek1%3ƴDSَ)P2 +Բ UTWӠB V*R
ry +tvvɎqr79}$x*Wm:c,X%6$4 G4so?oJIl11ix&A8#-3/pé[r?hsTȇ/`ّ6 +K4TmNĨnsK 5 S ٻңs jq}WFAS!؆TWOxAb.Kd08'@h%@((˨s}[:45s2Agۨw|%]@@v8{dC UY}B~ #PJ Xj=FNR\QJY&&ymv/u5maf0WU=9Cոk4'&VPW@piqr;pFv_R 0txyHԋsd`+^We
S!qX&ψ٨#F .oVT"mkI~x`[N>]رHtvr'nV"5mԜ +aVM)"
>! ܃Fڰ Plq+ +^-p *;=ӝ>ݵ ;}ܫ[
pnpntgOw=Xn;=Wcm.ɮ> +HWKo7W=h|r'Hԁ"bl]lNҜ/{;/JwӴy 0`-9|o8CB*Sޗ>UF-.':LLTӉ6?&ƪ +eTcL o?Z L=ܵ7E77w4jby[7u$)@6)!ʠSg3/Ru[[}^e 4PW6ZB E/&d#2S +Z>e--
n?M{^lM*]S +䅾Ch֠UQGr={. +Pzγik50oLmaaV(\%ND=iZQ 'I T #e)BK`b.`ZNkq4x?IilxQTZ+>#\y:jE'1v<ٷUyB*̟ʸ_94ĿYj@+% 13{{h 'yy4lwx|^N#iX9
R>W ~|O!m$No yׯ Q9|ghʣl"[]ѩ.fO>~EbO +4n z 0G`[rI]EAF6aׁw4hy,._QxIHv;`&+R'H!yĀ2p Fz^,ݔC҈64zr9ԥG Ɠ9`)D! ][6dsTTW`8-0nsf]S>&Q5R#D ERz=goH9D\@/ J̐[{(V#;{g-z5Ov + :Z`l< x/ WGgËtc@u:>?oi~q6TmD _۰?ThEA9-k|PLwwʷ,PtttTq"WgG&w! AFt{e2.qټ',`\T_ 0) +!ixx? +HW[oܸ~#Ux5ovuSg^c] [DϨHK?=7j4PP$y.9㙎m,aϏmF(bu=(2>[('}wVքFWʄ AZiU zX[ Az0ӎ%DgeX Y#m4+S&
LZ2Az +Nd~݄vڶu*@ C=
]ǻjS=;U'SpwToV|VqQn/Q8JE9\3A* ZT ['OXFjT7K}iީ_QӠvORgEp"IBgDŽ߿
" ww +l +#c@ ol3,~8S/> s
kId;pY"m.MbWoX$Pdb +R@"\ѱ\aS +ҭc刊%LYBiIG +fQn*7#n# Y.W-.F@<0&:K +ʈ<QS][O:n ]E 4xMw&ϓ8ܺGk4sY2Q=MnkdUs).F)nT)dPXg$:(L+#N
"wb/1NhjyZI5Dcu>+`K\o -M .feA#ee"3
c"֤LO*] ml:Y=wt1ޮ=ʶMWrĭZ l;{g~S24 n2 yr!`ق?< |hPV W;extىb {^hb @#h}#cFvbE[_?Nϡ]
Yz; +=v AEU].tX=z [om1ل!Hl
)x!J 3IC[Im/&FZ܊Bic"V LH x__)G8)͙7 +b ⠙0a BE%#V4{A +`!GF)!A'9H6j U!V@c5[~~'NT4 o:ىA z2`[ }4-RKm@~P(Hơ A1U SUiq%GT-
Z&u&F߶ MZh'D Iu0'8yQġLvĵT ٕW^䡣+<Y=h f=H~,MTIxs)B8U"6(Ȩu$ q-bn0,5\4 T a xnpIht͓Wp]DNHbe#+\T!$bFylK(=zjC[
ZlYX = sGԑ 4=#w08"f1P"Qh[!CY 1dd \dȎfpM.@t*i*LT:H +HWIkIWԱNrH2&6q40-mY"Iy[uK%zK{Tu +!jĨIJ
''
>NUim^{Aqk' UZ3>+۬ + +נd]>{"gc W~s)%{"ڳ +g/'`B7T,{ٌHifW묀 ٜms Դ9} E;TC yJEV + +Hۘ&fy nl +/A n!h9efY7̉RcY\ +)؇n -
R\/R}=` +D\ n!Mחo^ +%4[.S5 "D<^n! + Q\} By`04]smx6d[ bGIP;c~'l _!C eP1a $rI8G7#I--rK ϤC^ u,chv!PCgh)"^ \P ^ nA;_ tY⣠Nk/ڼ^Qux+͙E]Ic C R<RrG|3dYWČGy*E+Se$dڄti0bcuо+^xټjaK$ D +֓;!`+R}& Qv?s\ӣ e֏k/^ "S"#{4ڶ +|zRO6ꬑ'9? KsBM*6*Zrr@Go-~CK^̕{h@~ :u3J`VD0 ~Tu;b| ݀|UW +[>? +2r8[auC +c$&YPak a/g=m-~ނ`P705>WVnVcP@aXS>otՏj4A)]N# 3uu5۹f;l-'lG::l\ZQ!ѳ:.5 .g 8E]zZW 2N`jRD&g*5Ȱw@s_\wpuDD~ |l:j4+v
'>bnp5^P:Q1jRTk|X?{d{\68)J'ioⱽtȥ?fZ" RCC8D>\ȇGs4|@*/4TȇW!1t!g*|PQYsLV>D-ƣq +HWn7)xXKҷ@uj )Ej9-ᐻݴpfxio?FȼR"ӤBJi|9
f
.]7~o_?L.$</IA0 ţLtS[Qh~DY ˓@ilUmgYk%2 x\.\lCUuU}ՈUao$ p H$`|qFAU1 :<BBY.L=EaiJ06eJX"Eȩ +,?IȮA!o|ǀU + mΟ>j,2,)b9u,ge,Ksv~ IR
t 6,&A~)y{W\ [lSvw7EawءhhтMV8ˬ;>^+kDt)GfʿPJ)T {dϾM"%-t{YNxHc}ԉQO{7H _91.MEI̖<L%[ u hwm#y+Q0EJ +_;k:Ϭmy -ѻ)˄)m/.Y}{ֻA"#* y٤qU FD+#@&bU؝ПO]js\,Bj) Ӌ%닣$-`v`MAztoMSi7M5=4՛z
ECҬ9 +)]RkH(}Zdۜ p$ +R_Tvl<y ?
-&ݏ&N/0j f0Fxx4L3 bNJDv=ו*V5`qX]أk~I!ՓfƣB4 ABucS_1yQShQ(
[4 !6Ȩ̅
r}K-<kzl鴇̃mfLU|>1{Uc$4NC1 Tu 1--5~j +/F1h<͘B v-<='GR B HL B Hţp6eSgFyo=Dn xGKa>S+g6B4@AnBGF8gF.=FwHtQ odZjs> PmL OA۠xC*`n +jj$Qz# +HWMo7W=7rP15yep$q 9ܕ )Z{3sQ8ì6JfRHzX2[>SIㅌ,(%&Ӹle+zvC7SﺹwpsOpyEt% >:aBzTb.?
Ah"2+d_YA+<FDL\ YZ\ χV?$%#w^(~ $x han,v
9#D+ +y^ֺx$&+]= .yo>ދ ׄD{TAo.oK̛e?lk7LpoՒ* \nha[A=3hc~iU$0HQ6dKt {g%9(TKJ}XaiؐO,N q{TMala:%AT +Q&a߆MM[p7nj75W \ᦁQ&] +wkyT3\&MpUw+pӨq\.p5lnk]J{'s6udk&m4緩? +H|Un7}Wq mp.ʫZ#qsq@3<g Rk7.B4 84!.`6wl E}\ks6۸ {ּ~ `x]6fѹ*SSwK/X$q6vY0e +\Lx7Kz\eE{o~P˃]L腗 t[D$AQmf\Ff-p m[ٚ4E, mp }
z;i^'f 鵍'qm2~ @2-Ws'|
LD|5 qKF<6t7#:Xk +;EF f8l[&'#(iF +̹J# SzwOlݕ+[BL *sfn=SZʀ ()W0XI deӕQ^δu:* +odRU
@TuRsG!ou- i/
Qo8 (c$Yɧ
c~7@H+3 unZT~uΆ.T&_Hf%_ɗNLj=sI߾{}|VPt(y#Ĕjfؓv.V:Lj̥d_Bu=Qa 5QS$a#%) + +M0rO{r8SʽIUΤf|,i0
<ʳ^?[/JG+PgpEH@"D\ꤤYRW 8
Aux)FA]D7YusY+ +HW[o~ϯ#UuDl»8R}SLjlIM_*۹t +!I@Gbh9bjA[Butwj%أ.`Cf|ay e3s[$యR)LG< Vc>mtI} -t6u#8ۏpYE%Z)wu fu74'q2Z gDar +V5KpN87_9vj-,5y\4DrnPy{FA1)ma%Yց8A D~脿|b0Kʸ +g'T~rbB>D c"D (@b:r x+qn~qer)k.qX[ƭ\Y +l_
k//No2aRol}Ϙ = @B> +|5`}U'|70Y!iD<q,Լ.Y>UE)9/ :viNNqxZY*._oFhB RIv >,aqe KT,xS`Pvo~n5)ch@#XB9(<XY+Ge/pp$gtݓ4J?NЖ;W T9j:Y^Z'قC^*\l!Th W '[ JwC +} )O\u G F-_Rj+z:Tm/B2lPE#C{n;;3fub(2|K'ψkO"nBr,rpʖ#E{ +ki[G5SL_~[V~NLUl4ftħ}h. xoG^d4\?aB{|i#UzADWS{@ZLa۴u{#g z^ ffx +?<˚2SvjaOKnl{54R?1|y=)!nR:eèvwlyBYX( 0(:j3N?tFw~VٯK3>qBA3Q
0/Ζ`װ<_\+)[d +<N!:RS}T N\G)n?ZjGهrq [d- +A "֟7& .!/P G%H
QJD(vwP. D#\O[T?" 2+{41@h %"v[Z&XY\*nR]l PH0 b2' b[~ΐ1%'
] "Cej\ѡ>O WEq k <ฮ{*)Xo!w'WLs$Kܔb +ܓ@Umѕ1,) X~uWzT ]Wm l ;) +ʩaJkP 0s y +l(48%a}QPyzxu8<##眊|`]rKy/3tԅ8tfΈٽ=4g_qD}~AUw: :o~We"P4iH9ϛG\E>篣Lf4;| ) +aS#"jYj܈{BKyQխU S,) qؔeG9%K&S~ܾ}ܭJ^ _xcKq/W-3mGĎ^Q[ g螝!?eя`4+ 㴙}}CPDaWΗn.hN6AIT|I2CU}+ Fߑ]c˽Ll2kJ jJI .|B?+
'Jr-fKj20_J3efS1Y
hxKr:ʔ /P}6:T-L<4i9BW/@<> 7' òyQޠcn;Y_ W&kfQvHp +e/"E7GU\۶]X}/huD%ۖԝn訪BS-#q\ ߴKlL}S]A2f:{C ˢȍFHS VEM({[Y,
RQeL`/2Mи"OFiapΐ="p%=Mt^CGU
GLzbb1fo3Dn HY
Y#!p#CЬ1$F}^^ua/HFyt~=x-SY'Jq%5st /Fm|hχYŭ~nNi. sl!83I iT +G:W4̆+&{a!S;lɄA9ǥ}Mz"U ++ $CSTS>XyќW0\[8=/-( U?JPNsD' +HWMo6Б, ߔ@Y@SE~ogȡkxE
gڕ0^+c;
pQKƨiӭoWVZԭ7+ Ed8<~}y +
ʭs'gd=8Ѯ5U +B/7ҩQl0J×{C~`乛O;4d @*IXmQ($y +О) N/g[ALDHS*λMomit@0e OZǵ>/ˎ3*깂wu8}+t1PZ {wQ1\
+8|tv-+<%h)F+ۀ4p:@1zN@]VcTY +sܥձf fqsf+pS +pWN& +3]a +ut'_ {5ko +HUn1Wh qH P(J6BaD! A,ʉ{#Ep@Et,s.Ig&lyPr1)D\/8XO L >* +rD&@&DFB[0QK3+p6 QG(:/2⣢t ݃nӓєSm1` 52E͟˼6e[[>/rêjsoP4FX@{u?^4Tiԑ t b+Rѐc +>pC3vQS2!ĿTU^\; ސ|5Ǫ1wfU¾Fah~9NY {6Y׳n u 4@W7ho sjAvzצK]X5֠[n
1}`n
5ր,9Ȃu} .}dhlJZ8_.Ixڕx dH;n jfQ54?:Ey[aL}jva +wٌsZ5W\mu4Bӵ +HWMo7W<siGqhb +z0$"! Xrf{$gw&kFÏ
J&d55˷36fs ʼnLorT 9i8,{xkpsiI$]5G.^JWW]WbMVz4寳O>_CH^X=N!8D{%j22Z$¢hR2P ?Pr:bc4.ԕ.0ErO97ʃ9vtZ#q^C%k9 A+9of >,?ʙUՖ p AEq僢awEG[t S6pOʍw`s>bzT8
L!ӈN%&zicHĕj|TfMfm + pU +
dIK*;&-۹ajvڭ'>QS= ]c{,8s#{,~ +w ݹGrWhhpw=r;7w ݹGrWXn'#;H 'w 9ݝ{xWWS^;&ꩵZ[y +0 +HWMo7W=h@ + ry3Kp.k[o'S*EX&iLH ?ߪ(QMقjH +ÿ&)Yc )) [xûuavy-f
)oV
ܕ8L;/[o2Ns$-ˎ^}l ?6q[2mt% eZ +Rfl0M%mxXKP`Lx.%7eA +q 0NYFT5k_%Nߏih & Ƞ!c'M5vfFj ]?Mŧ!FBnC-;"ddL57OV9O
b^C 5?Dlȿ6Q-{yԜ"9;儑TC B# +%b`yՊ˻<^6z;SL6P˟QaLX_\xZȋ¸Ma-(FkDx>(k(ɏuxv<gAr L^T7Q\ uJƹš'[ +q8z_:of +U(g(syz̾ p,4?\&t)D ib6-MBфάߨ*a*Y>bnUys)e ]=& 3|ɕ! L׀) +1&4rSw'1O &N&/gU,P,)[V _Qpy !=Ed~ m e9OĬ.
!cVEDh&ZDfVwlg}?Y[DEVw!՜#99RZ=V SnKmt XOMԨF=5꩑6$#>ԨFLw̢cKRϹK|uln{Fs`
*N +@-?q
ОjqJ*3d{hб1gn٠,s3Si?5 "J_G[o~ɩA<!<O5>bh4ᖁzʍ!U4yvwM#̻}VV;gYv2 ƻHmBJ^L ^&FzrQfԪƬ.춒2;#[1mY]0#Dz<]C<
nQay +HWn7}Wn8@ bTaOFQȶQ.y_{;Cw%Cĩ,y2Afd%e;*%NaŤ?qkZiմ ЦȸlZO-jڴd^5 ?^4@]U':<^ZoM@W1u``:̎q$@vPmlzӀT{ .+]aoK</St + &&J;
wǠ]Mdh'&'G)
@>n7hŭ-"wM~P9 [E"*ϟ0 8}aQ;nvy +Uv \e%Cf% ؟IHJ$TȤ|"HE8".ń<tStD Pan䆓j2YHMtMEU_R(U@E0v@p
1{ѲpRMFҨ}˩BG+dHT %UBc"]c"HDxB"1(MDTnG%zMUcJ VrhJGT D\ qJ'S<)i ՚tjeկDxq4كh8|}BUt<49z $DO '@ +3Һ#lPH%^4t3oƸj|XskMcWۜ}n#
a ZvskuM]7-.xVu6gnJ`S$eV7X`5Ulewq0rLpV
FGt2Y"9(ȁ B!4B!4?'z 6Ch0gE Ao +}D숊B3,ւ}K ^pځC[pX֊©O1ޜj7о UCО;*HO{TFV +HWn}Wcg>3zZ +]oTuժ u(&0z\mݺpD?p tsҔMeuIM*gC:6:bZuM1t hch"iZZ^~.&51Z~Aw2
Nҡ2N<sdCjVzuAt[EVoA%.^/m^YeU骠,V7m] ʡCY9_;u5=նL=h`HB* >Nn4z62u̡u[[.NU++-UzBGeBCa7<~gyϝ5m?ւ?V+h:}Áp t1T @2xWpۅ\kaS2xVA0s٭] +qŹY{5,թRnXߕ [@ /xAg= m Lec+W/R k`8B)4b hq͵^rthLZ + A>G >{2Jb#xFF=q+ /.=-sܼ+'XX ~5v=e +uvA{e.26-J<vY9ԾD_ Kiy&E陟z({{k~J.C i˾i +E4# $N -\ϳA1z6 H, .D3&EpV~g5AQ 4i
*'%,;$4~ƋPU Ղ +@Gjl' TS]m#o Jϝ *Ñ_s5X?
W@lB?4'4%TJAzl!c˄¥Jq'(R;z,Gaj(I3hK-z40/]ZQM@y_}fyt +۷VA<⧑ %31-QQ0A6# |}r?*̎ Kj|.H
yھYETVo"oOKnZ6nMd7n -˹e +?l@ 'ӿKXhf|-@vU:5zA^7k{` 쵉nĞ}ây՛xh9 z/7 w& ZGI̞>o \ av0 Bj,AhWl@H["_ >#b ++`UdLY˯hp1,Yl~VIC Pt6m&Hk=:+xvm@,>$L~TrD(ǤXHRk|i"\\a#bß;SuP}\l7~N .!f30:J}8&Gc{ECxtox~ +HWn}Wt +" +HWKoW' +<;jc#{iOĆG ;}RL<+<K- Lg +>,|bҀ M6OKjL;֦K1霺jya<+/Iގ OIûQL`)ĒVŤpMZgWm1A S/2׆|fnA՚Y ҶX=-d Er_)RJ+sxV2yܿ/`<E2_|4f[ua6H!sDzD:G_8ΟWKC#b[\?#R +T^S +PV8|SaB>*(H<`O'tU_+U&5kNșQW:ӒOJ$ + Vp + +HW[OK~WcJ ӏss ̞d2 +Sq=kJUWoϸ@^G'Kb$GP Ȇ!ş1`lUx/- 8K㕔% Xm/,J>pObGn U'$ă +u 'cBJED8]V%O/vlRxYiO"]K) pAS>5af=HL׀Q|ҠT=,a# _` ?E +ȼ xL%)SRAO ɘQηaʌ!;L&Z +b,X a&3&>W|/UA{W˵CaRD2J + @Ub5SAb\l0R @mHe % +%y lϴy'b~F=랴XecR=)bӀЍJ,S27 I>KPZ Ce " L.9ł.aJ i\j3K.㮷8 +d|F 4h0P + LTjKxy.r8-ܼ䁆QJĸq'V6_[>:c78: Y*4F$PG,Hi7 F YA8A&LjXxqE < 4ԇӔk X*U
'IeA^Q̠4 UGp= Y]C;9P6wb2cxbZu iʎ tp6VGPIcXǬ_)CroЖ!W,2:_euwO7E 4M x!)%r/c&OHZ!eHQH "u>/섈N_DN_DD p)&SGxlnja-uMdژ~:6 +`=0ڠ + +P8{ӬGd +q#d}A1M + +[gZAQ,VRP{A(+iieZAQuSe`Z{ k%2h%EYTK +[cZAQjsJ)ՒVVP-´J +k_D+)ZZNS>)˥i` +HWn9S̥fOE]h]#qi[d4&GJe6ό( GD6ƄΨFN z$>xF/4ưzj3Һf J5qDs*Вi];&o۱V +ip 8Yqfs@0!!T@ -N4F萧oԶ d;ӓH +[K:LytĕS6hZ^; <OY]SGI)ʻۛvn Aѡ_(.\$ +| |_]FW27@ ʒ^7/# R'}ҡfg˩˃｣YAF4;&Q]ZѝɁUDz΄5iVjTѯx@{S+>eiAչOʊOYZ +m|,- +d, VNUPV0e*b,- +dieeP +d00x[lP`*@Վ,- +Oӥj M'ҠXyJ'_3BԄb`Qrz<B#$7"SKBd m ~Hz\!kz(1"!/8;ܬ3~ȏ\Qiēqc +e U =v]ٍ +i;⌋ H O
u"uϚe)k~;̸tsڼk wPD>+!;) U<LJL'T %zehyCGmLo" P I&DS0hn1k r Q;j+ `lH9v +a8?f~*pnTtvVß \O<!p9%mr6M^Gg1e@Qs
5ƉrB\Bg),%+S~NLy%Sʔ[2)Sf[L%S2vc +e +LU)BE +HW]O\9}_G{rdD2 4H>t3ba@}`O.aR_ W*<ZwxkY~I878A by6"[i l0yyԓ +fL.LC *k{C+29"({hS¸g +c'SrʥrSΛgT UBP4, 9kBS9 8~q%TtAǥ;6H/ &zº4]XDžu[Ƌ%a5o"u+aCy1 㟩C/ƍx oyW >SJ3AJ.Nsp~:=]LŴ ~(m_zaKܚJ|:m^, *$WSY R=E!|flF;5s'J[Β/y+W_i}$b NJc5?kB)m)Z|GS^_js}Q=Rmf'ԄY[!sY?cY'EiMA"(ZNX x +XƾV/G~c3[Y!)EQzs}Ə An9Zrl0q{EsMW< ="Hi'//o/REDЁs+}Ē XS1Aw Ѩ$ %
0#['G~8ڇ}!M ՔMӂ6LMb 9TЧ d;*0
yTцc=NmSSAvlTцip N6 [q*hÔ'J>)ۜ*0
w8USSAT:u8iTЧ ;*0
deSE`p*h '=N}1DTцO NzxEWaJxl=vX syu_"+e}TT X: 67T/\N3ppe
0jWp_r%T\ Q-y)cFY6W3Ĉ: %Whi+4dN ]kߕ# hViIE E*V'ғ<@8I H?^Q 7M ;M *Pm!QLS)VfhD(z eT: }w]H//Y#:c$yL$ yߖ'yP'<rQٖ,FR"44l/pK*Wo$ 53y4%0 1 g}Lӓ4I 32;bA&&Une2;V^z/K\NJ
: +p
whUeS._іkmពG +HW]O }_Gq.7 ID<%0I +*V[veӃ2AH||\ծE#mmT &S*At MD/ +D6t.َLl +v b -J =ePU(z(0^=u%RG$J`QhQB!uZN z vwQxQxQQ/:vEmMJ1bTиVEsZ d:Nt>kk.HgMyc4ڐϠ7 z,㔋?%4<>|rע ć4
3[ ^5F%KyePj`{!痟5ՆγV.b%E ] 4^0GZ "/nO nm trN!(oϮs$z)Ng< +QR/]!>;yOϼO
E* ?Ql Rwrv?
|:S` /"P4&G 1O^_tm@ +o?擯YRBjKpWau\Sǣ.?YQh*in㱄:f@UWl@jz\"L,M]AMZ0a9Y1 +LpB*2ZplMSB 8XmN-zp*2Zpl)Smk(}*ݱd,shԛ +')&8%`unwCphC&eN-86)SjqJv\SF .V8־-86xF Thz{{,"Đ/7en*B|tD.mnCy7Fm3_qgk]C.b~Z*b=tjŋ1%Ol]E՜<Տ̀nYR +W%4RQw0sY+ej5NNh St.3E ȫd\ugQwt+h.*ss=V;QX#.1ǐϋ!7: Cn= +:و}w6 %x5xj;fԌNl
i0@ Q7 nfÆ i#q35NS ;44ԻM0Y. K2#Ȼ(dvB3wg ozN1N>+b$(9\Syƥ1u/ih +r-6&֪"HFK Uh5XQhɵ +HWn8WH
2Ysd hv989x,,Idu="_-,^-ԮZ =6jo
sx`BvRfj!#rY.<KBsC.lu]*urd|LJV֬aIY.D4LV` 0c +U9 }ȗ2(i1l&Q0(N0<.ӤN&Cor U}OlG
:Sٚcb _<6Eb$+8R!+: цuq Gr AM<G[<m. }izetRW7?$ v3 <,5hN 6bMli(.Hc +:4tq4? +ZВPcȔ!x3eЙ21e +/6
cD4E_MmD76#O:W+Z4'N Ojx}k^\/7rgymş1KnSV7/D~9EhŇ~_v +q<T/szRUsyLo}w1\'6w0T۴&gֻ:cҌC,o`ΞV )dq
0(sm͈'W9o~JK v6 +2u YGYA^Wu5d kD5di+B 6}
<2< +\ +K5d];Jν LFK'0%M#p7c_eŗyPT +Q;TDe*bv M} Za ӜQoŎ +U
m[:V%2>FqIVbuJV >ת1]0 K$j*;hHzbtj쌝8G8^Ù珎XqBݞ':BdzeψM{zhĽ㜙wnsԵ=C>@zbbaץ{1:OKjR"'Ŗm +^]kn"Ip}$4p)
(%AJfc|60=)!n _; LQ&z(Է(t}ټ.osmݷ***UISB:O*tO +*/FN%+Эd6-o[4Xм(>aKEv ,jQ[ldMw;%g{"v3<"PxRܞkQ 7)zI)k纔"ߦ3mJY;קd(8z+ +HWn$WK{呦m ۲0|t.)6]F _,t00 }O+kʧ-&۶ޔЄ`BlBg2P}\}{ #qMD읹ODI[ ۆNCc')d= ,ӪmJٴMk_P5 ř&~i͖Tujdf +m; ZXVm ULNRTM1(M^#TݵbՇupB e
M ~A5a'Ζt»M2ckB>\7MN|%-x.0IifB|C~B .aS&z 91]I/Wzji嗪-Rӣ JLA87h.) +fj9W\TDvs khgnV#bbKS}W4o +Nmӳ˅[m8]d5&aZ71pqƦM.F \ +( W
l66S7ZKbaAR었X]`!aazb-`d(mN Gr3G 'nMbZ煋̥ȰspQ\fM[3&,p*A4KT #E ZƆr#&$Sia7s["\(v̊S2bR¦)X+&xs+;+oi`s`-2_&+W.<1{-w"˱lѝ[vbt0Ϗi "<x#LѢg3H]@Kt`h x %CZN9)Sfe1bVXQcގ, l fV`t*M'xA-'4:)M]0Lw!jGo SD1-~7][
+g]x' mcM8^7 Fx'fзȨQc +dO Fx1aTjyeF?߯UnEBOYI߶` y\Q uYE7}ծAUXCju>ϑ]uW'`=0JSrѮ57pcD D˧"ok;sWӨ"$7?T'l"Z':7:UO]5|i3Bt 9 P{$$Q47>1*Us: /"oSc
y5*ȥUͮĬ*G*f0+ Ԍ~v_xJ Ϋ*qkhSx8D2k%qtDm@qR.}`p3<יlװEB0aa7,2=%F噂la43Zk=Xci:im/k%y-ř Л:q|iz +j<&+ =s_S$0*O +zDO 7 0QAͮԪ~pf7QgaG! i7zy}Sհ
$ F@Tz^(GG1E`#KFĥ~<Q-噵yVݘC<,bS:)ֶX3Jζ$HgVz*a<j; *_iA7([ςFM']ӝEFmPS@& ]/T`ѣQ((\v9BKSf0Zq +E¨=inDc'I== du<{i5 mV}vr7r")BsAN'-v8u3|ꍬbZS +V%J>G~}8h`Y + \ R?? ǰX0J;|mUj$KBr L\|*}mαI?ҫm#+qe<mk{g/%)<1$KfHD) + T| (<23o3 BቺWHi a/bF ߚ ĥ/eFFx&~ÃW8m 6ͻ*dŰ_Iyȵ~uowּcE !I=ޛ *ſ#zpT +MyBB2G* jBEԞ띧G@_ ]˞*dۮoN3=]ʸRTs
T\(DRG?r>xG$rpѤ8e?-_@FmHpɢH5*<;+,sL$B +ߗva}\ROo\~""gLf!k;fB$$ݐT air΄,;a M]d K
sIY[@lM R2 Oΰ +O$VIT,bqfvE~2 j3H&=Y$XBP+SoEt@ mޱ} -$ޒ"A^V.Í`TDB" ٱ(Vwx|~x x$$Tqȭ >dˡj@EH |/Xz:ЩV ::[c'n&KH:TЩ&7XW@Lw(TB]?b_ն|d@8T+U{㒃[pp% + &1f .! !iހ'#AYkb/N,W +)8."*D#Em,֞TTan\ x@JA hu;XAw]ϋ3ī<]ebkH@-{8CEAJ +1 .8S4l7AAEE\ ZFB*JAذ@5#D똨LDʗ) +d K
wؘx0 0e$b
H]tXy(brX̷ڴNHcРz>j,8ІKuXZt +Y~bx DѝjaUNq +TG +UJ/ +Xt O(%( + hͱB 21"Z\m&ЄEd,1r:YCIY"%ck#
+6( <Au`}TYI+đctϤ \f$^ 1ONNWyF]Y9^WB1:7ɳEe&/rB] h;*3Qx.&)?z8L0چ{5bԘKO/4^`:1(i:(QMH1,)AqJ ?RaQ46j:J+W%Jܑ r{f9': ȩVHޱh)$- Wێ}WPN bXcȃkK+AOsNU Im #!˪:u )*P7V69 mm`G +!hX(Woy +V ?C!?J +hxHZ(al MB?IX + Rإd7ǣ)sf]'NN7FIw.u,mhM-WвgB 1 Zh9 +C"V ?2 +2/)s$և 1nCF+sP$! jD: %~0N x̲P( + #EB("E숈fD"r[ q 8sP Ђ1u 0̈ +d$ KJ +zI, [@5(a0AZJ"&Iyq./Q62D|&sT2fi +vN2"8' !`嘐h0$9fndDIaoYaڗNd8Ρ^2lM@"Uc']qQl +ȢR:͘-=őIQ*ϒ'eH XLB2+ [C&Y^Q-@',J"ΏKk
j3ʘhTT߲ls{(aGy/g7Kfd^ 0 ¨R +հA6T[Fit& lc{1<X|>Bޑñ3$rhW2 +5F'.6fG P^u']hnB¹xx\Ahe!ąv)-١.G?猯/wNE.1҃6pƶfȯavF,.
mwk= dݔ{si5R@%n 44rR2'!qa%nYX?hA:] ̬Mniis맶qyv[;u ?qkֹK;9E_a7*@"G}YO< +o x풭zQf;ڹs4kR}ŋz=` Z*T*$^!1ߪZ~NbZUE D2v|8v0PcS+RKtSG6vA0NKUjPS !Os -opձkרſ +endstream
endobj
848 0 obj
[
/Indexed 15407 0 R 255 849 0 R
]
endobj
849 0 obj
<< /Length 250 /Filter /FlateDecode >>
stream
+H1 +]IE+8$HZKHdRKoO{</x( +endstream
endobj
850 0 obj
<<
/Type /Font
/Subtype /Type1
/FirstChar 32
/LastChar 181
/Widths [ 278 333 474 556 556 889 722 238 333 333 389 584 278 333 278 278 556
556 556 556 556 556 556 556 556 556 333 333 584 584 584 611 975
722 722 722 722 667 611 778 722 278 556 722 611 833 722 778 667
778 722 667 611 722 667 944 667 667 611 333 278 333 584 556 333
556 611 556 611 556 333 611 611 278 278 556 278 889 611 611 611
611 389 556 333 611 556 778 556 556 500 389 280 389 584 278 278
278 278 278 278 278 278 278 278 278 278 278 278 278 278 278 278
278 278 278 278 278 278 278 278 278 278 278 278 278 278 278 278
278 556 556 278 278 278 278 278 737 278 278 278 278 278 278 278
584 278 278 278 611 ]
/Encoding /WinAnsiEncoding
/BaseFont /ECGNJJ+Helvetica-BoldOblique
/FontDescriptor 856 0 R
>>
endobj
851 0 obj
<<
/Type /Font
/Subtype /Type1
/FirstChar 32
/LastChar 181
/Widths [ 278 278 355 556 556 889 667 191 333 333 389 584 278 333 278 278 556
556 556 556 556 556 556 556 556 556 278 278 584 584 584 556 1015
667 667 722 722 667 611 778 722 278 500 667 556 833 722 778 667
778 722 667 611 722 667 944 667 667 611 278 278 278 469 556 333
556 556 500 556 556 278 556 556 222 222 500 222 833 556 556 556
556 333 500 278 556 500 722 500 500 500 334 260 334 584 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 333 333 0 0 0 0 0 0 0 0 0 0 0 278
0 556 556 0 0 0 0 0 737 0 0 0 333 0 0 0 584 0 0 0 556 ]
/Encoding /WinAnsiEncoding
/BaseFont /ECGNKF+Helvetica-Oblique
/FontDescriptor 858 0 R
>>
endobj
852 0 obj
<<
/Type /Font
/Subtype /Type1
/FirstChar 32
/LastChar 181
/Widths [ 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600
600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600
600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600
600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600
600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600
600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600
600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600
600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600
600 600 600 600 600 600 600 600 600 600 600 600 600 600 600 600
600 600 600 600 600 ]
/Encoding /WinAnsiEncoding
/BaseFont /ECNMLA+Courier
/FontDescriptor 860 0 R
>>
endobj
853 0 obj
<<
/Type /Font
/Subtype /Type1
/FirstChar 32
/LastChar 181
/Widths [ 278 278 355 556 556 889 667 191 333 333 389 584 278 333 278 278 556
556 556 556 556 556 556 556 556 556 278 278 584 584 584 556 1015
667 667 722 722 667 611 778 722 278 500 667 556 833 722 778 667
778 722 667 611 722 667 944 667 667 611 278 278 278 469 556 333
556 556 500 556 556 278 556 556 222 222 500 222 833 556 556 556
556 333 500 278 556 500 722 500 500 500 334 260 334 584 278 278
278 278 278 278 278 278 278 278 278 278 278 278 278 278 278 278
278 278 278 278 278 278 278 278 278 278 278 278 278 278 278 278
278 556 556 278 278 278 278 278 737 278 278 278 278 278 278 278
584 278 278 278 556 ]
/Encoding /WinAnsiEncoding
/BaseFont /ECGNKF+Helvetica-Oblique
/FontDescriptor 858 0 R
>>
endobj
854 0 obj
<<
/Type /Font
/Subtype /Type1
/FirstChar 32
/LastChar 181
/Widths [ 250 333 408 500 500 833 778 180 333 333 500 564 250 333 250 278 500
500 500 500 500 500 500 500 500 500 278 278 564 564 564 444 921
722 667 667 722 611 556 722 722 333 389 722 611 889 722 722 556
722 667 556 611 722 722 944 722 722 611 333 278 333 469 500 333
444 500 444 500 444 333 500 500 278 278 500 278 778 500 500 500
500 333 389 278 500 500 722 500 500 444 480 200 480 541 250 250
250 250 250 250 250 250 250 250 250 250 250 250 250 250 250 250
250 250 250 250 250 250 250 250 250 250 250 250 250 250 250 250
250 500 500 250 250 250 250 250 760 250 250 250 250 250 250 250
564 250 250 250 500 ]
/Encoding /WinAnsiEncoding
/BaseFont /EDBBCL+Times-Roman
/FontDescriptor 862 0 R
>>
endobj
855 0 obj
<<
/Type /Font
/Subtype /Type1
/FirstChar 32
/LastChar 181
/Widths [ 250 333 500 500 500 889 833 250 333 333 444 606 250 389 250 315 500
500 500 500 500 500 500 500 500 500 250 250 606 606 606 444 833
722 667 685 778 611 556 778 778 389 389 722 611 944 778 833 667
833 722 556 611 778 667 1000 722 611 667 333 606 333 606 500 333
556 537 444 556 444 333 500 556 333 333 556 333 833 556 556 556
537 389 444 389 556 556 833 500 556 500 333 606 333 606 250 250
250 250 250 250 250 250 250 250 250 250 250 250 250 250 250 250
250 250 250 250 250 250 250 250 250 250 250 250 250 250 250 250
250 500 500 250 250 250 250 250 747 250 250 250 250 250 250 250
606 250 250 250 556 ]
/Encoding /WinAnsiEncoding
/BaseFont /EDKAAG+Palatino-BoldItalic
/FontDescriptor 864 0 R
>>
endobj
856 0 obj
<<
/Type /FontDescriptor
/Ascent 718
/CapHeight 718
/Descent -207
/Flags 262240
/FontBBox [ -174 -228 1114 962 ]
/FontName /ECGNJJ+Helvetica-BoldOblique
/ItalicAngle -12
/StemV 140
/XHeight 532
/CharSet (/N/e/E/space/W/t/A/asterisk/colon/o/R/D)
/FontFile3 857 0 R
>>
endobj
857 0 obj
<< /Filter /FlateDecode /Length 1040 /Subtype /Type1C >>
stream
+HlQmL[U>RW6t#$K/R(k˗1nB _+T- b`3bCL{ʁb?<'99ϓyb4Ԋr᪪징NnpyZ\G% +6lzcNx'dA<"
Y"WYE
Gdbܐy(PE"a!_xn2jpC<촅ĐEH7_cM mL0+B +w pw/oXdgpeIp8<8N oPD13ab #8{6 +endstream
endobj
858 0 obj
<<
/Type /FontDescriptor
/Ascent 718
/CapHeight 718
/Descent -207
/Flags 96
/FontBBox [ -170 -225 1116 931 ]
/FontName /ECGNKF+Helvetica-Oblique
/ItalicAngle -12
/StemV 88
/XHeight 523
/CharSet (/t/l/e/quotedbl/hyphen/quotedblright/u/nine/f/I/H/period/v/colon/h/P/sla\
sh/w/i/F/L/d/y/n/zero/j/N/M/one/k/O/equal/A/two/m/Q/x/three/o/parenleft/\
R/K/underscore/p/quotedblleft/S/parenright/E/five/U/T/B/r/space/six/g/b/\
C/s/W/c/a/D/comma)
/FontFile3 859 0 R
>>
endobj
859 0 obj
<< /Filter /FlateDecode /Length 3992 /Subtype /Type1C >>
stream
+HlT PT]PE $ +"H6 +.fcaVXuD3ĩZcWf!!]]׳i;=w ,ǰ,;zܴEoNoZc5s
ውke&le#GTbӰ1hcU6fko?:WF0xG b8U=x]g-,Z_b^nnRd]T\쌩5fhqz]R^Ѥ\o)5Xtks K +K .iݐd1X:EgЕL|]*E&]Rΰ6/DgXKb3J&_DR0, cr&e4,#2x2SX0L13L9$Q)c2 sL xdv5{/w2FV =_\3s{3<Gh.hEXѨ1la ,j࿂҂= :bqND]٤ ~=6ʄ,er?Ʌ ֶK$Wb`G2xӟY)gv}O F,_>ԋ j (!N.>/a0%{0q
C 3{uVO7eM?k `;d!
[l'c4'ȕu;dpXU2z ,g_LHq`%W^Nc.8뒑Dx(`JHަq"B 41s0 C1C䜀|6+ + z2T+*P1b[\re ?#.u"o k+0Zєek笔"q/MO܌ +R/ ]j;9K%Pi`d;*EulL(
ծ:ҝ]j1BPz}`i|ۛ okT?f-]K'l>wq .4zFh?K5LK/Jԏ7m@;a%4y +JYd?*#`ncЏ? CNQ`>CCu
w 4ٞ`Rx5i%ü\oFp{%5 }q5"nZLf<4!++T\^IƮsNGI +) DžZ4 +ñqsv§'p ~l-.H AHK)H zdC$3 t>-w +( 1=n$UMN(rNxw l"cޱPD^wz?4TsJ'=x;*Mtz;ht:]NPvI 5Do \E1щczl71 +aCp_|v*M C/* 9 g8؋ @tl8=A/
d[5H6t<5! #r\x4>AmU755<xpFzhE̯[5Yr &l <@- PQ1ӧ=O RI301 QpKtMz&=!--6= +, }耜p 8ʿ?ß$Tդ Y+tJl':p(# 1uع W c[N< (Vkk| w +X5Ꚇ.~6 qxט?BD*^]Xtg |hOYX}(Y51Ť:
OƂja):[? fqcpm['&ɻ8f6 ;CQѬey\J/uK1/
_8AO* +<Q5I4 0ב-8yl~LyBv m)A]*YkzDFL73p*DS؎Ƈ +y,$N@ 3t|q-{# +pNb:ԅ #)<-CoF>yZ5* DW^̽ڬt#{R7(%໘U;& kb +ȁk^KCt#Yg'h^~%=|Fq-#6k]XqѰꜦ4(k"S)9)&Hd naB*?,-indvpY~/%0Y5q7O`VfRY͑Go5uDkYr|3hKe)hF"ʅ[5MQN/ +; +2SQ72qؤ}#FZh8U
+K2٫ =
+endstream
endobj
860 0 obj
<<
/Type /FontDescriptor
/Ascent 629
/CapHeight 562
/Descent -157
/Flags 35
/FontBBox [ -28 -250 628 805 ]
/FontName /ECNMLA+Courier
/ItalicAngle 0
/StemV 51
/XHeight 426
/CharSet (/l/p/hyphen/ampersand/bracketright/r/space/P/F/zero/numbersign/two/C/bra\
cketleft/c/d/comma)
/FontFile3 861 0 R
>>
endobj
861 0 obj
<< /Filter /FlateDecode /Length 1349 /Subtype /Type1C >>
stream
+HLT
LWCkrpwj#b+'SANQ +QDkVGE3ؠՈTRKk[-̒Ӵ%ߛ̛ɣ)izЏ,[w6]3e=%{вJTˣ4]͊/3bMn[tBZ(5M;EFNlݞf )41gi~_A,ѱi)ےMcVۆ؍>&KBi(4dMT,PZj8Qޥ(?* +QPj)Q*JMeN8znRMWTvUzWMf?rF:9ܗu[B1Y҂*0f$?UB + 3mcDvPo&-oab9/v\r q]rQ˦/OߐD쨅YLbmBC Eյ+ L%u NŜ4I>Sw@v] c$*j[J_9^;%u= xmR}C
dаp8ނ
d0 ;AjeCEF{ PP
]K1 "\ 10 #p{R + ߆ ?%x*K:m$Gde } +endstream
endobj
862 0 obj
<<
/Type /FontDescriptor
/Ascent 699
/CapHeight 662
/Descent -217
/Flags 34
/FontBBox [ -168 -218 1000 898 ]
/FontName /EDBBCL+Times-Roman
/ItalicAngle 0
/StemV 84
/XHeight 450
/CharSet (/equal)
/FontFile3 863 0 R
>>
endobj
863 0 obj
<< /Filter /FlateDecode /Length 334 /Subtype /Type1C >>
stream
+Hbd`ab`ddvuqrrM-
M f!C I <bm~%*w7a*߯ +122rZjs~AeQfzFF4 @1%?)U!$5X3/9 ($5EOA1'G!dBBPjqjQPRbDĔĢl4̼ʂTGwļ"LҤ̔Ģb^/Ld_ ##> '.uq ~[SkﲩߋپϚv揰frQ<@7r +endstream
endobj
864 0 obj
<<
/Type /FontDescriptor
/Ascent 726
/CapHeight 681
/Descent -271
/Flags 262242
/FontBBox [ -170 -271 1073 926 ]
/FontName /EDKAAG+Palatino-BoldItalic
/ItalicAngle -10
/StemV 122
/XHeight 469
/CharSet (/n/p/l/e/S/E/hyphen/q/r/space/J/s/i/F/W/a/t/u/H/A/B/g/m/b/C/x/o/R/D/d)
/FontFile3 865 0 R
>>
endobj
865 0 obj
<< /Filter /FlateDecode /Length 4222 /Subtype /Type1C >>
stream
+Hl PSWo%777mqUtE:VC ŪGH MBB#rcn %"GK" (2Zu۱nz.^f7b8sf|\ +Q( JJI`4R($zގ |S@Jb0ә3 +\_V*? S(k: `ӆ=$EM|Oi=vϺ=@$KHDjt@FL~R&*6AR £D$+*rgjD! +raRrP&!Rs2Y_ H( $d"3A!IdūriD!ށ h } +X9 +wf)KD +L1pc&_I ^'"#D,a^ 엉'֠XB<c-7jt (XO}*O d:ApjgwٙrfÇ$_|ҔyTti)}Tc0D44 qĄu#5V$ژ 2x/+HTqLQu:\`!j]ܹױѮ /;/#).yMxpS9p,)<O1U:Rx|BalAV9m55>atsMB̰Ԥڰjblf=;`Ǫ 7afvY7 m<F "z4 (gW q/8`c$UG ɁUy8H~?ȇ%HxCe=G~kc
$gLR]Lrb#L\2bDǜGxYVy܁يY8VLNNG`, V a\$f}=#˚֭zrGYE= +c_ Td4nfS h0r6֧sjn7cv+*5gp +Xui'%0 `Q -G4 (̀as g+i-}x,`8I\dz,L'֤!"& =I j !&'!DͬRujz Y*ynZkLݜ=qju E $$<I HCC BDIP=V鵮^m7vxۃ[ws}^ gQMHD@\ܬc[ .o {:Āb`DFخWIc ƄKA9CoLzWB*,7σ ݮ` a +߿Dz$
cFq >y%AJ w#N[v]q_c+\I^QY7,U +DF 9@8/:}Rk8T/r'StY~ B*HvxO?p>WmG 1^gbA%He#Nx`PΗ7&:_58{i}[cCcT R]A6~VYT}t0O +J"Y%`9 QaMx[ zz=r>C֜|VvZj +$1k `hV7h5vZϛ<"d#>n/.Aw pFCP!K[T<)^Ǐ8T%{gKRC_-LL|~SBYHEqX]og<3jmѩq qFuM4be P6
4ث~e3;Dm~8 ~H@yzUgpkY#cn}T věb<& +ǻXp؝Y^[/Z]z #vT"7]b|U륐Am"6o
1gĎ=0NNT;rOlf3ܳP3kdvbE8 yb-kSUE +1liA"xY3G XtOGQqww={Z]Yd%y?Ym -\M,s貃QL |> Ӿ> Xm lĽ2,.FsX_#_3-o?,% Obwp){t0qvV\k%1y=ڃT8z1# g] W֝fJww- g09G-CIZHF5Uȷ ~SߦMi$ˣ9G|b xv]w\a9>eq<͈.qQ3G݇X +>0[DSGOYh7s x1{NBr5Kiʠ&CmހX PCC0כiQqj>(&2kh E(Y2Fi/i<ʹc)B6*lVUYf^L[WH+7 UocL5T$3
/n{| j*U%44$(O,<?QkM!NؽJZL\\}e/ Mwl./GfkWjkX!X؋|ֽ>58$oTT6ҏ3АB<X6+foɮawglAI "[؉R+DXWf cA ZW %5C41}&Ld +endstream
endobj
866 0 obj
<< /Filter /FlateDecode /Length 867 0 R >>
stream
+HMo0 :"u܀@ ءlHt;Jc Eݙolw _HPlSdl4MߟՄ$Mh]Rg ;W!<U+@)ysE,p?`6egwtq(| o | ̛:()g+X|̓nRi+h} Ge?ڍ4pN[JɱnHv oXEپ[ y6B6m~ =HJ<h#sOY3"AqJD_d7/(U/tKQT3AXt%%NM)jjqϿګ(rЂN & 侦ugEkXIN^@Gax + 2!YUΫd!0]#sPɩ[LAq"eB +?*>C R}Eڎf&9xՉ&np(2NV;b<GEuiL>8d,.gU~r= s_#O[|tOL'v*AADTzR + +M+ԻKxwl +H2PI0 +HUj[A Why.[h,J
]l6.]{>|'Y`{t =inn 9_,rIYCMOrq.J.^* +W[ԨM˘'rNin mOPixn{I9OWpq[>]o镩 q{>o$\G.dë? i?ۤ:DܾNFs&R}@,S +tO~i+#[# MlJVx @K *z +HR05735T01340T2PHd diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Doku/waage.htm b/Bachelor/Mikroprozessorsysteme2/mi2/Doku/waage.htm new file mode 100644 index 0000000..044cbc7 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Doku/waage.htm @@ -0,0 +1,147 @@ +<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2//EN"> +<html> +<head> + <meta http-equiv="CONTENT-TYPE" + content="text/html; charset=iso-8859-15"> + <title>waage</title> + <meta name="GENERATOR" content="OpenOffice.org 1.0.1 (Linux)"> + <meta name="AUTHOR" content="m.pester@fbi.fh-darmstadt.de"> + <meta name="CREATED" content="20030812;16215500"> + <meta name="CHANGEDBY" content="Manfred Pester"> + <meta name="CHANGED" content="20030812;16281900"> + <meta name="EXPIRATION_TIME" content="365"> +</head> +<body lang="de-DE" + background="../../../internet/labor/miarm/waage/papier.gif"> +<table width="100%" cellpadding="2" cellspacing="2" + style="page-break-before: always;"> + <tbody> + <tr> + <td><span class="sd-abs-pos" + style="position: absolute; width: 374px; top: 609px; left: 694px;"> <img + src="../../../internet/labor/miarm/waage/PIC00005.JPG" name="Grafik2" + width="374" height="299" border="0"></span><span class="sd-abs-pos" + style="position: absolute; top: 1.85cm; left: 2.98cm; width: 374px;"> </span> + <p><a + href="http://www.fbi.fh-darmstadt.de/%7Emani/labor/mihome.htm">Softwareentwicklung +fr </a> <br> + <a href="http://www.fbi.fh-darmstadt.de/%7Emani/labor/mihome.htm">Embedded +Systeme</a></p> + </td> + <td> + <h1 align="center"><u>Saitenoszillator-Waage</u></h1> + </td> + <td> + <p align="right"> + <br> + <br> + </p> + </td> + </tr> + </tbody> +</table> +<br> +<center> +<table border="1" cellpadding="2" cellspacing="3" + style="width: 492px; height: 404px;"> + <col width="62"> <col width="103"> <col width="301"> <tbody> + <tr> + <td colspan="3" width="480"> + <p align="center"><font size="4">Anschlubelegung der Waage</font></p> + </td> + </tr> + <tr> + <td width="62"> + <p>Kontakt</p> + </td> + <td width="103"> + <p>Bezeichnung</p> + </td> + <td width="301"> + <p>Bemerkung</p> + </td> + </tr> + <tr> + <td width="62"> + <p align="center">1</p> + </td> + <td width="103"> + <p>Signal 1</p> + </td> + <td width="301"> + <p>ca. 16 kHz, wird bei Belastung hher <br> +Saite wird gespannt.</p> + </td> + </tr> + <tr> + <td width="62"> + <p align="center">2</p> + </td> + <td width="103"> + <p>Signal GND</p> + </td> + <td width="301"> + <p>nicht mit GND verbinden</p> + </td> + </tr> + <tr> + <td width="62"> + <p align="center">3</p> + </td> + <td width="103"> + <p>Signal GND</p> + </td> + <td width="301"> + <p>nicht mit GND verbinden</p> + </td> + </tr> + <tr> + <td width="62"> + <p align="center">4<span + style="position: absolute; top: 1.85cm; left: 2.98cm; width: 374px;" + class="sd-abs-pos"> </span></p> + </td> + <td width="103"> + <p>Signal 2</p> + </td> + <td width="301"> + <p>ca. 16 kHz, wird bei Belastung kleiner <br> +Saite wird entlastet</p> + </td> + </tr> + <tr> + <td width="62"> + <p align="center">5</p> + </td> + <td width="103"> + <p>+ 22V</p> + </td> + <td width="301"> + <p>Versorgungsspannung</p> + </td> + </tr> + <tr> + <td width="62"> + <p align="center">6</p> + </td> + <td width="103"> + <p>GND</p> + </td> + <td width="301"> + <p>nicht mit Signal GND verbinden<br> + </p> + </td> + </tr> + </tbody> +</table> +<span style="position: absolute; width: 374px; top: 612px; left: 211px;" + class="sd-abs-pos"> <img border="0" height="299" width="374" + name="Grafik1" + src="file:///home/mani/labor/internet/labor/miarm/waage/PIC00002.JPG"></span></center> +<div style="text-align: center;"><br> +<span class="sd-abs-pos" + style="position: absolute; top: 1.85cm; left: 2.98cm; width: 374px;"></span>Bilder +der Waage<br> +</div> +</body> +</html> diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1.pdf Binary files differnew file mode 100644 index 0000000..73b4538 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe1.c new file mode 100644 index 0000000..9d919c5 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe1.c @@ -0,0 +1,16 @@ +// Lsung zu Termin1 +// Aufgabe 1 +// Namen: Sven Eisenhauer; ____________ +// Matr.: 707173; ____________ +// vom: 18.10.2005 + +int main (void) +{ + int a; + int b; + + a=0x1; + b=0x2; + + return (0); +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe2.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe2.c new file mode 100644 index 0000000..289ef01 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe2.c @@ -0,0 +1,16 @@ +// Lsung zu Termin1 +// Aufgabe 2 +// Namen: Sven Eisenhauer; ____________ +// Matr.: 707173; ____________ +// vom: 18.10.2005 + +int a; +int b; + +int main (void) +{ + a=0x1; + b=0x2; + + return (0); +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe3.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe3.c new file mode 100644 index 0000000..eddf6fa --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe3.c @@ -0,0 +1,22 @@ +// Lsung zu Termin1 +// Aufgabe 3 +// Namen: Sven Eisenhauer; ____________ +// Matr.: 707173; ____________ +// vom: 18.10.2005 + +int a; +int b; + +int main (void) +{ + int x; + int y; + + x=0x1; + y=0x2; + + a=x; + b=y; + + return (0); +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe4.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe4.c new file mode 100644 index 0000000..5b573bf --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe4.c @@ -0,0 +1,25 @@ +// Lsung zu Termin1 +// Aufgabe 4 +// Namen: Sven Eisenhauer; ____________ +// Matr.: 707173; ____________ +// vom: 18.10.2005 + +int a; + +void addition(int m, int n, int sum) +{ + sum=m+n; +} + +int main (void) +{ + int x; + int y; + + x=0x1; + y=0x2; + + addition(x,y,a); + + return (0); +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe5.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe5.c new file mode 100644 index 0000000..06c4437 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/Termin1Aufgabe5.c @@ -0,0 +1,25 @@ +// Lsung zu Termin1 +// Aufgabe 5 +// Namen: Sven Eisenhauer; ____________ +// Matr.: 707173; ____________ +// vom: 18.10.2005 + +int a; + +void addition(int *m, int *n, int sum) +{ + sum=m+n; +} + +int main (void) +{ + int x; + int y; + + x=0x1; + y=0x2; + + addition(&x,&y,a); + + return (0); +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/frank_micsys2_praktikum01.zip b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/frank_micsys2_praktikum01.zip Binary files differnew file mode 100644 index 0000000..7cdf593 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/frank_micsys2_praktikum01.zip diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/makefile b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/makefile new file mode 100644 index 0000000..3180fee --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin1/makefile @@ -0,0 +1,11 @@ +# Quellendatei +FILE = Termin1Aufgabe1 +# Optimierungsstufe +OPTI = 1 + +all: +# bersetzen und binden der Quelldatei + arm-elf-gcc -g -O$(OPTI) $(FILE).c -o $(FILE).elf +# Erzeugen des Assemblercode aus der C-Datei + arm-elf-gcc -S -O$(OPTI) $(FILE).c + diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/Termin2.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/Termin2.pdf Binary files differnew file mode 100644 index 0000000..ca65e31 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/Termin2.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/Termin2Aufgabe1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/Termin2Aufgabe1.c new file mode 100644 index 0000000..dec24cd --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/Termin2Aufgabe1.c @@ -0,0 +1,12 @@ +// Lsung zu Termin2
+// Aufgabe 1
+// Namen: __________; ___________
+// Matr.: __________; ___________
+// vom : __________
+//
+
+int main(void)
+{
+
+ return 0;
+}
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/Termin2Aufgabe4.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/Termin2Aufgabe4.c new file mode 100644 index 0000000..f2e0832 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/Termin2Aufgabe4.c @@ -0,0 +1,20 @@ +// Lsung zu Termin2
+// Aufgabe 4
+// Namen: __________; ___________
+// Matr.: __________; ___________
+// vom : __________
+//
+
+
+void taste_irq_handler (void) __interrupt__ ((interrupt));
+
+void taste_irq_handler (void)
+{
+
+}
+
+int main(void)
+{
+
+ return 0;
+}
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/makefile1 b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/makefile1 new file mode 100644 index 0000000..4df82d6 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Aufgabe/makefile1 @@ -0,0 +1,22 @@ +FILE = Termin2Aufgabe1
+Opti = 1
+
+all:
+# bersetzen der Quelldatei
+# arm-elf-gcc -g -Ttext 0x2000000 -O$(Opti) $(FILE).c -I ../h
+ arm-elf-gcc -g -e main -Ttext 0x2000000 -O$(Opti) $(FILE).c -o $(FILE).elf -nostdlib
+
+# Erzeugen der Assemblerdatei aus der Quelldatei
+ arm-elf-gcc -S -O$(Opti) $(FILE).c
+
+# Ereugen der Objektdateien
+# arm-elf-gcc -c -g -O$(Opti) ../boot/swi.S -o swi.o
+# arm-elf-gcc -c -g -O$(Opti) ../boot/boot.S -o boot.o
+
+# Binden fr die RAM-Version
+# arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot.o swi.o $(FILE).o -o $(FILE).elf
+
+# Binden fr die FLASH-Version
+# arm-elf-ld -Ttext 0x01000000 -O$(Opti) boot.o swi.o $(FILE).o -o $(FILE).out
+# arm-elf-objcopy -I elf32-littlearm -O binary -x -S -N -g $(FILE).out $(FILE).rom
+
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/Termin2Aufgabe1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/Termin2Aufgabe1.c new file mode 100644 index 0000000..355bb20 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/Termin2Aufgabe1.c @@ -0,0 +1,21 @@ +#include "defines.h"
+
+int main(void)
+{
+ *PMC_PCER = 0x4000; // Power Enable fr Parallel I/O Controller B
+ *PIOB_PER = 0x100; // Pin 8: Enabled (Initialisiert) (Lmpchen)
+ *PIOB_OER = 0x100; // Pin 8: Pin als Ausgabe verwenden
+ // Lmpchen ist initialisiert und auf Output gesetzt.
+
+ int i;
+
+ while (1)
+ {
+ *PIOB_SODR = 0x100; // Pin 8: Lampe an
+ for (i=0; i<125000; i++); // Pause
+ *PIOB_CODR = 0x100; // Pin 8: Lampe aus
+ for (i=0; i<125000; i++); // Pause
+ }
+ return 0;
+}
+
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/Termin2Aufgabe2.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/Termin2Aufgabe2.c new file mode 100644 index 0000000..000f51a --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/Termin2Aufgabe2.c @@ -0,0 +1,22 @@ +#include "defines.h"
+
+int main(void)
+{
+ *PMC_PCER = 0x4000; // Power Enable fr Parallel I/O Controller B
+ *PIOB_PER = 0x118; // Pin 8: Enabled (Initialisiert) (Lmpchen)
+ // *PIOB_PER = 0x100; *PIOB_PER = 0x8; *PIOB_PER = 0x10
+ *PIOB_OER = 0x100; // Pin 8: Pin als Ausgabe verwenden
+
+ // Schalter werden nicht auf Input geschaltete, da dies Default Zustand ist
+ // Lmpchen ist initialisiert und auf Output gesetzt.
+
+ while (1)
+ {
+ if (!(*PIOB_PDSR & 0X8))
+ *PIOB_SODR = 0x100; // Pin 8: Lampe an
+ if (!(*PIOB_PDSR & 0x10))
+ *PIOB_CODR = 0x100; // Pin 8: Lampe aus
+ }
+ return 0;
+}
+
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/Termin2Aufgabe3.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/Termin2Aufgabe3.c new file mode 100644 index 0000000..21ed738 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/Termin2Aufgabe3.c @@ -0,0 +1,31 @@ +#include "defines.h"
+
+int main(void)
+{
+ *PMC_PCER = 0x4000; // Power Enable fr Parallel I/O Controller B
+ *PIOB_PER = 0x318; // Pin 8,9,3,4: Enabled (Initialisiert) (Lmpchen1,2,Schalter1,2)
+ // *PIOB_PER = 0x100; *PIOB_PER = 0x200; *PIOB_PER = 0x8; *PIOB_PER = 0x10
+ *PIOB_OER = 0x300; // Pin 8,9: Pin als Ausgabe verwenden (Lampe 1,2)
+
+ // Schalter werden nicht auf Input geschaltete, da dies Default Zustand ist
+ // Lmpchen ist initialisiert und auf Output gesetzt.
+
+ int i;
+
+ while (1)
+ {
+ *PIOB_SODR = 0x100; // Pin 8: Lampe 1 an
+ for (i=0; i<125000; i++); // Pause
+ *PIOB_CODR = 0x100; // Pin 8: Lampe 1 aus
+ for (i=0; i<125000; i++); // Pause
+
+ // PDSR wird erst geprft nachdem Lampe 1 aus ist
+
+ if (!(*PIOB_PDSR & 0X8))
+ *PIOB_SODR = 0x200; // Pin 8: Lampe 2 an
+ if (!(*PIOB_PDSR & 0x10))
+ *PIOB_CODR = 0x200; // Pin 8: Lampe 2 aus
+ }
+ return 0;
+}
+
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/defines.h b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/defines.h new file mode 100644 index 0000000..b325848 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Loesung/defines.h @@ -0,0 +1,16 @@ +// Power Management Controller (Atmel Docu S. 139)
+#define PMC_PCER ((volatile unsigned int*) 0xFFFF4010) // Peripheral Clock Enable Register
+#define PCER_PIOA 0x2000 // PIOA: PIOA Clock. Enable
+#define PCER_PIOB 0x4000 // PIOB: PIOB Clock. Enable
+#define PMC_PCDR ((volatile unsigned int*) 0xFFFF4014) // Peripheral Clock Disable Register
+
+
+/*****************************************************************************/
+// Parallel I/O Controller B (Atmel Docu S. 59)
+#define PIOB_PER ((volatile unsigned int*) 0xFFFF0000) // Enable Register (Atmel Docu S. 60)
+#define PIOB_PDR ((volatile unsigned int*) 0xFFFF0004) // Disable Register (Atmel Docu S. 60)
+#define PIOB_SODR ((volatile unsigned int*) 0xFFFF0030) // Set Output Data Register (Atmel Docu S. 66)
+#define PIOB_CODR ((volatile unsigned int*) 0xFFFF0034) // Clear Output Data Register (Atmel Docu S. 66)
+#define PIOB_OER ((volatile unsigned int*) 0xFFFF0010) // Output Enable Register (Atmel Docu S. 62)
+#define PIOB_ODR ((volatile unsigned int*) 0xFFFF0014) // Output Disable Register (Atmel Docu S.62)
+#define PIOB_PDSR ((volatile unsigned int*) 0xFFFF003C) // Pin Data Status Register (Atmel Docu S.67)
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2.pdf Binary files differnew file mode 100644 index 0000000..f23c20c --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe1.c new file mode 100644 index 0000000..c8e6468 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe1.c @@ -0,0 +1,12 @@ +// Lsung zu Termin2 +// Aufgabe 1 +// Namen: __________; ___________ +// Matr.: __________; ___________ +// vom : __________ +// + +int main(void) +{ + + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4.c new file mode 100644 index 0000000..66cef14 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4.c @@ -0,0 +1,20 @@ +// Lsung zu Termin2 +// Aufgabe 4 +// Namen: __________; ___________ +// Matr.: __________; ___________ +// vom : __________ +// + + +void taste_irq_handler (void) __interrupt__ ((interrupt)); + +void taste_irq_handler (void) +{ + +} + +int main(void) +{ + + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4a.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4a.c new file mode 100644 index 0000000..4bf8235 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4a.c @@ -0,0 +1,58 @@ +// Lsung zu Termin2 +// Aufgabe 4 +// Namen: __________; ___________ +// Matr.: __________; ___________ +// vom : __________ +// +#include "pio.h" +#include "pmc.h" +#include "aic.h" + +StructPMC* myPMC = PMC_BASE; +StructAIC* myAIC = AIC_BASE; +StructPIO* myPIOB = PIOB_BASE; + +void taste_irq_handler (void) __interrupt__ ((interrupt)); + +void taste_irq_handler (void) +{ + // do the things here + + // necessary?? + //myPIOB->PIO_ISR; // Read Interrupt Status Register to enable + // Interrupt again + + // switch LED1 + + myAIC->AIC_EOICR = 0x00000000; // Write to End of Interrupt Command Register + // to signal end of Interrupt Service Routine +} + +int main(void) +{ + myPMC->PMC_PCER = 0x14; // Clock PIO B + + // Initialize PIOB + myPIOB->PIO_PER = KEY1|KEY2|LED1|LED2; // Enable PIO for SW1,SW2,LED1,LED2 + myPIOB->PIO_OER = LED1|LED2; // Set LED1 and LED2 as output + myPIOB->PIO_CODR = 0x000000FF; // Clear Output Data Register + + // Enable Interrupts in CPU + // done by OS + + // Enable Interrupt for PIOB in AIC + //myAIC->AIC_SMR[] = ; // which register? what to put in it? + //myAIC->AIC_SVR[]= taste_irq_handler // Address of Interrupt handling routine... + + myAIC->AIC_IECR = PIOB_ID; // Enable Interrupt for PIOB + + // enable PIOB Interrupt + //myPIOB->PIO_IER = ; // what to put here? + + // loop to infinity + while(1) + { + } + + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4a1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4a1.c new file mode 100644 index 0000000..fb99f59 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4a1.c @@ -0,0 +1,68 @@ +// Lsung zu Termin2
+// Aufgabe 4
+// Namen: __________; ___________
+// Matr.: __________; ___________
+// vom : __________
+//
+#include "../mi2/h/pio.h"
+#include "../mi2/h/pmc.h"
+#include "../mi2/h/aic.h"
+
+StructPMC* myPMC = PMC_BASE;
+StructAIC* myAIC = AIC_BASE;
+StructPIO* myPIOB = PIOB_BASE;
+
+void taste_irq_handler (void) __attribute__ ((interrupt));
+
+void taste_irq_handler (void)
+{
+
+ volatile int keyPressed = myPIOB->PIO_ISR;
+
+ if (!(keyPressed & KEY1))
+ myPIOB->PIO_SODR = LED1;
+ //if (!(myPIOB->PIO_PDSR & KEY2))
+ if (!(keyPressed & KEY2))
+ myPIOB->PIO_CODR = LED1;
+
+ myAIC->AIC_EOICR = 0x01; // write something to register
+ // to signal end of Interrupt Service Routine
+}
+
+int main(void)
+{
+ myAIC->AIC_EOICR = myPIOB->PIO_ISR;
+ // disable all interrupt sources of pio
+ myPIOB->PIO_IDR = 0xFFFFFFFF;
+
+
+ // Initialize PIOB
+ myPIOB->PIO_PER = KEY1|KEY2|LED1; // Enable PIO for SW1,SW2,LED1,LED2
+ //myPIOB->PIO_OER = LED1|LED2; // Set LED1 and LED2 as output
+ myPIOB->PIO_OER = LED1; // Set LED1 and LED2 as output
+ myPIOB->PIO_CODR = LED1; // Clear Output Data Register
+
+
+ // Enable Interrupts in CPU
+ // done by OS
+
+ // disable PIOB Interrupt in AIC
+ myAIC->AIC_IDCR = (1<<PIOB_ID);
+ // Enable Interrupt for PIOB in AIC
+ myAIC->AIC_SMR[PIOB_ID] = AIC_SRCTYPE_EXT_LOW_LEVEL; // which register? what to put in it? 0x1 for low
+ myAIC->AIC_SVR[PIOB_ID] = (volatile unsigned int)&taste_irq_handler; // Address of Interrupt handling routine...
+
+ // enable PIOB Interrupt in AIC
+ myAIC->AIC_IECR = (1<<PIOB_ID); // Enable Interrupt for PIOB
+
+ // enable PIOB Interrupt
+ myPIOB->PIO_IER = KEY1|KEY2; // what to put here?
+
+ myPMC->PMC_PCER = (1<<PIOB_ID); // Clock PIO B
+ // loop to infinity
+ while(1)
+ {
+ }
+
+ return 0;
+}
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4a2.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4a2.c new file mode 100644 index 0000000..86c839e --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4a2.c @@ -0,0 +1,67 @@ +// Lsung zu Termin2
+// Aufgabe 4
+// Namen: __________; ___________
+// Matr.: __________; ___________
+// vom : __________
+//
+#include "../mi2/h/pio.h"
+#include "../mi2/h/pmc.h"
+#include "../mi2/h/aic.h"
+
+StructPMC* myPMC = PMC_BASE;
+StructAIC* myAIC = AIC_BASE;
+StructPIO* myPIOB = PIOB_BASE;
+
+void taste_irq_handler (void) __attribute__ ((interrupt));
+
+void taste_irq_handler (void)
+{
+
+ volatile int keyPressed = myPIOB->PIO_ISR;
+
+ if (!(keyPressed & KEY1))
+ myPIOB->PIO_SODR = 0x100;
+ //if (!(myPIOB->PIO_PDSR & KEY2))
+ if (!(keyPressed & KEY2))
+ myPIOB->PIO_CODR = 0x100;
+
+ myAIC->AIC_EOICR = 0x01;
+ // to signal end of Interrupt Service Routine
+}
+
+int main(void)
+{
+ myAIC->AIC_EOICR = myPIOB->PIO_ISR;
+ myPIOB->PIO_IDR = 0xFFFFFFFF;
+
+
+ // Initialize PIOB
+ myPIOB->PIO_PER = KEY1|KEY2|LED1|LED2; // Enable PIO for SW1,SW2,LED1,LED2
+ //myPIOB->PIO_OER = LED1|LED2; // Set LED1 and LED2 as output
+ myPIOB->PIO_OER = LED1; // Set LED1 and LED2 as output
+ myPIOB->PIO_CODR = 0x000000FF; // Clear Output Data Register
+
+
+ // Enable Interrupts in CPU
+ // done by OS
+
+ // disable PIOB Interrupt in AIC
+ myAIC->AIC_IDCR = (1<<PIOB_ID);
+ // Enable Interrupt for PIOB in AIC
+ myAIC->AIC_SMR[PIOB_ID] = AIC_SRCTYPE_EXT_LOW_LEVEL; // which register? what to put in it? 0x1 for low
+ myAIC->AIC_SVR[PIOB_ID] = (volatile unsigned int)&taste_irq_handler; // Address of Interrupt handling routine...
+
+ // enable PIOB Interrupt in AIC
+ myAIC->AIC_IECR = (1<<PIOB_ID); // Enable Interrupt for PIOB
+
+ // enable PIOB Interrupt
+ myPIOB->PIO_IER = KEY1|KEY2; // what to put here?
+
+ myPMC->PMC_PCER = (1<<PIOB_ID); // Clock PIO B
+ // loop to infinity
+ while(1)
+ {
+ }
+
+ return 0;
+}
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4b.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4b.c new file mode 100644 index 0000000..fd850c7 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/Termin2Aufgabe4b.c @@ -0,0 +1,37 @@ +#include "init4.h"
+
+void taste_irq_handler (void) __attribute__ ((interrupt));
+
+void taste_irq_handler (void)
+{
+
+}
+
+int main(void)
+{
+ *pmc_PCER = 0x4000; // Enable Peripheral Clock
+
+ *pioB_PER = 0x118; // LED1=0x100; SW1=0x8; SW2=0x10 -> addieren
+
+ *pioB_OER = 0x100; // Enable Output: LED1, WICHTIG: LED1 hier an!
+
+ *aic_SVR = (int)taste_irq_handler;
+ *aic_SMR = 1;
+
+ for ( ; ; )
+ {
+ if (!(*pioB_PDSR & 0x8)) // wenn SW1 dann LED1=ON (! -> low-active)
+ {
+ *pioB_CODR = 0x100; // Clear LED DS1 -> LED = AN
+ *aic_EOICR = 1;
+ }
+
+ if (!(*pioB_PDSR & 0x10)) // wenn SW2 dann LED1=OFF (! -> low-active)
+ {
+ *pioB_SODR = 0x100; // Set LED DS1 -> LED = AUS
+ *aic_EOICR = 1;
+ }
+ }
+
+ return 0;
+}
\ No newline at end of file diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/frank_micsys2_praktikum02.zip b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/frank_micsys2_praktikum02.zip Binary files differnew file mode 100644 index 0000000..3c5845b --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/frank_micsys2_praktikum02.zip diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/init4.h b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/init4.h new file mode 100644 index 0000000..89a81b2 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/init4.h @@ -0,0 +1,64 @@ +#ifndef init4_h
+#define init4_h
+
+
+// fuer AUFGABE 4:
+#define aic_IDCR ((volatile unsigned int*) 0xFFFFF124)
+//Interrupt Disable Command Register
+#define aic_ICCR ((volatile unsigned int*) 0xFFFFF128)
+// Interrupt Clear Command Register
+#define aic_SMR ((volatile unsigned int*) 0xFFFFF038)
+// Source Mode Register !!!nachfragen
+#define aic_SVR ((volatile unsigned int*) 0xFFFFF0B8)
+// Source Vector Register
+#define aic_EOICR ((volatile unsigned int*) 0xFFFFF130)
+// End of Interrupt Command Reg.
+#define aic_IECR ((volatile unsigned int*) 0xFFFFF120)
+// Interrupt Enable Command Register
+
+#define pmc_PCER ((volatile unsigned int*) 0xFFFF4010)
+// Peripheral Clock Enable Reg
+#define pmc_PCSR ((volatile unsigned int*) 0xFFFF4018)
+// Peripheral Clock Status Reg, Reset: 0x0
+
+#define pioB_PER ((volatile unsigned int*) 0xFFFF0000)
+// PIOB Port Enable Reg
+#define pioB_OER ((volatile unsigned int*) 0xFFFF0010)
+// PIOB Output Enable Reg
+#define pioB_SODR ((volatile unsigned int*) 0xFFFF0030)
+// PIOB Set Output Data Reg
+#define pioB_CODR ((volatile unsigned int*) 0xFFFF0034)
+// PIOB Clear Output Data Reg
+#define pioB_PDSR ((volatile unsigned int*) 0xFFFF003C)
+// PIOB PIN Data Status Reg
+
+
+#endif
+
+/*
+#define aic_SMR ((volatile unsigned int*) 0xFFFFF038)
+ // Source Mode Register !!!nachfragen
+#define aic_SVR ((volatile unsigned int*) 0xFFFFF0B8)
+ // Source Vector Register
+*/
+
+//in MAIN->
+//....
+//*aic_SMR = 0x1 //
+/*
+SRCTYPE: Interrupt Source Type
+Program the input to be positive- or negative-edge triggered or positive- or
+negative-level sensitive.
+The active level or edge is not programmable for the internal sources.
+----> hier haben wir den "Level Sensitive: Low-Level Sensitive" 00
+PRIOR: Priority Level
+
+Program the priority level for all sources except source 0 (FIQ).
+The priority level can be between 0 (lowest) and 7 (highest).
+The priority level is not used for the FIQ in the SMR0.
+---> also haben wir die 1
+sprich-> 0x01 -> 0x1;
+*/
+
+//*aic_SVR = (volatile unsigned int) &taste_irq_handler; //im spteren Verlauf der Praktika wird
+//hier eine Interrupt-Routine-FKT kommen, die das weitere Vorgehen veranlast und in "fast" allen SVRs hinein kommt
\ No newline at end of file diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/makefile b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/makefile new file mode 100644 index 0000000..f44a2e7 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin2/makefile @@ -0,0 +1,51 @@ +FILE = Termin2Aufgabe1
+Opti = 0
+all:
+
+# bersetzen der Quelldatei
+ arm-elf-gcc -c -g -O$(Opti) $(FILE).c -I ../h
+
+# Erzeugen der Assemblerdatei aus der Quelldatei
+ arm-elf-gcc -S -o$(Opti) $(FILE).c -I ../h
+
+# Erzeugen der bentitgen Objektdateien
+ arm-elf-gcc -c -g -O$(Opti) ../boot/swi.S -o swi.o -I ../h
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot_ice.S -o boot_ice.o -I ../h
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot_flash.S -o boot_flash.o -I ../h
+# arm-elf-gcc -c -g -O$(Opti) seriell.S -I ../h
+# arm-elf-gcc -c -g -O$(Opti) ser_io.S -I ../h
+
+# Binden fr die RAM-Version
+# arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot.o swi.o $(FILE).o -o $(FILE).elf /usr/gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a
+ arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot_ice.o swi.o $(FILE).o -o $(FILE).elf
+
+# Linkerskripte noch nicht getestet
+# arm-elf-ld -T ldscript.ram boot.o swi.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+
+# Binden fr die FLASH-Version
+# arm-elf-ld -Ttext 0x1000000 boot.o swi.o $(FILE).o -o $(FILE).out /usr/gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a
+ arm-elf-ld -Ttext 0x1000000 boot_flash.o swi.o $(FILE).o -o $(FILE).out
+
+# Linkerskripte noch nicht getestet
+# arm-elf-ld -T ldscript.rom boot.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).out /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+
+# -I --input-target <bfdname> Assume input file is in format <bfdname>
+# -O --output-target <bfdname> Create an output file in format <bfdname>
+# -S --strip-all Remove all symbol and relocation information
+# -x --discard-all Remove all non-global symbols
+# -N --strip-symbol <name> Do not copy symbol <name>
+# -O --output-target <bfdname> Create an output file in format <bfdname>
+# -g --strip-debug Remove all debugging symbols
+ arm-elf-objcopy -I elf32-littlearm -O binary -x -S -N -g $(FILE).out $(FILE).rom
+# programm.rom nach /tftpboot/downlaod.bin kopieren <cp name.rom /tftpboot/download.bin>
+# Jumper E7 mu auf STD stecken
+# Mit <telnet 141.100.xxx.xxx> mit dem BDI2000 verbinden.
+# mit <erase 0x1100000> flash-Bereich lschen
+# mit <prog 0x1100000 download.bin bin> Programm ins flash schreiben.
+#
+#
+clean:
+ rm *.o
+ rm *.s
+ rm *.elf
+ rm *.rom
\ No newline at end of file diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Aufgabe/Termin3.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Aufgabe/Termin3.pdf Binary files differnew file mode 100644 index 0000000..a4be8fb --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Aufgabe/Termin3.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Aufgabe/Termin3Aufgabe1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Aufgabe/Termin3Aufgabe1.c new file mode 100644 index 0000000..b222c22 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Aufgabe/Termin3Aufgabe1.c @@ -0,0 +1,12 @@ +// Lsung zu Termin3
+// Aufgabe 1
+// Namen: __________; ___________
+// Matr.: __________; ___________
+// vom : __________
+//
+
+int main(void)
+{
+
+ return 0;
+}
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Aufgabe/makefile1 b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Aufgabe/makefile1 new file mode 100644 index 0000000..d10a7f9 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Aufgabe/makefile1 @@ -0,0 +1,14 @@ +FILE = Termin3Aufgabe1
+Opti = 1
+
+all:
+ arm-elf-gcc -c -g -O$(OPTI) ../boot/swi.S
+ arm-elf-gcc -c -g -O$(OPTI) ../boot/boot.s
+ arm-elf-gcc -g -c -O$(OPTI) $(FILE).c
+ arm-elf-gcc -S -O$(OPTI) $(FILE).c
+ arm-elf-ld -Ttext 0x2000000 swi.o boot.o $(FILE).o -o $(FILE).elf
+
+clean:
+ rm -f *.o
+ rm *.elf
+
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Interface.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Interface.pdf Binary files differnew file mode 100644 index 0000000..00b5d6c --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Interface.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3.pdf Binary files differnew file mode 100644 index 0000000..b34cd69 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe1.bak.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe1.bak.c new file mode 100644 index 0000000..8c19eac --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe1.bak.c @@ -0,0 +1,77 @@ +// Lsung zu Termin3
+// Aufgabe 1
+// von:
+// vom:
+//
+
+#include "../h/pmc.h"
+#include "../h/tc.h"
+#include "../h/pio.h"
+#include "../h/aic.h"
+
+void taste_irq_handler (void) __attribute__ ((interrupt));
+
+// Interruptserviceroutine fr die Tasten SW1 und SW2
+void taste_irq_handler (void)
+{
+ StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B
+ StructAIC* aicbase = AIC_BASE; //__
+
+// ab hier entsprechend der Aufgabestellung ergnzen
+//**************************************************
+
+
+
+ aicbase->AIC_EOICR = piobaseB->PIO_ISR; //__
+}
+
+// Timer3 initialisieren
+void Timer3_init( void )
+{
+ StructTC* timerbase3 = TCB3_BASE; // Basisadressse TC Block 1
+ StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO B
+
+ timerbase3->TC_CCR = TC_CLKDIS; // Disable Clock
+
+ // Initialize the mode of the timer 3
+ timerbase3->TC_CMR =
+ TC_ACPC_CLEAR_OUTPUT | //ACPC : Register C clear TIOA
+ TC_ACPA_SET_OUTPUT | //ACPA : Register A set TIOA
+ TC_WAVE | //WAVE : Waveform mode
+ TC_CPCTRG | //CPCTRG : Register C compare trigger enable
+ TC_CLKS_MCK1024; //TCCLKS : MCKI / 1024
+
+ // Initialize the counter:
+ timerbase3->TC_RA = 300; //__
+ timerbase3->TC_RC = 600; //__
+
+ // Start the timer :
+ timerbase3->TC_CCR = TC_CLKEN ; //__
+ timerbase3->TC_CCR = TC_SWTRG ; //__
+ piobaseA->PIO_PER = (1<<PIOTIOA3) ; //__
+ piobaseA->PIO_OER = (1<<PIOTIOA3) ; //__
+ piobaseA->PIO_CODR = (1<<PIOTIOA3) ; //__
+}
+
+int main(void)
+{
+
+ StructPMC* pmcbase = PMC_BASE; // Basisadresse des PMC
+ StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO A
+ StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B
+
+ pmcbase->PMC_PCER = 0x4000; // Peripheral Clocks einschalten fr PIOB, _____
+
+// ab hier entsprechend der Aufgabestellung ergnzen
+//**************************************************
+
+
+
+
+ while(1)
+ {
+
+ }
+
+ return 0;
+}
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe1.c new file mode 100644 index 0000000..05c3406 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe1.c @@ -0,0 +1,77 @@ +// Lsung zu Termin3 +// Aufgabe 1 +// von: +// vom: +// + +#include "../h/pmc.h" +#include "../h/tc.h" +#include "../h/pio.h" +#include "../h/aic.h" + +void taste_irq_handler (void) __attribute__ ((interrupt)); + +// Interruptserviceroutine fr die Tasten SW1 und SW2 +void taste_irq_handler (void) +{ + StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B + StructAIC* aicbase = AIC_BASE; //__ + +// ab hier entsprechend der Aufgabestellung ergnzen +// ************************************************* + + + + aicbase->AIC_EOICR = piobaseB->PIO_ISR; //__ +} + +// Timer3 initialisieren +void Timer3_init( void ) +{ + StructTC* timerbase3 = TCB3_BASE; // Basisadressse TC Block 1 + StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO B + + timerbase3->TC_CCR = TC_CLKDIS; // Disable Clock + + // Initialize the mode of the timer 3 + timerbase3->TC_CMR = + TC_ACPC_CLEAR_OUTPUT | //ACPC : Register C clear TIOA + TC_ACPA_SET_OUTPUT | //ACPA : Register A set TIOA + TC_WAVE | //WAVE : Waveform mode + TC_CPCTRG | //CPCTRG : Register C compare trigger enable + TC_CLKS_MCK1024; //TCCLKS : MCKI / 1024 + + // Initialize the counter: + timerbase3->TC_RA = 300; //__ + timerbase3->TC_RC = 600; //__ + + // Start the timer : + timerbase3->TC_CCR = TC_CLKEN ; //__ + timerbase3->TC_CCR = TC_SWTRG ; //__ + piobaseA->PIO_PER = (1<<PIOTIOA3) ; //__ + piobaseA->PIO_OER = (1<<PIOTIOA3) ; //__ + piobaseA->PIO_CODR = (1<<PIOTIOA3) ; //__ +} + +int main(void) +{ + + StructPMC* pmcbase = PMC_BASE; // Basisadresse des PMC + StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO A + StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B + + pmcbase->PMC_PCER = 0x4000; // Peripheral Clocks einschalten fr PIOB, _____ + +// ab hier entsprechend der Aufgabestellung ergnzen +//************************************************** + + + + + while(1) + { + + } + + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe1.out b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe1.out Binary files differnew file mode 100644 index 0000000..e32599e --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe1.out diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe2.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe2.c new file mode 100644 index 0000000..9fe2783 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe2.c @@ -0,0 +1,99 @@ +// Lsung zu Termin3
+// Aufgabe 1
+
+// vom: 04.11.2003
+//
+
+#include "../h/pmc.h"
+#include "../h/tc.h"
+#include "../h/pio.h"
+#include "../h/aic.h"
+
+void taste_irq_handler (void) __attribute__ ((interrupt));
+
+// Interruptserviceroutine fr die Tasten SW1 und SW2
+void taste_irq_handler (void)
+{
+ StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B
+ StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO A
+ StructAIC* aicbase = AIC_BASE; // Basisadresse Advanced Interrupt Controller
+
+// ab hier entsprechend der Aufgabestellung ergnzen
+//**************************************************
+
+ if (!(piobaseB->PIO_PDSR & KEY1)) // falls Schalter 1 gedrckt
+ piobaseA->PIO_PDR = (1<<PIOTIOA3); // Timer herrscht ber Bit (Tacktsignal)
+ if (!(piobaseB->PIO_PDSR & KEY2)) // falls Schalter 2 gedrckt
+ piobaseA->PIO_PER = (1<<PIOTIOA3); // PIOA herrscht ber (0 Signal)
+
+ aicbase->AIC_EOICR = piobaseB->PIO_ISR; // AIC End of Interrupt Command Register = PIOB Interrupt Status Register
+}
+
+// Timer3 initialisieren
+void Timer3_init( void )
+{
+ StructTC* timerbase3 = TCB3_BASE; // Basisadressse TC Block 1
+ StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO B
+
+ timerbase3->TC_CCR = TC_CLKDIS; // Disable Clock
+
+ // Initialize the mode of the timer 3
+ timerbase3->TC_CMR =
+ TC_ACPC_CLEAR_OUTPUT | //ACPC : Register C clear TIOA
+ TC_ACPA_SET_OUTPUT | //ACPA : Register A set TIOA
+ TC_WAVE | //WAVE : Waveform mode
+ TC_CPCTRG | //CPCTRG : Register C compare trigger enable
+ TC_CLKS_MCK1024; //TCCLKS : MCKI / 1024
+
+ // Initialize the counter:
+ timerbase3->TC_RA = 2440; // Wert 300 in Register RA: wenn Wert erreicht Steigende Flanke
+ timerbase3->TC_RC = 4880; // Wert 600 in Register RC: wenn Wert erreicht Fallende Flanke
+
+ // Start the timer :
+ timerbase3->TC_CCR = TC_CLKEN ; // Timer Clock enabled
+ timerbase3->TC_CCR = TC_SWTRG ; // Reset Counter
+ // Vermeiden, da dauerhaftes High Signal (PIO herrscht ber das BIT)
+ piobaseA->PIO_PER = (1<<PIOTIOA3) ; // PIN der PIO zuweisen
+ piobaseA->PIO_OER = (1<<PIOTIOA3) ; // wird auf Output gesetzt
+ piobaseA->PIO_CODR = (1<<PIOTIOA3) ; // Clear Output (low Signal)
+}
+
+int main(void)
+{
+
+ StructPMC* pmcbase = PMC_BASE; // Basisadresse des PMC
+ StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO A
+ StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B
+
+ // pmcbase->PMC_PCER = 0x4000; // Peripheral Clocks einschalten fr PIOB,
+
+// ab hier entsprechend der Aufgabestellung ergnzen
+//**************************************************
+
+ pmcbase->PMC_PCER = 0x6200; // Timer (0x200), PIOA (0x2000), PIOB (0x4000) einschalten
+ Timer3_init();
+ piobaseB->PIO_PER = 0x38; // Schalter 1-3 enabeled
+
+
+ // Interrupt Initialisierung fr PIOB (0x4000)
+ piobaseB->PIO_IER = 0x18; // Schalter 1+2 lsen Interrupts aus
+ StructAIC* aicbase = AIC_BASE; // Basisadresse Advanced Interrupt Controller
+ aicbase->AIC_IDCR = 0x4000; // Interrupt disabled
+ aicbase->AIC_ICCR = 0x4000; // Interrupt clear
+ aicbase->AIC_SMR[14] = 0x07; // An Stelle 14 Level Sensitive / Hchste Prioritt
+ aicbase->AIC_SVR[14] = (unsigned int)taste_irq_handler; // Adresse der Interrupt Service Routine in Vektor-Tabelle
+ aicbase->AIC_IECR = 0x4000;
+
+
+
+ while(piobaseB->PIO_PDSR & KEY3)
+ {
+
+ }
+
+ // Vermeiden, da dauerhaftes High Signal (PIO herrscht ber das BIT)
+ piobaseA->PIO_PER = (1<<PIOTIOA3) ; // PIN der PIO zuweisen
+ aicbase->AIC_IDCR = 0x4000; // Interrupt Disable
+
+ return 0;
+}
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe3.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe3.c new file mode 100644 index 0000000..48a7955 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/Termin3Aufgabe3.c @@ -0,0 +1,109 @@ +// Lsung zu Termin3
+// Aufgabe 3
+
+// vom: 07.12.2005
+// Andreas Spirka, Sven Eisenhauer
+
+#include "../h/pmc.h"
+#include "../h/tc.h"
+#include "../h/pio.h"
+#include "../h/aic.h"
+
+void taste_irq_handler (void) __attribute__ ((interrupt));
+
+// Interruptserviceroutine fr die Tasten SW1 und SW2
+void taste_irq_handler (void)
+{
+ StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B
+ StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO A
+ StructAIC* aicbase = AIC_BASE; // Basisadresse Advanced Interrupt Controller
+
+// ab hier entsprechend der Aufgabestellung ergnzen
+//**************************************************
+
+ if (!(piobaseB->PIO_PDSR & KEY1)) // falls Schalter 1 gedrckt
+ piobaseA->PIO_PDR = (1<<PIOTIOA3); // Timer herrscht ber Bit (Tacktsignal)
+ if (!(piobaseB->PIO_PDSR & KEY2)) // falls Schalter 2 gedrckt
+ piobaseA->PIO_PER = (1<<PIOTIOA3); // PIOA herrscht ber (0 Signal)
+
+ aicbase->AIC_EOICR = piobaseB->PIO_ISR; // AIC End of Interrupt Command Register = PIOB Interrupt Status Register
+}
+
+// Timer3 initialisieren
+void Timer3_init( void )
+{
+ StructTC* timerbase3 = TCB3_BASE; // Basisadressse TC Block 1
+ StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO B
+
+ timerbase3->TC_CCR = TC_CLKDIS; // Disable Clock
+
+ // Initialize the mode of the timer 3
+ timerbase3->TC_CMR =
+ TC_ACPC_CLEAR_OUTPUT | //ACPC : Register C clear TIOA
+ TC_ACPA_SET_OUTPUT | //ACPA : Register A set TIOA
+ TC_WAVE | //WAVE : Waveform mode
+ TC_CPCTRG | //CPCTRG : Register C compare trigger enable
+ TC_CLKS_MCK1024; //TCCLKS : MCKI / 1024
+
+ // Initialize the counter:
+ timerbase3->TC_RA = 2440; // Wert 300 in Register RA: wenn Wert erreicht Steigende Flanke
+ timerbase3->TC_RC = 4880; // Wert 600 in Register RC: wenn Wert erreicht Fallende Flanke
+
+ // Start the timer :
+ timerbase3->TC_CCR = TC_CLKEN ; // Timer Clock enabled
+ timerbase3->TC_CCR = TC_SWTRG ; // Reset Counter
+ // Vermeiden, da dauerhaftes High Signal (PIO herrscht ber das BIT)
+ piobaseA->PIO_PER = (1<<PIOTIOA3) ; // PIN der PIO zuweisen
+ piobaseA->PIO_OER = (1<<PIOTIOA3) ; // wird auf Output gesetzt
+ piobaseA->PIO_CODR = (1<<PIOTIOA3) ; // Clear Output (low Signal)
+}
+
+void piob_init(void)
+{
+ StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B
+ // disable all interrupt sources of pio
+ piobaseB->PIO_IDR = 0xFFFFFFFF;
+ piobaseB->PIO_PER = KEY1|KEY2|KEY3; // Schalter 1-3 enabeled
+ // Interrupt Initialisierung fr PIOB (0x4000)
+ piobaseB->PIO_IER = KEY1|KEY2; // Schalter 1+2 lsen Interrupts aus
+}
+
+int main(void)
+{
+
+ StructPMC* pmcbase = PMC_BASE; // Basisadresse des PMC
+ StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO A
+ StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B
+
+
+// ab hier entsprechend der Aufgabestellung ergnzen
+//**************************************************
+
+ // Timer (0x200), PIOA (0x2000), PIOB (0x4000) einschalten
+ pmcbase->PMC_PCER = (1<<PIOA_ID)|(1<<PIOB_ID)|(1<<TC3_ID);
+ Timer3_init();
+ piob_init();
+
+ StructAIC* aicbase = AIC_BASE; // Basisadresse Advanced Interrupt Controller
+ aicbase->AIC_IDCR = (1<<PIOB_ID); // Interrupt disabled
+ aicbase->AIC_ICCR = (1<<PIOB_ID); // Interrupt clear
+ aicbase->AIC_SMR[PIOB_ID] = AIC_SRCTYPE_EXT_LOW_LEVEL|AIC_PRIOR; // An Stelle 14 Level Sensitive / Hchste Prioritt
+ aicbase->AIC_SVR[PIOB_ID] = (unsigned int)taste_irq_handler; // Adresse der Interrupt Service Routine in Vektor-Tabelle
+ aicbase->AIC_IECR = (1<<PIOB_ID); // enable PIOB Interrupt in AIC
+
+ while(piobaseB->PIO_PDSR & KEY3)
+ {
+
+ }
+ // Vermeiden, da dauerhaftes High Signal (PIO herrscht ber das BIT)
+ piobaseA->PIO_PER = (1<<PIOTIOA3) ; // PIN der PIO zuweisen
+ piobaseA->PIO_OER = (1<<PIOTIOA3) ; // wird auf Output gesetzt
+ piobaseA->PIO_CODR = (1<<PIOTIOA3) ; // Clear Output (low Signal)
+ // disable piob command register in AIC
+ aicbase->AIC_IDCR = (1<<PIOB_ID);
+ // disable all interrupt sources of pio
+ piobaseB->PIO_IDR = 0xFFFFFFFF;
+ // Timer (0x200), PIOA (0x2000), PIOB (0x4000) ausschalten
+ pmcbase->PMC_PCDR = (1<<PIOA_ID)|(1<<PIOB_ID)|(1<<TC3_ID);
+ return 0;
+}
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/frank_micsys2_praktikum03.zip b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/frank_micsys2_praktikum03.zip Binary files differnew file mode 100644 index 0000000..13733fb --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/frank_micsys2_praktikum03.zip diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/makefile b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/makefile new file mode 100644 index 0000000..80f70dd --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/makefile @@ -0,0 +1,51 @@ +FILE = Termin3Aufgabe1
+Opti = 0
+all:
+
+# bersetzen der Quelldatei
+ arm-elf-gcc -c -g -O$(Opti) $(FILE).c -I ../h
+
+# Erzeugen der Assemblerdatei aus der Quelldatei
+ arm-elf-gcc -S -o$(Opti) $(FILE).c -I ../h
+
+# Erzeugen der bentitgen Objektdateien
+ arm-elf-gcc -c -g -O$(Opti) ../boot/swi.S -o swi.o -I ../h
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot_ice.S -o boot_ice.o -I ../h
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot_flash.S -o boot_flash.o -I ../h
+# arm-elf-gcc -c -g -O$(Opti) seriell.S -I ../h
+# arm-elf-gcc -c -g -O$(Opti) ser_io.S -I ../h
+
+# Binden fr die RAM-Version
+# arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot.o swi.o $(FILE).o -o $(FILE).elf /usr/gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a
+ arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot_ice.o swi.o $(FILE).o -o $(FILE).elf
+
+# Linkerskripte noch nicht getestet
+# arm-elf-ld -T ldscript.ram boot.o swi.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+
+# Binden fr die FLASH-Version
+# arm-elf-ld -Ttext 0x1000000 boot.o swi.o $(FILE).o -o $(FILE).out /usr/gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a
+ arm-elf-ld -Ttext 0x1000000 boot_flash.o swi.o $(FILE).o -o $(FILE).out
+
+# Linkerskripte noch nicht getestet
+# arm-elf-ld -T ldscript.rom boot.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).out /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+
+# -I --input-target <bfdname> Assume input file is in format <bfdname>
+# -O --output-target <bfdname> Create an output file in format <bfdname>
+# -S --strip-all Remove all symbol and relocation information
+# -x --discard-all Remove all non-global symbols
+# -N --strip-symbol <name> Do not copy symbol <name>
+# -O --output-target <bfdname> Create an output file in format <bfdname>
+# -g --strip-debug Remove all debugging symbols
+ arm-elf-objcopy -I elf32-littlearm -O binary -x -S -N -g $(FILE).out $(FILE).rom
+# programm.rom nach /tftpboot/downlaod.bin kopieren <cp name.rom /tftpboot/download.bin>
+# Jumper E7 mu auf STD stecken
+# Mit <telnet 141.100.xxx.xxx> mit dem BDI2000 verbinden.
+# mit <erase 0x1000000> flash-Bereich lschen
+# mit <prog 0x1000000 download.bin bin> Programm ins flash schreiben.
+#
+#
+clean:
+ rm *.o
+ rm *.s
+ rm *.elf
+ rm *.rom
\ No newline at end of file diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/makefile1 b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/makefile1 new file mode 100644 index 0000000..6308804 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin3/makefile1 @@ -0,0 +1,14 @@ +FILE = Termin3Aufgabe3
+Opti = 1
+
+all:
+ arm-elf-gcc -c -g -O1 ../boot/swi.S
+ arm-elf-gcc -c -g -O1 ../boot/boot.s
+ arm-elf-gcc -c -g -O1 $(FILE).c
+ arm-elf-gcc -S $(FILE).c
+ arm-elf-ld -Ttext 0x2000000 swi.o boot.o $(FILE).o -o $(FILE).elf
+
+clean:
+ rm -f *.o
+ rm *.elf
+
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.1 b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.1 new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.1 diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.cl b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.cl Binary files differnew file mode 100644 index 0000000..04a5f36 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.cl diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.f b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.f Binary files differnew file mode 100644 index 0000000..d1a2701 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.f diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.fil b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.fil Binary files differnew file mode 100644 index 0000000..8f1e98e --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.fil diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.fu b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.fu Binary files differnew file mode 100644 index 0000000..34796cc --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.fu diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.icl b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.icl Binary files differnew file mode 100644 index 0000000..cf812bc --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.icl diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.iu b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.iu Binary files differnew file mode 100644 index 0000000..2de75ea --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.iu diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.iv b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.iv Binary files differnew file mode 100644 index 0000000..b754796 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.iv diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.ma b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.ma Binary files differnew file mode 100644 index 0000000..bb2cf2c --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/Termin4.ma diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/tmp_0mEBrK b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/tmp_0mEBrK new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/.snprj/tmp_0mEBrK @@ -0,0 +1 @@ + diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Interface.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Interface.pdf Binary files differnew file mode 100644 index 0000000..00b5d6c --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Interface.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Termin4.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Termin4.pdf Binary files differnew file mode 100644 index 0000000..5c9def3 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Termin4.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Termin4Aufgabe1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Termin4Aufgabe1.c new file mode 100644 index 0000000..67b220d --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Termin4Aufgabe1.c @@ -0,0 +1,80 @@ +// Lsung zur Aufgabe Termin4 +// Aufgabe 1 +//**************************** +// Zeiger auf Peripherie +// Messen der Periodendauer einer angelegten Frequenz +// +// von: Manfred Pester +// vom: 06. August 2003 + +#include "../h/pio.h" +#include "../h/tc.h" +#include "../h/pmc.h" + +// fr die Initialisierung des Zhler TC4 + +#define TC4_INIT TC_CLKS_MCK2 | TC_LDBSTOP | TC_CAPT | TC_LDRA_RISING_EDGE | TC_LDRB_RISING_EDGE + + +int main(void) +{ + volatile int captureRA1; + volatile int captureRB1; + volatile int capturediff1; + volatile float Periodendauer1; + volatile int captureRA2; + volatile int captureRB2; + volatile int capturediff2; + volatile float Periodendauer2; + volatile int c1=18030/1.09; + volatile int c2=40; + volatile float masse; + + StructPMC* pmcbase = PMC_BASE; + StructPIO* piobaseA = PIOA_BASE; + StructPIO* piobaseB = PIOB_BASE; + StructTC* tcbase4 = TCB4_BASE; + StructTC* tcbase5 = TCB5_BASE; + + pmcbase->PMC_PCER = 0x06f80; // Clock PIOA, PIOB, Timer5, Timer4, Timer1 einschalten + +// Periodendauer der Waagensignale messen +// Signal aud TIOA4 ca. 16kHz entspricht ca. einer Periodendauer von 62,5us +// durch den Teiler von 32 ergeben sich ca. 2ms +// Zhler mit positiver Flanke starten + + //piobaseA->PIO_PDR = 0x090; + piobaseA->PIO_PDR = (1<<PIOTIOA4)|(1<<PIOTIOA5); + tcbase4->TC_CCR = TC_CLKDIS; + tcbase4->TC_CMR = TC4_INIT; + tcbase4->TC_CCR = TC_CLKEN; + tcbase4->TC_CCR = TC_SWTRG; + + tcbase5->TC_CCR = TC_CLKDIS; + tcbase5->TC_CMR = TC4_INIT; + tcbase5->TC_CCR = TC_CLKEN; + tcbase5->TC_CCR = TC_SWTRG; + + piobaseB-> PIO_PER = KEY3; + + while(piobaseB->PIO_PDSR & KEY3) + { + tcbase4->TC_CCR = TC_SWTRG; + tcbase5->TC_CCR = TC_SWTRG; + while (!( tcbase4->TC_SR & TC_LDBSTOP)); // Capture Register B wurde geladen Messung abgeschlossen + captureRA1 = tcbase4->TC_RA; // + captureRB1 = tcbase4->TC_RB; + capturediff1 = abs(captureRB1) - abs(captureRA1); + Periodendauer1 = abs(capturediff1) / 12.5; // Zeit in us + while (!( tcbase5->TC_SR & TC_LDBSTOP)); // Capture Register B wurde geladen Messung abgeschlossen + captureRA2 = tcbase5->TC_RA; // + captureRB2 = tcbase5->TC_RB; + capturediff2 = abs(captureRB2) - abs(captureRA2); + Periodendauer2 = abs(capturediff2) / 12.5; // Zeit in us + + masse = c1 * ((Periodendauer1 / Periodendauer2) -1) -c2; + + } + + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Termin4Aufgabe4.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Termin4Aufgabe4.c new file mode 100644 index 0000000..7871155 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/Termin4Aufgabe4.c @@ -0,0 +1,39 @@ +// Lsung zur Aufgabe Termin4 +// Aufgabe 4 +//**************************** +// Zeiger auf Peripherie +// Messen der aufgelegten Masse +// +// von: Manfred Pester +// vom: 06. August 2003 + +#include "../h/pio.h" +#include "../h/tc.h" +#include "../h/pmc.h" + + +void PIO_Init(void) +{ + +} + +void Timer_Init(void) +{ + +} + +int main(void) +{ + + volatile int Masse; + + PIO_Init(); + Timer_Init(); + + while(!(piobaseA->PIO_ODSR & KEY3)) + { + Masse = MessungderMasse(); + } + + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/frank_micsys2_praktikum04.zip b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/frank_micsys2_praktikum04.zip Binary files differnew file mode 100644 index 0000000..334a402 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/frank_micsys2_praktikum04.zip diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/makefile b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/makefile new file mode 100644 index 0000000..596ef49 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/makefile @@ -0,0 +1,51 @@ +FILE = Termin4Aufgabe1
+Opti = 0
+all:
+
+# bersetzen der Quelldatei
+ arm-elf-gcc -c -g -O$(Opti) $(FILE).c -I ../h
+
+# Erzeugen der Assemblerdatei aus der Quelldatei
+ arm-elf-gcc -S -o$(Opti) $(FILE).c -I ../h
+
+# Erzeugen der bentitgen Objektdateien
+ arm-elf-gcc -c -g -O$(Opti) ../boot/swi.S -o swi.o -I ../h
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot_ice.S -o boot_ice.o -I ../h
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot_flash.S -o boot_flash.o -I ../h
+# arm-elf-gcc -c -g -O$(Opti) seriell.S -I ../h
+# arm-elf-gcc -c -g -O$(Opti) ser_io.S -I ../h
+
+# Binden fr die RAM-Version
+# arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot_ice.o swi.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a
+ arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot_ice.o swi.o $(FILE).o -o $(FILE).elf
+
+# Linkerskripte noch nicht getestet
+# arm-elf-ld -T ldscript.ram boot.o swi.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+
+# Binden fr die FLASH-Version
+# arm-elf-ld -Ttext 0x1000000 boot_flash.o swi.o $(FILE).o -o $(FILE).out /gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a
+ arm-elf-ld -Ttext 0x1000000 boot_flash.o swi.o $(FILE).o -o $(FILE).out
+
+# Linkerskripte noch nicht getestet
+# arm-elf-ld -T ldscript.rom boot.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).out /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+
+# -I --input-target <bfdname> Assume input file is in format <bfdname>
+# -O --output-target <bfdname> Create an output file in format <bfdname>
+# -S --strip-all Remove all symbol and relocation information
+# -x --discard-all Remove all non-global symbols
+# -N --strip-symbol <name> Do not copy symbol <name>
+# -O --output-target <bfdname> Create an output file in format <bfdname>
+# -g --strip-debug Remove all debugging symbols
+ arm-elf-objcopy -I elf32-littlearm -O binary -x -S -N -g $(FILE).out $(FILE).rom
+# programm.rom nach /tftpboot/downlaod.bin kopieren <cp name.rom /tftpboot/download.bin>
+# Jumper E7 mu auf STD stecken
+# Mit <telnet 141.100.xxx.xxx> mit dem BDI2000 verbinden.
+# mit <erase 0x1100000> flash-Bereich lschen
+# mit <prog 0x1100000 download.bin bin> Programm ins flash schreiben.
+#
+#
+clean:
+ rm *.o
+ rm *.s
+ rm *.elf
+ rm *.rom
\ No newline at end of file diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/makefile1 b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/makefile1 new file mode 100644 index 0000000..dbc718e --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/makefile1 @@ -0,0 +1,12 @@ +FILE = Termin4Aufgabe1
+Opti = 1
+all:
+# bersetzen der Quelldatei
+ arm-elf-gcc -c -g -O$(Opti) $(FILE).c -I ../h
+# Erzeugen der Assemblerdatei aus der Quelldatei
+ arm-elf-gcc -S -o$(Opti) $(FILE).c
+ arm-elf-gcc -c -g -O$(Opti) ../boot/swi.S -o swi.o
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot.S -o boot.o
+# Binden fr die RAM-Version
+ arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot.o swi.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/makefile4 b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/makefile4 new file mode 100644 index 0000000..b878e6d --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin4/makefile4 @@ -0,0 +1,15 @@ +FILE = Termin4Aufgabe4
+Opti = 1
+all:
+# bersetzen der Quelldatei
+ arm-elf-gcc -c -g -O$(Opti) $(FILE).c -I ../h
+# Erzeugen der Assemblerdatei aus der Quelldatei
+ arm-elf-gcc -S -o$(Opti) $(FILE).c
+ arm-elf-gcc -c -g -O$(Opti) ../boot/swi.S -o swi.o
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot.S -o boot.o
+# Binden fr die RAM-Version
+ arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot.o swi.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+# Binden fr die FLASH-Version
+ arm-elf-ld -Ttext 0x01000000 -O$(Opti) boot.o swi.o $(FILE).o -o $(FILE).out /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+ arm-elf-objcopy -I elf32-littlearm -O binary -x -S -N -g $(FILE).out $(FILE).rom
+
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/Termin5.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/Termin5.pdf Binary files differnew file mode 100644 index 0000000..c054ab6 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/Termin5.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/Termin5Aufgabe1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/Termin5Aufgabe1.c new file mode 100644 index 0000000..1c545be --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/Termin5Aufgabe1.c @@ -0,0 +1,22 @@ +// LProgrammrahmen zur Aufgabe Termin5 +// Aufgabe 1 +//************************************ +// +// von: Manfred Pester +// vom: 06. August 2003 +// letzte nderung: 30. November 2004 +// von: Manfred Pester + +int main(void) +{ + + inits(); +// CR und LF auf das Terminal ausgeben + putchar (0xd); + putchar (0xa); + +// String ausgeben + puts("Hallo! \n"); + + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/Termin5Aufgabe3.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/Termin5Aufgabe3.c new file mode 100644 index 0000000..94fb6eb --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/Termin5Aufgabe3.c @@ -0,0 +1,44 @@ +// Programmrahmen zur Aufgabe3 vom Termin5 WS2004 +// Aufgabe 3 +//*********************************************** +// +// von: Manfred Pester +// vom: 06. August 2003 +// letzte nderung: 30. November 2004 +// von: Manfred Pester + +void Int2String(int Zahl) +{ + int a,i=9; + char string[11]; + string[10]='\0'; + + while (Zahl != 0) + { + a = Zahl % 10; + string[i] = a + '0'; // in Char umrechnen + Zahl = Zahl / 10; + i--; + } + puts(&string[i+1]); +} + + +int main(void) +{ + int Zahl = 12345; + + inits(); + +// CR und LF auf das Terminal ausgeben + putchar (0xd); + putchar (0xa); + +// String ausgeben + puts("Hallo! \n"); + + Int2String(Zahl); + + + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/boot.S b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/boot.S new file mode 100644 index 0000000..c7c8d83 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/boot.S @@ -0,0 +1,405 @@ +@----------------------------------------------------------------------------- +@- File source : boot.S +@- Object : Bootfile fuer Praktikum +@- +@- 1.0 17/09/02 GR : Creation +@- letzte nderung : 11/11/02 +@------------------------------------------------------------------------------ + +#include "aic.inc" +#include "ebi.inc" + +@------------------------------------------------------------------------------ +@- Area Definition +@----------------- +@- Must be defined as function to put first in the code as it must be mapped +@- at SRAM. +@------------------------------------------------------------------------------ + + .text + + + .global _start +@------------------------------------------------------------------------------ +@- Define the entry point +@------------------------ +_start: + +@------------------------------------------------------------------------------ +@- Exception vectors +@------------------------------------------------------------------------------ + +Reset: B InitReset @ reset +undefvec: B undefvec @ Undefined Instruction +swivec: B swivec @ Software Interrupt +pabtvec: B pabtvec @ Prefetch Abort +dabtvec: B dabtvec @ Data Abort +rsvdvec: B rsvdvec @ reserved +irqvec: B irqvec @ reserved +fiqvec: B fiqvec @ reserved + +@------------------------------------------------------------------------------ +@- Exception vectors ( after cstartup execution ) +@------------------------------------ +@- These vectors are read at RAM address after the remap command is performed in +@- the EBI. As they will be relocated at address 0x0 to be effective, a +@- relative addressing is forbidden. The only possibility to get an absolute +@- addressing for an ARM vector is to read a PC relative value at a defined +@- offset. It is easy to reserve the locations 0x20 to 0x3C (the 8 next +@- vectors) for storing the absolute exception handler address. +@- The AIC vectoring access vectors are saved in the interrupt and fast +@- interrupt ARM vectors. So, only 5 offsets are required ( reserved vector +@- offset is never used). +@- The provisory handler addresses are defined on infinite loop and can be +@- modified at any time. +@- Note also that the reset is only accessible by a jump from the application +@- to 0. It is an actual software reset. +@- As the 13 first location are used by the vectors, the read/write link +@- address must be defined from 0x34 if internal data mapping is required. +@- (use for that the option -rw- base=0x34 +@------------------------------------------------------------------------------ + +VectorTable: + ldr pc, [pc, #0x18] @ SoftReset + ldr pc, [pc, #0x18] @ UndefHandler + ldr pc, [pc, #0x18] @ SWIHandler + ldr pc, [pc, #0x18] @ PrefetchAbortHandler + ldr pc, [pc, #0x18] @ DataAbortHandler + nop @ Reserved + ldr pc, [pc,#-0xF20] @ IRQ : read the AIC + ldr pc, [pc,#-0xF20] @ FIQ : read the AIC + +@- There are only 5 offsets as the vectoring is used. + .word _SoftReset + .word _UndefHandler + .word SWIHandler + .word _PrefetchAbortHandler + .word _DataAbortHandler + +@- Vectoring Execution function run at absolut addresss +_SoftReset: b _SoftReset +_UndefHandler: b _UndefHandler +_SWIHandler: b _SWIHandler +_PrefetchAbortHandler: b _PrefetchAbortHandler +_DataAbortHandler: b _DataAbortHandler + + + +InitTableEBI: + .word EBI_CSR_0 + .word EBI_CSR_1 + .word EBI_CSR_2 + .word EBI_CSR_3 + .word EBI_CSR_4 + .word EBI_CSR_5 + .word EBI_CSR_6 + .word EBI_CSR_7 + .word 0x00000001 @ REMAP command + .word 0x00000006 @ 6 memory regions, standard read +PtEBIBase: + .word EBI_BASE @ EBI Base Address + +@------------------------------------------------------------------------------ +@- The reset handler before Remap +@-------------------------------- +@- From here, the code is executed from SRAM address +@------------------------------------------------------------------------------ +InitReset: + +@------------------------------------------------------------------------------ +@- Speed up the Boot sequence +@---------------------------- +@- After reset, the number os wait states on chip select 0 is 8. All AT91 +@- Evaluation Boards fits fast flash memories, so that the number of wait +@- states can be optimized to fast up the boot sequence. +@- ICE note :For ICE debug no need to set the EBI value these values already set +@- by the boot function. +@------------------------------------------------------------------------------ +@- Load System EBI Base address and CSR0 Init Value + ldr r0, PtEBIBase + ldr r1, InitTableEBI @ values (relative) + +@- Speed up code execution by disabling wait state on Chip Select 0 + str r1, [r0] + +@------------------------------------------------------------------------------ +@- low level init +@---------------- +@ Call __low_level_init to perform initialization before initializing +@ AIC and calling main. +@---------------------------------------------------------------------- + +@ bl __low_level_init + + +@------------------------------------------------------------------------------ +@- Reset the Interrupt Controller +@-------------------------------- +@- Normally, the code is executed only if a reset has been actually performed. +@- So, the AIC initialization resumes at setting up the default vectors. +@------------------------------------------------------------------------------ +@- Load the AIC Base Address and the default handler addresses + + adr r0, AicData @ @ where to read values (relative) + + ldmia r0, {r1-r4} + +@- Setup the Spurious Vector + str r4, [r1, #AIC_SPU] @ r4 = spurious handler + + +@ - ICE note : For ICE debug +@ - Perform 8 End Of Interrupt Command to make sure AIC will not lock out nIRQ + mov r0, #8 +LoopAic0: + str r1, [r1, #AIC_EOICR] @ any value written + subs r0, r0, #1 + bhi LoopAic0 + +@- Reset Interrupts + mov r0, #0 + sub r0, r0, #1 @ all bits set + str r0, [r1, #AIC_IDCR] + str r0, [r1, #AIC_ICCR] + +@- Set up the default interrupt handler vectors + str r2, [r1, #AIC_SVR] @ SVR[0] for FIQ + add r1, r1, #AIC_SVR + mov r0, #31 @ counter +LoopAic1: + str r3, [r1, r0, LSL #2] @ SVRs for IRQs + subs r0, r0, #1 @ do not save FIQ + bhi LoopAic1 + + b EndInitAic + +@- Default Interrupt Handlers +AicData: + .word AIC_BASE @ AIC Base Address +@------------------------------------------------------------------------------ +@- Default Interrupt Handler +@--------------------------- +@- These function are defined in the AT91 library. If you want to change this +@- you can redifine these function in your appication code +@------------------------------------------------------------------------------ + +PtDefaultHandler: + .word at91_default_fiq_handler + .word at91_default_irq_handler + .word at91_spurious_handler + +at91_default_fiq_handler: B at91_default_fiq_handler +at91_default_irq_handler: B at91_default_irq_handler +at91_spurious_handler: B at91_spurious_handler + +EndInitAic: + +@------------------------------------------------------------------------------ +@- Setup Exception Vectors in Internal RAM before Remap +@------------------------------------------------------ +@- That's important to perform this operation before Remap in order to guarantee +@- that the core has valid vectors at any time during the remap operation. +@- Note: There are only 5 offsets as the vectoring is used. +@- ICE note : In this code only the start address value is changed if you use +@- without Semihosting. +@- Before Remap the internal RAM it's 0x300000 +@- After Remap the internal RAM it's 0x000000 +@- Remap it's already executed it's no possible to write to 0x300000. +@------------------------------------------------------------------------------ +@- Copy the ARM exception vectors + + mov r0, #0x28 + adr r1, Init_Vector + str r1,[r0] + mov r0, #0x08 + adr r1, VectorTable+8 + ldr r1,[r1] + str r1,[r0] + swi 0 + +@ The RAM_BASE = 0 it's specific for ICE + + RAM_BASE = 0 +Init_Vector: + mov r8, #RAM_BASE @ @ of the hard vector after remap in internal RAM 0x0 + + adr r9, VectorTable @ where to read values (relative) + ldmia r9!, {r0-r7} @ read 8 vectors + + stmia r8!, {r0-r7} @ store them + + ldmia r9!, {r0-r4} @ read 5 absolute handler addresses + stmia r8!, {r0-r4} @ store them + +@------------------------------------------------------------------------------ +@- Initialise the Memory Controller +@---------------------------------- +@- That's principaly the Remap Command. Actually, all the External Bus +@- Interface is configured with some instructions and the User Interface Image +@- as described above. The jump "mov pc, r12" could be unread as it is after +@- located after the Remap but actually it is thanks to the Arm core pipeline. +@- The IniTableEBI addressing must be relative . +@- The PtInitRemap must be absolute as the processor jumps at this address +@- immediatly after the Remap is performed. +@- Note also that the EBI base address is loaded in r11 by the "ldmia". +@- ICE note :For ICE debug these values already set by the boot function and the +@- Remap it's already executed it's no need to set still. +@------------------------------------------------------------------------------ +@- Copy the Image of the Memory Controller + adr r10, InitTableEBI @ get the address of the chip select register image + ldr r12, PtInitRemap @ get the real jump address ( after remap ) + +@- Copy Chip Select Register Image to Memory Controller and command remap + ldmia r10!, {r0-r9,r11} @ load the complete image and the EBI base + stmia r11!, {r0-r9} @ store the complete image with the remap command + +@- Jump to ROM at its new address + mov pc, r12 @ jump and break the pipeline + +PtInitRemap: + .word InitRemap @ address where to jump after REMAP + +@------------------------------------------------------------------------------ +@- The Reset Handler after Remap +@------------------------------- +@- From here, the code is continous execute from its link address. +@------------------------------------------------------------------------------ + +InitRemap: + +@-------------------------------- +@- ARM Core Mode and Status Bits +@-------------------------------- + +ARM_MODE_USER = 0x10 +ARM_MODE_FIQ = 0x11 +ARM_MODE_IRQ = 0x12 +ARM_MODE_SVC = 0x13 +ARM_MODE_ABORT = 0x17 +ARM_MODE_UNDEF = 0x1B +ARM_MODE_SYS = 0x1F + +I_BIT = 0x80 +F_BIT = 0x40 +T_BIT = 0x20 + +@------------------------------------------------------------------------------ +@- Stack Sizes Definition +@------------------------ +@- Interrupt Stack requires 3 words x 8 priority level x 4 bytes when using +@- the vectoring. This assume that the IRQ_ENTRY/IRQ_EXIT macro are used. +@- The Interrupt Stack must be adjusted depending on the interrupt handlers. +@- Fast Interrupt is the same than Interrupt without priority level. +@- Other stacks are defined by default to save one word each. +@- The System stack size is not defined and is limited by the free internal +@- SRAM. +@- User stack size is not defined and is limited by the free external SRAM. +@------------------------------------------------------------------------------ + +IRQ_STACK_SIZE = (3*8*4) @ 3 words per interrupt priority level +FIQ_STACK_SIZE = (3*4) @ 3 words +ABT_STACK_SIZE = (1*4) @ 1 word +UND_STACK_SIZE = (1*4) @ 1 word + +@------------------------------------------------------------------------------ +@- Top of Stack Definition +@------------------------- +@- Fast Interrupt, Interrupt, Abort, Undefined and Supervisor Stack are located +@- at the top of internal memory in order to speed the exception handling +@- context saving and restoring. +@- User (Application, C) Stack is located at the top of the external memory. +@------------------------------------------------------------------------------ +RAM_BASE = 0 +RAM_SIZE = (2*1024) +RAM_LIMIT = (RAM_BASE+RAM_SIZE) +EXT_SRAM_BASE = 0x02000000 +EXT_SRAM_SIZE = 0x00040000 @ 256Kbytes +EXT_SRAM_LIMIT = (EXT_SRAM_BASE+EXT_SRAM_SIZE) + +TOP_EXCEPTION_STACK = RAM_LIMIT @ Defined in part +TOP_APPLICATION_STACK = EXT_SRAM_LIMIT @ Defined in Target + +@------------------------------------------------------------------------------ +@- Setup the stack for each mode +@------------------------------- + ldr r0, =TOP_EXCEPTION_STACK + +@- Set up Fast Interrupt Mode and set FIQ Mode Stack + msr CPSR_c, #ARM_MODE_FIQ | I_BIT |F_BIT + mov r13, r0 @ Init stack FIQ + sub r0, r0, #FIQ_STACK_SIZE + +@- Set up Interrupt Mode and set IRQ Mode Stack + msr CPSR_c, #ARM_MODE_IRQ | I_BIT |F_BIT + mov r13, r0 @ Init stack IRQ + sub r0, r0, #IRQ_STACK_SIZE + +@- Set up Abort Mode and set Abort Mode Stack + msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT + mov r13, r0 @ Init stack Abort + sub r0, r0, #ABT_STACK_SIZE + +@- Set up Undefined Instruction Mode and set Undef Mode Stack + msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT + mov r13, r0 @ Init stack Undef + sub r0, r0, #UND_STACK_SIZE + +@- Set up Supervisor Mode and set Supervisor Mode Stack + msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT + mov sp, r0 @ Init stack Sup +@------------------------------------------------------------------------------ +@- Setup Application Operating Mode and Enable the interrupts +@------------------------------------------------------------ +@- System Mode is selected first and the stack is setup. This allows to prevent +@- any interrupt occurence while the User is not initialized. System Mode is +@- used as the interrupt enabling would be avoided from User Mode (CPSR cannot +@- be written while the core is in User Mode). +@------------------------------------------------------------------------------ + msr CPSR_c, #ARM_MODE_USER @ set User mode + ldr sp, =TOP_APPLICATION_STACK @ Init stack User + +@------------------------------------------------------------------------------ +@- Initialise C variables +@------------------------ +@- Following labels are automatically generated by the linker. +@- RO: Read-only = the code +@- RW: Read Write = the data pre-initialized and zero-initialized. +@- ZI: Zero-Initialized. +@- Pre-initialization values are located after the code area in the image. +@- Zero-initialized datas are mapped after the pre-initialized. +@- Note on the Data position : +@- If using the ARMSDT, when no -rw-base option is used for the linker, the +@- data area is mapped after the code. You can map the data either in internal +@- SRAM ( -rw-base=0x40 or 0x34) or in external SRAM ( -rw-base=0x2000000 ). +@- Note also that to improve the code density, the pre_initialized data must +@- be limited to a minimum. +@------------------------------------------------------------------------------ + + ldr r3, = __bss_start__ @ Zero init base => top of init +NoRW: ldr r1, = __bss_end__ @ Top of zero init segment + mov r2, #0 +LoopZI: cmp r3, r1 @ Zero init + strcc r2, [r3], #4 + bcc LoopZI + + + +@------------------------------------------------------------------------------ +@- Branch on C code Main function (with interworking) +@---------------------------------------------------- +@- Branch must be performed by an interworking call as either an ARM or Thumb +@- main C function must be supported. This makes the code not position- +@- independant. A Branch with link would generate errors +@------------------------------------------------------------------------------ + + bl main + +@------------------------------------------------------------------------------ +@- Loop for ever +@--------------- +@- End of application. Normally, never occur. +@- Could jump on Software Reset ( B 0x0 ). +@------------------------------------------------------------------------------ +End: + b End + .END diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/frank_micsys2_praktikum05.zip b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/frank_micsys2_praktikum05.zip Binary files differnew file mode 100644 index 0000000..7771896 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/frank_micsys2_praktikum05.zip diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/makefile b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/makefile new file mode 100644 index 0000000..ff54938 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/makefile @@ -0,0 +1,59 @@ +# Vorschlag eines Makefile zu Termin5 WS2004
+
+FILE = Termin5Aufgabe3
+Opti = 0
+all:
+
+# bersetzen der Quelldatei
+ arm-elf-gcc -c -g -O$(Opti) $(FILE).c -I ../h
+
+# Erzeugen der Assemblerdatei aus der Quelldatei
+ arm-elf-gcc -S -o$(Opti) $(FILE).c -I ../h
+
+# Erzeugen der bentitgen Objektdateien
+ arm-elf-gcc -c -g -O$(Opti) ../boot/swi.S -o swi.o -I ../h
+# eigener SoftWareInterrupt-Handler
+ arm-elf-gcc -c -g -O$(Opti) swi.S -o swi.o -I ../h
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot_ice.S -o boot_ice.o -I ../h
+ arm-elf-gcc -c -g -O$(Opti) ../boot/boot_flash.S -o boot_flash.o -I ../h
+ arm-elf-gcc -c -g -O$(Opti) seriell.S -I ../h
+ arm-elf-gcc -c -g -O$(Opti) ser_io.S -I ../h
+ arm-elf-gcc -c -g -O$(Opti) boot.S -I ../h
+
+
+# Binden fr die RAM-Version
+ arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot_ice.o swi.o seriell.o ser_io.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a
+# arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot_ice.o swi.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a
+# arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot_ice.o swi.o $(FILE).o -o $(FILE).elf
+
+# Linkerskripte noch nicht getestet
+# arm-elf-ld -T ldscript.ram boot.o swi.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+
+# Binden fr die FLASH-Version
+# arm-elf-ld -Ttext 0x1000000 boot.o swi.o $(FILE).o -o $(FILE).out /gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a
+# arm-elf-ld -Ttext 0x1000000 boot_flash.o swi.o $(FILE).o -o $(FILE).out
+
+# Linkerskripte noch nicht getestet
+# arm-elf-ld -T ldscript.rom boot.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).out /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a
+
+# -I --input-target <bfdname> Assume input file is in format <bfdname>
+# -O --output-target <bfdname> Create an output file in format <bfdname>
+# -S --strip-all Remove all symbol and relocation information
+# -x --discard-all Remove all non-global symbols
+# -N --strip-symbol <name> Do not copy symbol <name>
+# -O --output-target <bfdname> Create an output file in format <bfdname>
+# -g --strip-debug Remove all debugging symbols
+# arm-elf-objcopy -I elf32-littlearm -O binary -x -S -N -g $(FILE).out $(FILE).rom
+
+# programm.rom nach /tftpboot/downlaod.bin kopieren <cp name.rom /tftpboot/download.bin>
+# Jumper E7 mu auf STD stecken
+# Mit <telnet 141.100.xxx.xxx> mit dem BDI2000 verbinden.
+# mit <erase 0x1100000> flash-Bereich lschen
+# mit <prog 0x1100000 download.bin bin> Programm ins flash schreiben.
+#
+#
+clean:
+ rm *.o
+ rm *.s
+ rm *.elf
+ rm *.rom
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/ser_io.S b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/ser_io.S new file mode 100644 index 0000000..a8f76a8 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/ser_io.S @@ -0,0 +1,57 @@ +@---------------------------------------------------------------------------- +@ File Name : ser_io.S +@ Object : Ein- Ausgabe-Funktionen der seriellen Schnittstelle +@ +@ Namen : Matr.-Nr.: +@ : Matr.-Nr.: +@ +@---------------------------------------------------------------------------- + +@ Debuginformationen + .file "ser_io.S" + +@ Funktion + .text + .align 2 + .global inits + .type inits,function +inits: + stmfd sp!,{lr} @ Retten der Register + swi 0 + ldmfd sp!,{pc} @ Rcksprung + +@ Funktion + .text + .align 2 + .global puts + .type puts,function +puts: + stmfd sp!,{lr} @ Retten der Register + +// Hier mu Ihr Code eingefgt werden. + mov r5, r0 @ Anfangsadresse des kompletten Strings von r0 nach r5 kopieren +loop: ldrb r0, [r5], #1 @ Holen des Zeichens der Adresse in r5 nach r0 und erhhe dann Adresse in r5 + cmp r0, #0 @ Ende des Strings? entspricht binrer Null + beq L1 @ Wenn Stringende erreicht + swi 1 @ Auslsen der SWI Methode putchar (swi + offset) + b loop @ weiter bei loop solange Stringende nicht erreicht +L1: + mov r0, #0x0d @ Carriage Return + swi 1 @ Auslsen der SWI Methode putchar (swi + offset) + mov r0, #0x0a @ Linefeed + swi 1 @ Auslsen der SWI Methode putchar (swi + offset) + ldmfd sp!,{pc} @ Rcksprung + +@ Funktion + .text + .align 2 + .global gets + .type gets,function +gets: + stmfd sp!,{lr} @ Retten der Register + +// Hier knnte Ihr Code eingefgt werden! + + ldmfd sp!,{pc} @ Rcksprung + +.end diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/seriell.S b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/seriell.S new file mode 100644 index 0000000..9560075 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/seriell.S @@ -0,0 +1,73 @@ +@---------------------------------------------------------------------------- +@ File Name : seriell.S +@ Object : Grundfunktionen der seriellen Schnittstelle +@ +@ 1.0 27/10/02 GR : Creation +@---------------------------------------------------------------------------- + + .file "seriell.S" + +#include "../h/pmc.inc" +#include "../h/pio.inc" +#include "../h/usart.inc" + +DEFAULT_BAUD = 38400 +CLOCK_SPEED = 25000000 +US_BAUD = 0x29 @ CLOCK_SPEED / (16*(DEFAULT_BAUD)) + +@ Funktion + .text + .align 2 + .global init_ser + .type init_ser,function +init_ser: + stmfd sp!, {r0-r3, lr} @ Register retten + adr r0,L1 + adr r1,L1_end +init_ser_loop: + ldmia r0!, {r2-r3} + cmp r0, r1 + str r3, [r2] + bne init_ser_loop + ldmfd sp!, {r0-r3, pc} @ Rcksprung +L1: + .word PMC_BASE+PMC_PCER, 0x4 + .word PIOA_BASE+PIO_PDR, 0x18000 + .word USART0_BASE+US_CR, 0xa0 + .word USART0_BASE+US_MR, 0x8c0 + .word USART0_BASE+US_BRGR, US_BAUD + .word USART0_BASE+US_CR, 0x50 +L1_end: + +@ Funktion + .text + .align 2 + .global putchar + .type putchar,function +putchar: + stmfd sp!, {r0-r2, lr} @ Register retten + ldr r2, =USART0_BASE +1: + ldr r1, [r2, #US_CSR] + tst r1, #US_TXRDY @ ist Transmitter frei + beq 1b + str r0, [r2,#US_THR] + ldmfd sp!, {r0-r2, pc} @ Rcksprung + +@ Funktion + .text + .align 2 + .global getchar + .type getchar,function +getchar: + stmfd sp!, {r1, r2, lr} @ Register retten + ldr r2, =USART0_BASE + +1: + ldr r1, [r2, #US_CSR] + ands r1, r1, #US_RXRDY + beq 1b + ldr r0, [r2, #US_RHR] + ldmfd sp!, {r1, r2, pc} @ Rcksprung + +.end diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/swi.S b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/swi.S new file mode 100644 index 0000000..09d5cc4 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin5/swi.S @@ -0,0 +1,34 @@ +@---------------------------------------------------------------------------- +@ File Name : swi.S +@ Object : SoftwareInterruptHandler +@ +@ 1.0 27/10/02 GR : Creation +@ +@---------------------------------------------------------------------------- + + + .global SWIHandler + .text +SWIHandler: + + ldr sp, STACK @ den Wert von STACK (0x78c) auf sp kopieren + stmfd sp!, {lr} @ retten der Rcksprungadresse + ldr ip,[r14, #-4] @ hole "swi X" Aufruf in ip (lr steht auf Aufruf nach swi Befehl im aufrufenden Programm) + bic ip, ip, #0xff000000 @ maskiere X aus und speichere in ip + mov ip, ip, lsl #2 @ X ist in ip, X * 4 (entspricht lsl #2) ist Offset des swi + ldr lr, =SWIJumpTable @ Lade Adresse von SWIJumpTable in lr + ldr ip, [lr, ip] @ Addiere ip (Offset des SWI) zu Adresse SWIJumpTable und speichere in ip + mov lr, pc @ Speichere pc in lr fr Rcksprung + mov pc, ip @ Lade ip nach pc, entspricht Sprung in jeweilige SWI-Routine + ldmfd sp!, {pc}^ @ Rcksprung +STACK: + .word 0x78c + +SWIJumpTable: + .word init_ser + .word putchar + .word getchar +.end + + + diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Doku.odt b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Doku.odt Binary files differnew file mode 100644 index 0000000..9fdfe2a --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Doku.odt diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Doku.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Doku.pdf Binary files differnew file mode 100644 index 0000000..ba7abd9 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Doku.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Doku.sxw b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Doku.sxw Binary files differnew file mode 100644 index 0000000..6a2f644 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Doku.sxw diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Termin6.pdf b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Termin6.pdf Binary files differnew file mode 100644 index 0000000..e9f745b --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Termin6.pdf diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Termin6Aufgabe1.c b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Termin6Aufgabe1.c new file mode 100644 index 0000000..c4ffe50 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/Termin6Aufgabe1.c @@ -0,0 +1,288 @@ +// Lsung zu Termin6&7 +// Aufgabe 1... +// Namen: Andreas Spirka; Sven Eisenhauer +// Matr.: 702789; 707173 +// vom : 25.01.2006 + + +#include "../h/pmc.h" +#include "../h/tc.h" +#include "../h/pio.h" +#include "../h/aic.h" + +void pmcinit(void); +void pioinit(void); +void Timer_init(void); +int massemessen(void); +void pumpestart(void); +void pumpestop(void); +void greeting(void); +void ausgabe(int); +int genaumessen(void); +void Int2Str(int); +void taste_irq_handler (void) __attribute__ ((interrupt)); + +volatile int aktion=0; +char lf[2]; +char cr[2]; + +// fr die Initialisierung der Zhler TC4 und TC5 + +#define TC4_INIT TC_CLKS_MCK2 | TC_LDBSTOP | TC_CAPT | TC_LDRA_RISING_EDGE | TC_LDRB_RISING_EDGE +#define TC5_INIT TC_CLKS_MCK2 | TC_LDBSTOP | TC_CAPT | TC_LDRA_RISING_EDGE | TC_LDRB_RISING_EDGE + +// Interruptserviceroutine fr die Tasten SW1 und SW2 +void taste_irq_handler (void) +{ + StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B + StructAIC* aicbase = AIC_BASE; // Basisadresse Advanced Interrupt Controller + int taste = piobaseB->PIO_PDSR; + if (!(taste & KEY1)) // falls Schalter 1 gedrckt + aktion=1; + if (!(taste & KEY2)) // falls Schalter 2 gedrckt + aktion=2; + + aicbase->AIC_EOICR = piobaseB->PIO_ISR; // AIC End of Interrupt Command Register = 1 +} + +void pmcinit(void) +{ + StructPMC* pmcbase = PMC_BASE; + pmcbase->PMC_PCER = 0x06f84; // Clock PIOA, PIOB, Timer5, Timer4, Timer3,US0 einschalten +} + +void pioinit(void) +{ + StructPIO* piobaseB = PIOB_BASE; // Basisadresse PIO B + StructAIC* aicbase = AIC_BASE; // Basisadresse Advanced Interrupt Controller + // disable all interrupt sources of pio + piobaseB->PIO_IDR = 0xFFFFFFFF; + piobaseB->PIO_PER = KEY1|KEY2; // Schalter 1-2 enabeled + // Interrupt Initialisierung fr PIOB (0x4000) + aicbase->AIC_IDCR = (1<<PIOB_ID); // Interrupt disabled + aicbase->AIC_ICCR = (1<<PIOB_ID); // Interrupt clear + aicbase->AIC_SMR[PIOB_ID] = 0x1; // An Stelle 14 Level Sensitive / Hchste Prioritt + aicbase->AIC_SVR[PIOB_ID] = (unsigned int)taste_irq_handler; // Adresse der Interrupt Service Routine in Vektor-Tabelle + aicbase->AIC_IECR = (1<<PIOB_ID); // enable PIOB Interrupt in AIC + piobaseB->PIO_IER = KEY1|KEY2; // Schalter 1+2 lsen Interrupts aus +} + +void Timer_init(void) +{ + StructTC* tcbase3 = TCB3_BASE; // Basisadressse TC Block 3 Pumpe + StructTC* tcbase4 = TCB4_BASE; // Basisadressse TC Block 4 Waage + StructTC* tcbase5 = TCB5_BASE; // Basisadressse TC Block 5 Waage + StructPIO* piobaseA = PIOA_BASE; // Basisadresse PIO A + + tcbase3->TC_CCR = TC_CLKDIS; // Disable Clock + + // Initialize the mode of the timer 3 + tcbase3->TC_CMR = + TC_ACPC_CLEAR_OUTPUT | //ACPC : Register C clear TIOA + TC_ACPA_SET_OUTPUT | //ACPA : Register A set TIOA + TC_WAVE | //WAVE : Waveform mode + TC_CPCTRG | //CPCTRG : Register C compare trigger enable + TC_CLKS_MCK1024; //TCCLKS : MCKI / 1024 + + // Initialize the counter: + tcbase3->TC_RA = 244; + tcbase3->TC_RC = 488; // RA = RC/2 fr symmetrisches Signal + + // Start the timer : + tcbase3->TC_CCR = TC_CLKEN ; //__ + tcbase3->TC_CCR = TC_SWTRG ; //__ + piobaseA->PIO_PER = (1<<PIOTIOA3) ; // Pio herrscht ber pin + piobaseA->PIO_OER = (1<<PIOTIOA3) ; // Output an pin + piobaseA->PIO_CODR = (1<<PIOTIOA3) ; // clear output -> low signal, pumpe aus + +// Periodendauer der Waagensignale messen +// Signal aud TIOA4 ca. 16kHz entspricht ca. einer Periodendauer von 62,5us +// durch den Teiler von 32 ergeben sich ca. 2ms +// Zhler mit positiver Flanke starten + + //piobaseA->PIO_PDR = 0x090; + piobaseA->PIO_PDR = (1<<PIOTIOA4)|(1<<PIOTIOA5); + tcbase4->TC_CCR = TC_CLKDIS; + tcbase4->TC_CMR = TC4_INIT; + tcbase4->TC_CCR = TC_CLKEN; + tcbase4->TC_CCR = TC_SWTRG; + + tcbase5->TC_CCR = TC_CLKDIS; + tcbase5->TC_CMR = TC5_INIT; + tcbase5->TC_CCR = TC_CLKEN; + tcbase5->TC_CCR = TC_SWTRG; +} + +int massemessen(void) +{ + StructTC* tcbase4 = TCB4_BASE; + StructTC* tcbase5 = TCB5_BASE; + volatile int captureRA1; + volatile int captureRB1; + volatile int capturediff1; + volatile float Periodendauer1; + volatile int captureRA2; + volatile int captureRB2; + volatile int capturediff2; + volatile float Periodendauer2; + volatile int c1=18030; + volatile int c2=40; + volatile int masse; + + tcbase4->TC_CCR = TC_SWTRG; + tcbase5->TC_CCR = TC_SWTRG; + while (!( tcbase4->TC_SR & TC_LDBSTOP)); // Capture Register B wurde geladen Messung abgeschlossen + captureRA1 = tcbase4->TC_RA; // + captureRB1 = tcbase4->TC_RB; + capturediff1 = abs(captureRB1) - abs(captureRA1); + Periodendauer1 = abs(capturediff1); + while (!( tcbase5->TC_SR & TC_LDBSTOP)); // Capture Register B wurde geladen Messung abgeschlossen + captureRA2 = tcbase5->TC_RA; // + captureRB2 = tcbase5->TC_RB; + capturediff2 = abs(captureRB2) - abs(captureRA2); + Periodendauer2 = abs(capturediff2); + + masse = c1 * ((Periodendauer1 / Periodendauer2) -1) -c2; + return masse; +} + +void pumpestart(void) +{ + StructPIO* piobaseA = PIOA_BASE; + piobaseA->PIO_PDR = (1<<PIOTIOA3); // Timer herrscht ber Bit (Taktsignal) +} + +void pumpestop(void) +{ + StructPIO* piobaseA = PIOA_BASE; + // Vermeiden, da dauerhaftes High Signal (PIO herrscht ber das BIT) + piobaseA->PIO_PER = (1<<PIOTIOA3) ; // PIN der PIO zuweisen + piobaseA->PIO_OER = (1<<PIOTIOA3) ; // wird auf Output gesetzt + piobaseA->PIO_CODR = (1<<PIOTIOA3) ; // Clear Output (low Signal) +} + +void greeting(void) +{ + cr[0]=0x0d; + lf[0]=0x0a; + lf[1]='\0'; + cr[1]='\0'; + puts("AUSSCHANKSTATION\0"); + puts(&cr[0]); + puts(&lf[0]); + puts("Bitte Becher auf die Waage stellen\0"); + puts(&cr[0]); + puts(&lf[0]); + puts("SW1 zum tarieren drcken\0"); + puts(&cr[0]); + puts(&lf[0]); +} + +void ausgabe(int m) +{ + cr[0]=0x0d; + lf[0]=0x0a; + lf[1]='\0'; + cr[1]='\0'; + puts("Gemessene Gesamtmasse: \0"); + Int2Str(m); + puts(&cr[0]); + puts(&lf[0]); + puts("Becher kann entfernt werden\0"); + puts(&cr[0]); + puts(&lf[0]); + +} + +void Int2Str(int m) +{ + int a,i=7; + char string[9]; + string[8] = '\0'; + + while(m != 0) + { + a = m%10; + string[i] = a + '0'; + m = m/10; + i--; + } + puts(&string[i+1]); +} + +int genaumessen(void) +{ + volatile int durchlaeufe=10; + volatile int summe=0; + volatile int retVal=0; + volatile int i=0; + for (i=0;i<durchlaeufe;i++) + { + summe+=massemessen(); + } + retVal= summe/durchlaeufe; + return retVal; +} + +int main(void) +{ + volatile int masse=0; + volatile int tara=0; + volatile int netto=0; + + cr[0]=0x0d; + lf[0]=0x0a; + lf[1]='\0'; + cr[1]='\0'; + + inits(); + greeting(); + pmcinit(); + Timer_init(); + pioinit(); + + for(;;) + { + if(aktion == 1) + { + puts("Tara: \0"); + tara=genaumessen(); + netto=0; + Int2Str(tara); + puts(" SW2 startet die Pumpe"); + puts(&cr[0]); + aktion=0; + } + if (aktion == 2 && tara != 0) + { + puts(&cr[0]); + puts(&lf[0]); + pumpestart(); + while(netto <= 50) + { + masse=genaumessen(); + netto=masse-tara; + puts("Fuellgewicht: \0"); + Int2Str(netto); + puts(&cr[0]); + } + pumpestop(); + ausgabe(masse); + do { + masse=genaumessen(); + } + while (masse > 10); + // Gewicht hat sich gendert, d. h. Becher wurde entfernt + // D. h. von vorne starten + greeting(); + aktion=0; + } + } + // disable piob command register in AIC + //aicbase->AIC_IDCR = (1<<PIOB_ID); + // disable all interrupt sources of pio + //piobaseB->PIO_IDR = 0xFFFFFFFF; + // Timer (0x200), PIOA (0x2000), PIOB (0x4000) ausschalten + //pmcbase->PMC_PCDR = (1<<PIOA_ID)|(1<<PIOB_ID)|(1<<TC3_ID); + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/doku.txt b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/doku.txt new file mode 100644 index 0000000..ebab65e --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/doku.txt @@ -0,0 +1,19 @@ +Dokumentaion Ausschankstation
+
+1. Nach dem Start des Programms erscheint ein Begrungstext
+ auf der seriellen Konsole.
+
+2. Stellen Sie einen Becher oder ein Glas auf die Waage.
+
+3. Drcken Sie die Taste SW1 zum tarieren der Waage.
+
+4. Drcken Sie die Taste SW2 zum Start des Abfllvorgangs.
+
+5. Es werden 50 ml bzw. g abgefllt.
+
+6. Auf der seriellen Konsole erscheint das Gesamtgewicht
+ auf der Waage. (Behlter plus Inhalt)
+
+7. Entfernen Sie den Becher.
+
+8. Starten Sie einen weiteren Abfllvorgang mit Schritt 2.
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/frank_micsys2_praktikum06.zip b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/frank_micsys2_praktikum06.zip Binary files differnew file mode 100644 index 0000000..70ea757 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/frank_micsys2_praktikum06.zip diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/makefile b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/makefile new file mode 100644 index 0000000..9cf7745 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/makefile @@ -0,0 +1,52 @@ +FILE = Termin6Aufgabe1 +Opti = 0 +all: + +# bersetzen der Quelldatei + arm-elf-gcc -c -g -O$(Opti) $(FILE).c -I ../h + +# Erzeugen der Assemblerdatei aus der Quelldatei + arm-elf-gcc -S -O$(Opti) $(FILE).c -I ../h + +# Erzeugen der bentitgen Objektdateien + arm-elf-gcc -c -g -O$(Opti) swi.S -o swi.o -I ../h + arm-elf-gcc -c -g -O$(Opti) ../boot/boot.s -o boot.o -I ../h +# arm-elf-gcc -c -g -O$(Opti) ../boot/boot_ice.S -o boot_ice.o -I ../h +# arm-elf-gcc -c -g -O$(Opti) ../boot/boot_flash.S -o boot_flash.o -I ../h + arm-elf-gcc -c -g -O$(Opti) seriell.S -o seriell.o -I ../h + arm-elf-gcc -c -g -O$(Opti) ser_io.S -o ser_io.o -I ../h + +# Binden fr die RAM-Version + arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot.o swi.o seriell.o ser_io.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a +# arm-elf-ld -Ttext 0x02000000 -O$(Opti) boot_ice.o swi.o $(FILE).o -o $(FILE).elf + +# Linkerskripte noch nicht getestet +# arm-elf-ld -T ldscript.ram boot.o swi.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).elf /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a + +# Binden fr die FLASH-Version +# arm-elf-ld -Ttext 0x1000000 boot.o swi.o $(FILE).o -o $(FILE).out /usr/gnutools/lib/gcc-lib/arm-elf/3.3.2/libgcc.a +# arm-elf-ld -Ttext 0x1000000 boot_flash.o swi.o $(FILE).o -o $(FILE).out + +# Linkerskripte noch nicht getestet +# arm-elf-ld -T ldscript.rom boot.o seriell.o ser_io.o swi.o $(FILE).o -o $(FILE).out /gnutools/lib/gcc-lib/arm-elf/3.2.2/libgcc.a + +# -I --input-target <bfdname> Assume input file is in format <bfdname> +# -O --output-target <bfdname> Create an output file in format <bfdname> +# -S --strip-all Remove all symbol and relocation information +# -x --discard-all Remove all non-global symbols +# -N --strip-symbol <name> Do not copy symbol <name> +# -O --output-target <bfdname> Create an output file in format <bfdname> +# -g --strip-debug Remove all debugging symbols +# arm-elf-objcopy -I elf32-littlearm -O binary -x -S -N -g $(FILE).out $(FILE).rom +# programm.rom nach /tftpboot/downlaod.bin kopieren <cp name.rom /tftpboot/download.bin> +# Jumper E7 mu auf STD stecken +# Mit <telnet 141.100.xxx.xxx> mit dem BDI2000 verbinden. +# mit <erase 0x1100000> flash-Bereich lschen +# mit <prog 0x1100000 download.bin bin> Programm ins flash schreiben. +# +# +clean: + rm *.o + rm *.s + rm *.elf + rm *.rom diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/ser_io.S b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/ser_io.S new file mode 100644 index 0000000..5bad2a8 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/ser_io.S @@ -0,0 +1,57 @@ +@---------------------------------------------------------------------------- +@ File Name : ser_io.S +@ Object : Ein- Ausgabe-Funktionen der seriellen Schnittstelle +@ +@ Namen : Matr.-Nr.: +@ : Matr.-Nr.: +@ +@---------------------------------------------------------------------------- + +@ Debuginformationen + .file "ser_io.S" + +@ Funktion + .text + .align 2 + .global inits + .type inits,function +inits: + stmfd sp!,{lr} @ Retten der Register + swi 0 + ldmfd sp!,{pc} @ Rcksprung + +@ Funktion + .text + .align 2 + .global puts + .type puts,function +puts: + stmfd sp!,{lr} @ Retten der Register + +// Hier mu Ihr Code eingefgt werden. + mov r5, r0 @ Anfangsadresse des kompletten Strings von r0 nach r5 kopieren +loop: ldrb r0, [r5], #1 @ Holen des Zeichens der Adresse in r5 nach r0 und erhhe dann Adresse in r5 + cmp r0, #0 @ Ende des Strings? entspricht binrer Null + beq L1 @ Wenn Stringende erreicht + swi 1 @ Auslsen der SWI Methode putchar (swi + offset) + b loop @ weiter bei loop solange Stringende nicht erreicht +L1: + @mov r0, #0x0d @ Carriage Return + @swi 1 @ Auslsen der SWI Methode putchar (swi + offset) + @mov r0, #0x0a @ Linefeed + @swi 1 @ Auslsen der SWI Methode putchar (swi + offset) + ldmfd sp!,{pc} @ Rcksprung + +@ Funktion + .text + .align 2 + .global gets + .type gets,function +gets: + stmfd sp!,{lr} @ Retten der Register + +// Hier knnte Ihr Code eingefgt werden! + + ldmfd sp!,{pc} @ Rcksprung + +.end diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/seriell.S b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/seriell.S new file mode 100644 index 0000000..9560075 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/seriell.S @@ -0,0 +1,73 @@ +@---------------------------------------------------------------------------- +@ File Name : seriell.S +@ Object : Grundfunktionen der seriellen Schnittstelle +@ +@ 1.0 27/10/02 GR : Creation +@---------------------------------------------------------------------------- + + .file "seriell.S" + +#include "../h/pmc.inc" +#include "../h/pio.inc" +#include "../h/usart.inc" + +DEFAULT_BAUD = 38400 +CLOCK_SPEED = 25000000 +US_BAUD = 0x29 @ CLOCK_SPEED / (16*(DEFAULT_BAUD)) + +@ Funktion + .text + .align 2 + .global init_ser + .type init_ser,function +init_ser: + stmfd sp!, {r0-r3, lr} @ Register retten + adr r0,L1 + adr r1,L1_end +init_ser_loop: + ldmia r0!, {r2-r3} + cmp r0, r1 + str r3, [r2] + bne init_ser_loop + ldmfd sp!, {r0-r3, pc} @ Rcksprung +L1: + .word PMC_BASE+PMC_PCER, 0x4 + .word PIOA_BASE+PIO_PDR, 0x18000 + .word USART0_BASE+US_CR, 0xa0 + .word USART0_BASE+US_MR, 0x8c0 + .word USART0_BASE+US_BRGR, US_BAUD + .word USART0_BASE+US_CR, 0x50 +L1_end: + +@ Funktion + .text + .align 2 + .global putchar + .type putchar,function +putchar: + stmfd sp!, {r0-r2, lr} @ Register retten + ldr r2, =USART0_BASE +1: + ldr r1, [r2, #US_CSR] + tst r1, #US_TXRDY @ ist Transmitter frei + beq 1b + str r0, [r2,#US_THR] + ldmfd sp!, {r0-r2, pc} @ Rcksprung + +@ Funktion + .text + .align 2 + .global getchar + .type getchar,function +getchar: + stmfd sp!, {r1, r2, lr} @ Register retten + ldr r2, =USART0_BASE + +1: + ldr r1, [r2, #US_CSR] + ands r1, r1, #US_RXRDY + beq 1b + ldr r0, [r2, #US_RHR] + ldmfd sp!, {r1, r2, pc} @ Rcksprung + +.end diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/swi.S b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/swi.S new file mode 100644 index 0000000..09d5cc4 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/Termin6/swi.S @@ -0,0 +1,34 @@ +@---------------------------------------------------------------------------- +@ File Name : swi.S +@ Object : SoftwareInterruptHandler +@ +@ 1.0 27/10/02 GR : Creation +@ +@---------------------------------------------------------------------------- + + + .global SWIHandler + .text +SWIHandler: + + ldr sp, STACK @ den Wert von STACK (0x78c) auf sp kopieren + stmfd sp!, {lr} @ retten der Rcksprungadresse + ldr ip,[r14, #-4] @ hole "swi X" Aufruf in ip (lr steht auf Aufruf nach swi Befehl im aufrufenden Programm) + bic ip, ip, #0xff000000 @ maskiere X aus und speichere in ip + mov ip, ip, lsl #2 @ X ist in ip, X * 4 (entspricht lsl #2) ist Offset des swi + ldr lr, =SWIJumpTable @ Lade Adresse von SWIJumpTable in lr + ldr ip, [lr, ip] @ Addiere ip (Offset des SWI) zu Adresse SWIJumpTable und speichere in ip + mov lr, pc @ Speichere pc in lr fr Rcksprung + mov pc, ip @ Lade ip nach pc, entspricht Sprung in jeweilige SWI-Routine + ldmfd sp!, {pc}^ @ Rcksprung +STACK: + .word 0x78c + +SWIJumpTable: + .word init_ser + .word putchar + .word getchar +.end + + + diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/boot/aic.inc b/Bachelor/Mikroprozessorsysteme2/mi2/boot/aic.inc new file mode 100644 index 0000000..c2722b7 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/boot/aic.inc @@ -0,0 +1,54 @@ +@------------------------------------------ +@- AIC User Interface Structure Definition +@------------------------------------------ + +AIC_SMR = 0 @- Source Mode Register +AIC_SVR = 0x80 @- Source Vector Register +AIC_IVR = 0x100 @- IRQ Vector Register +AIC_FVR = 0x104 @- FIQ Vector Register +AIC_ISR = 0x108 @- Interrupt Status Register +AIC_IPR = 0x10c @- Interrupt Pending Register +AIC_IMR = 0x110 @- Interrupt Mask Register +AIC_CISR = 0x114 @- Core Interrupt Status Register +@ = 0x118 @- Reserved 0 +@ = 0x11c @- Reserved 1 +AIC_IECR = 0x120 @- Interrupt Enable Command Register +AIC_IDCR = 0x124 @- Interrupt Disable Command Register +AIC_ICCR = 0x128 @- Interrupt Clear Command Register +AIC_ISCR = 0x12c @- Interrupt Set Command Register +AIC_EOICR = 0x130 @- of Interrupt Command Register +AIC_SPU = 0x134 @- Spurious Vector Register + +@--------------------------------------------- +@- AIC_SMR[]: Interrupt Source Mode Registers +@--------------------------------------------- + +AIC_PRIOR = 0x07 @- Priority + +AIC_SRCTYPE = 0x60 @- Source Type Definition +AIC_SRCTYPE_INT_LEVEL_SENSITIVE = 0x00 @- Level Sensitive +AIC_SRCTYPE_INT_EDGE_TRIGGERED = 0x20 @- Edge Triggered +AIC_SRCTYPE_EXT_LOW_LEVEL = 0x00 @- Low Level +AIC_SRCTYPE_EXT_NEGATIVE_EDGE = 0x20 @- Negative Edge +AIC_SRCTYPE_EXT_HIGH_LEVEL = 0x40 @- High Level +AIC_SRCTYPE_EXT_POSITIVE_EDGE = 0x60 @- Positive Edge + +@-------------------------------------- +@- AIC_ISR: Interrupt Status Register +@-------------------------------------- + +AIC_IRQID = 0x1F @- Current source interrupt + +@------------------------------------------- +@- AIC_CISR: Interrupt Core Status Register +@------------------------------------------- + +AIC_NFIQ = 0x01 @- Core FIQ Status +AIC_NIRQ = 0x02 @- Core IRQ Status + +@--------------------------------------------
+@- Advanced Interrupt COntroller BAse Address +@-------------------------------------------- + +AIC_BASE = 0xFFFFF000 + diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/boot/boot.s b/Bachelor/Mikroprozessorsysteme2/mi2/boot/boot.s new file mode 100644 index 0000000..4ba5a64 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/boot/boot.s @@ -0,0 +1,540 @@ +# 1 "../boot/boot.S" +# 1 "<built-in>" +# 1 "<command line>" +# 1 "../boot/boot.S" +@------------------------------------------------------------------------------ +@- ATMEL Microcontroller Software Support - ROUSSET - +@------------------------------------------------------------------------------ +@ The software is delivered "AS IS" without warranty or condition of any +@ kind, either express, implied or statutory. This includes without +@ limitation any warranty or condition with respect to merchantability or +@ fitness for any particular purpose, or against the infringements of +@ intellectual property rights of others. +@----------------------------------------------------------------------------- +@- File source : cstartup_ice.sboot.S +@- Object : Boot for simulate Final Application version to be +@- loaded in SRAM. Only change as the internal RAM address +@- and support the Semihosting +@- Compilation flag : SEMIHOSTING => use the semihosting facilities +@- +@- 1.0 17/09/02 GR : Creation +@------------------------------------------------------------------------------ + +# 1 "../boot/aic.inc" 1 +@------------------------------------------ +@- AIC User Interface Structure Definition +@------------------------------------------ + +AIC_SMR = 0 @- Source Mode Register +AIC_SVR = 0x80 @- Source Vector Register +AIC_IVR = 0x100 @- IRQ Vector Register +AIC_FVR = 0x104 @- FIQ Vector Register +AIC_ISR = 0x108 @- Interrupt Status Register +AIC_IPR = 0x10c @- Interrupt Pending Register +AIC_IMR = 0x110 @- Interrupt Mask Register +AIC_CISR = 0x114 @- Core Interrupt Status Register +@ = 0x118 @- Reserved 0 +@ = 0x11c @- Reserved 1 +AIC_IECR = 0x120 @- Interrupt Enable Command Register +AIC_IDCR = 0x124 @- Interrupt Disable Command Register +AIC_ICCR = 0x128 @- Interrupt Clear Command Register +AIC_ISCR = 0x12c @- Interrupt Set Command Register +AIC_EOICR = 0x130 @- of Interrupt Command Register +AIC_SPU = 0x134 @- Spurious Vector Register + +@--------------------------------------------- +@- AIC_SMR[]: Interrupt Source Mode Registers +@--------------------------------------------- + +AIC_PRIOR = 0x07 @- Priority + +AIC_SRCTYPE = 0x60 @- Source Type Definition +AIC_SRCTYPE_INT_LEVEL_SENSITIVE = 0x00 @- Level Sensitive +AIC_SRCTYPE_INT_EDGE_TRIGGERED = 0x20 @- Edge Triggered +AIC_SRCTYPE_EXT_LOW_LEVEL = 0x00 @- Low Level +AIC_SRCTYPE_EXT_NEGATIVE_EDGE = 0x20 @- Negative Edge +AIC_SRCTYPE_EXT_HIGH_LEVEL = 0x40 @- High Level +AIC_SRCTYPE_EXT_POSITIVE_EDGE = 0x60 @- Positive Edge + +@-------------------------------------- +@- AIC_ISR: Interrupt Status Register +@-------------------------------------- + +AIC_IRQID = 0x1F @- Current source interrupt + +@------------------------------------------- +@- AIC_CISR: Interrupt Core Status Register +@------------------------------------------- + +AIC_NFIQ = 0x01 @- Core FIQ Status +AIC_NIRQ = 0x02 @- Core IRQ Status + +@-------------------------------------------- +@- Advanced Interrupt COntroller BAse Address +@-------------------------------------------- + +AIC_BASE = 0xFFFFF000 +# 20 "../boot/boot.S" 2 +# 1 "../boot/ebi.inc" 1 +@------------------------------------------------------------------------------ +@- EBI Initialization Data +@------------------------- +@- The EBI values depend to target choice , Clock, and memories access time. +@- Yous must be define these values in include file +@- The EBI User Interface Image which is copied by the boot. +@- The EBI_CSR_x are defined in the target and hardware depend. +@- That's hardware! Details in the Electrical Datasheet of the AT91 device.' +@- EBI Base Address is added at the end for commodity in copy code. +@- ICE note :For ICE debug no need to set the EBI value these values already set +@- by the boot function. +@------------------------------------------------------------------------------ +FLASH_BASE = 0x1000000 +EXT_SRAM_BASE = 0x2000000 +EBI_BASE = 0xFFE00000 @- External Bus Interface + +EBI_CSR_0 = (FLASH_BASE | 0x2529) @ 0x01000000, 16MB, 2 tdf, 16 bits, 2 WS +EBI_CSR_1 = (EXT_SRAM_BASE | 0x2121) @ 0x02000000, 16MB, 0 hold, 16 bits, 1 WS +EBI_CSR_2 = 0x20000000 @ unused +EBI_CSR_3 = 0x30000000 @ unused +EBI_CSR_4 = 0x40000000 @ unused +EBI_CSR_5 = 0x50000000 @ unused +EBI_CSR_6 = 0x60000000 @ unused +EBI_CSR_7 = 0x70000000 @ unused +# 21 "../boot/boot.S" 2 + +@------------------------------------------------------------------------------ +@- Area Definition +@----------------- +@- Must be defined as function to put first in the code as it must be mapped +@- at SRAM. +@------------------------------------------------------------------------------ + + .text + +@------------------------------------------------------------------------------ +@- Semihosting support +@-------------------------------- +@- The C runtime library is the IO functions provided by the semihosting. +@- They are generally costly in code and can be used as the debugger mode (ICE) +@------------------------------------------------------------------------------ +@- Define "__main" to ensure that C runtime system is not linked + + .global _start +@------------------------------------------------------------------------------ +@- Define the entry point +@------------------------ +@- Note on the link address and the Remap command. +@- In order to guarantee that the non position-independant code (the ARM linker +@- armlink doesn't generate position-independant code) can work on the ARM, ' +@- it must be linked at address at which it expects to run. +@- In this startup example, we use RAM as base address. +@------------------------------------------------------------------------------ +_start: + +@------------------------------------------------------------------------------ +@- Exception vectors +@-------------------- +@- In the ICE function your board as run the boot code and initialize the remap +@- feature. but these code it's location independant and can be emulate the csartup_fash' +@- fonctionnality. +@- These vectors are read at RAM address. in Flash mode these vectors are at 0 +@- They absolutely requires to be in relative addresssing mode in order to +@- guarantee a valid jump. For the moment, all are just looping (what may be +@- dangerous in a final system). If an exception occurs before remap, this +@- would result in an infinite loop. +@------------------------------------------------------------------------------ + +Reset: B InitReset @ reset +undefvec: B undefvec @ Undefined Instruction +swivec: B swivec @ Software Interrupt +pabtvec: B pabtvec @ Prefetch Abort +dabtvec: B dabtvec @ Data Abort +rsvdvec: B rsvdvec @ reserved +irqvec: B irqvec @ reserved +fiqvec: B fiqvec @ reserved + +@------------------------------------------------------------------------------ +@- Exception vectors ( after cstartup execution ) +@------------------------------------ +@- These vectors are read at RAM address after the remap command is performed in +@- the EBI. As they will be relocated at address 0x0 to be effective, a +@- relative addressing is forbidden. The only possibility to get an absolute +@- addressing for an ARM vector is to read a PC relative value at a defined +@- offset. It is easy to reserve the locations 0x20 to 0x3C (the 8 next +@- vectors) for storing the absolute exception handler address. +@- The AIC vectoring access vectors are saved in the interrupt and fast +@- interrupt ARM vectors. So, only 5 offsets are required ( reserved vector +@- offset is never used). +@- The provisory handler addresses are defined on infinite loop and can be +@- modified at any time. +@- Note also that the reset is only accessible by a jump from the application +@- to 0. It is an actual software reset. +@- As the 13 first location are used by the vectors, the read/write link +@- address must be defined from 0x34 if internal data mapping is required. +@- (use for that the option -rw- base=0x34 +@------------------------------------------------------------------------------ + +VectorTable: + ldr pc, [pc, #0x18] @ SoftReset + ldr pc, [pc, #0x18] @ UndefHandler + ldr pc, [pc, #0x18] @ SWIHandler + ldr pc, [pc, #0x18] @ PrefetchAbortHandler + ldr pc, [pc, #0x18] @ DataAbortHandler + nop @ Reserved + ldr pc, [pc,#-0xF20] @ IRQ : read the AIC + ldr pc, [pc,#-0xF20] @ FIQ : read the AIC + +@- There are only 5 offsets as the vectoring is used. + .word _SoftReset + .word _UndefHandler +_SWIadress: + .word SWIHandler + .word _PrefetchAbortHandler + .word _DataAbortHandler + +@- Vectoring Execution function run at absolut addresss +_SoftReset: b _SoftReset +_UndefHandler: b _UndefHandler +_SWIHandler: b _SWIHandler +_PrefetchAbortHandler: b _PrefetchAbortHandler +_DataAbortHandler: b _DataAbortHandler + + + +InitTableEBI: + .word EBI_CSR_0 + .word EBI_CSR_1 + .word EBI_CSR_2 + .word EBI_CSR_3 + .word EBI_CSR_4 + .word EBI_CSR_5 + .word EBI_CSR_6 + .word EBI_CSR_7 + .word 0x00000001 @ REMAP command + .word 0x00000006 @ 6 memory regions, standard read +PtEBIBase: + .word EBI_BASE @ EBI Base Address + +@------------------------------------------------------------------------------ +@- The reset handler before Remap +@-------------------------------- +@- From here, the code is executed from SRAM address +@------------------------------------------------------------------------------ +InitReset: + +@------------------------------------------------------------------------------ +@- Speed up the Boot sequence +@---------------------------- +@- After reset, the number os wait states on chip select 0 is 8. All AT91 +@- Evaluation Boards fits fast flash memories, so that the number of wait +@- states can be optimized to fast up the boot sequence. +@- ICE note :For ICE debug no need to set the EBI value these values already set +@- by the boot function. +@------------------------------------------------------------------------------ +@- Load System EBI Base address and CSR0 Init Value + ldr r0, PtEBIBase + ldr r1, [pc,#-(8+.-InitTableEBI)] @ values (relative) + +@- Speed up code execution by disabling wait state on Chip Select 0 + str r1, [r0] + +@------------------------------------------------------------------------------ +@- low level init +@---------------- +@ Call __low_level_init to perform initialization before initializing +@ AIC and calling main. +@---------------------------------------------------------------------- + +@ bl __low_level_init + + +@------------------------------------------------------------------------------ +@- Reset the Interrupt Controller +@-------------------------------- +@- Normally, the code is executed only if a reset has been actually performed. +@- So, the AIC initialization resumes at setting up the default vectors. +@------------------------------------------------------------------------------ +@- Load the AIC Base Address and the default handler addresses + + add r0, pc,#-(8+.-AicData) @ @ where to read values (relative) + + ldmia r0, {r1-r4} + +@- Setup the Spurious Vector + str r4, [r1, #AIC_SPU] @ r4 = spurious handler + + +@- ICE note : For ICE debug +@- Perform 8 End Of Interrupt Command to make sure AIC will not lock out nIRQ + mov r0, #8 +LoopAic0: + str r1, [r1, #AIC_EOICR] @ any value written + subs r0, r0, #1 + bhi LoopAic0 + +@- Reset Interrupts + mov r0, #0 + sub r0, r0, #1 @ all bits set + str r0, [r1, #AIC_IDCR] + str r0, [r1, #AIC_ICCR] + +@- Set up the default interrupt handler vectors + str r2, [r1, #AIC_SVR] @ SVR[0] for FIQ + add r1, r1, #AIC_SVR + mov r0, #31 @ counter +LoopAic1: + str r3, [r1, r0, LSL #2] @ SVRs for IRQs + subs r0, r0, #1 @ do not save FIQ + bhi LoopAic1 + + b EndInitAic + +@- Default Interrupt Handlers +AicData: + .word AIC_BASE @ AIC Base Address +@------------------------------------------------------------------------------ +@- Default Interrupt Handler +@--------------------------- +@- These function are defined in the AT91 library. If you want to change this +@- you can redifine these function in your appication code +@------------------------------------------------------------------------------ + +@ IMPORT at91_default_fiq_handler +@ IMPORT at91_default_irq_handler +@ IMPORT at91_spurious_handler +PtDefaultHandler: + .word at91_default_fiq_handler + .word at91_default_irq_handler + .word at91_spurious_handler + +at91_default_fiq_handler: B at91_default_fiq_handler +at91_default_irq_handler: B at91_default_irq_handler +at91_spurious_handler: B at91_spurious_handler + +EndInitAic: + +@------------------------------------------------------------------------------ +@- Setup Exception Vectors in Internal RAM before Remap +@------------------------------------------------------ +@- That's important to perform this operation before Remap in order to guarantee' +@- that the core has valid vectors at any time during the remap operation. +@- Note: There are only 5 offsets as the vectoring is used. +@- ICE note : In this code only the start address value is changed if you use +@- without Semihosting. +@- Before Remap the internal RAM it's 0x300000' +@- After Remap the internal RAM it's 0x000000' +@- Remap it's already executed it's no possible to write to 0x300000. +@------------------------------------------------------------------------------ +@- Copy the ARM exception vectors + + + mov r0, #0x28 + add r1, pc,#-(8+.-Init_Vector) + str r1,[r0] + mov r0, #0x08 + add r1, pc,#-(8+.-VectorTable-8) + ldr r1,[r1] + str r1,[r0] + swi 0 +@ The RAM_BASE = 0 it's specific for ICE' + + RAM_BASE = 0 +Init_Vector: + mov r8, #RAM_BASE @ @ of the hard vector after remap in internal RAM 0x0 + + add r9, pc,#-(8+.-VectorTable) @ @ where to read values (relative) + ldmia r9!, {r0-r7} @ read 8 vectors + + stmia r8!, {r0-r7} @ store them + + ldmia r9!, {r0-r4} @ read 5 absolute handler addresses + stmia r8!, {r0-r4} @ store them + +@------------------------------------------------------------------------------ +@- Initialise the Memory Controller +@---------------------------------- +@- That's principaly the Remap Command. Actually, all the External Bus ' +@- Interface is configured with some instructions and the User Interface Image +@- as described above. The jump "mov pc, r12" could be unread as it is after +@- located after the Remap but actually it is thanks to the Arm core pipeline. +@- The IniTableEBI addressing must be relative . +@- The PtInitRemap must be absolute as the processor jumps at this address +@- immediatly after the Remap is performed. +@- Note also that the EBI base address is loaded in r11 by the "ldmia". +@- ICE note :For ICE debug these values already set by the boot function and the +@- Remap it's already executed it's no need to set still. +@------------------------------------------------------------------------------ +@- Copy the Image of the Memory Controller + sub r10, pc,#(8+.-InitTableEBI) @ get the address of the chip select register image + ldr r12, PtInitRemap @ get the real jump address ( after remap ) + +@- Copy Chip Select Register Image to Memory Controller and command remap + ldmia r10!, {r0-r9,r11} @ load the complete image and the EBI base + stmia r11!, {r0-r9} @ store the complete image with the remap command + +@- Jump to ROM at its new address + mov pc, r12 @ jump and break the pipeline + +PtInitRemap: + .word InitRemap @ address where to jump after REMAP + +@------------------------------------------------------------------------------ +@- The Reset Handler after Remap +@------------------------------- +@- From here, the code is continous execute from its link address. +@------------------------------------------------------------------------------ + +InitRemap: + +@-------------------------------- +@- ARM Core Mode and Status Bits +@-------------------------------- + +ARM_MODE_USER = 0x10 +ARM_MODE_FIQ = 0x11 +ARM_MODE_IRQ = 0x12 +ARM_MODE_SVC = 0x13 +ARM_MODE_ABORT = 0x17 +ARM_MODE_UNDEF = 0x1B +ARM_MODE_SYS = 0x1F + +I_BIT = 0x80 +F_BIT = 0x40 +T_BIT = 0x20 + +@------------------------------------------------------------------------------ +@- Stack Sizes Definition +@------------------------ +@- Interrupt Stack requires 3 words x 8 priority level x 4 bytes when using +@- the vectoring. This assume that the IRQ_ENTRY/IRQ_EXIT macro are used. +@- The Interrupt Stack must be adjusted depending on the interrupt handlers. +@- Fast Interrupt is the same than Interrupt without priority level. +@- Other stacks are defined by default to save one word each. +@- The System stack size is not defined and is limited by the free internal +@- SRAM. +@- User stack size is not defined and is limited by the free external SRAM. +@------------------------------------------------------------------------------ + +IRQ_STACK_SIZE = (3*8*4) @ 3 words per interrupt priority level +FIQ_STACK_SIZE = (3*4) @ 3 words +ABT_STACK_SIZE = (1*4) @ 1 word +UND_STACK_SIZE = (1*4) @ 1 word + +@------------------------------------------------------------------------------ +@- Top of Stack Definition +@------------------------- +@- Fast Interrupt, Interrupt, Abort, Undefined and Supervisor Stack are located +@- at the top of internal memory in order to speed the exception handling +@- context saving and restoring. +@- User (Application, C) Stack is located at the top of the external memory. +@------------------------------------------------------------------------------ +RAM_BASE = 0 +RAM_SIZE = (2*1024) +RAM_LIMIT = (RAM_BASE+RAM_SIZE) +EXT_SRAM_BASE = 0x02000000 +EXT_SRAM_SIZE = 0x00040000 @ 256Kbytes +EXT_SRAM_LIMIT = (EXT_SRAM_BASE+EXT_SRAM_SIZE) + +TOP_EXCEPTION_STACK = RAM_LIMIT @ Defined in part +TOP_APPLICATION_STACK = EXT_SRAM_LIMIT @ Defined in Target + +@------------------------------------------------------------------------------ +@- Setup the stack for each mode +@------------------------------- + ldr r0, =TOP_EXCEPTION_STACK + +@- Set up Fast Interrupt Mode and set FIQ Mode Stack + msr CPSR_c, #ARM_MODE_FIQ | I_BIT |F_BIT + mov r13, r0 @ Init stack FIQ + sub r0, r0, #FIQ_STACK_SIZE + +@- Set up Interrupt Mode and set IRQ Mode Stack + msr CPSR_c, #ARM_MODE_IRQ | I_BIT |F_BIT + mov r13, r0 @ Init stack IRQ + sub r0, r0, #IRQ_STACK_SIZE + +@- Set up Abort Mode and set Abort Mode Stack + msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT + mov r13, r0 @ Init stack Abort + sub r0, r0, #ABT_STACK_SIZE + +@- Set up Undefined Instruction Mode and set Undef Mode Stack + msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT + mov r13, r0 @ Init stack Undef + sub r0, r0, #UND_STACK_SIZE + +@- Set up Supervisor Mode and set Supervisor Mode Stack + msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT + mov r13, r0 @ Init stack Sup +@------------------------------------------------------------------------------ +@- Setup Application Operating Mode and Enable the interrupts +@------------------------------------------------------------ +@- System Mode is selected first and the stack is setup. This allows to prevent +@- any interrupt occurence while the User is not initialized. System Mode is +@- used as the interrupt enabling would be avoided from User Mode (CPSR cannot +@- be written while the core is in User Mode). +@------------------------------------------------------------------------------ + msr CPSR_c, #ARM_MODE_USER @ set User mode + ldr r13, =TOP_APPLICATION_STACK @ Init stack User + +@------------------------------------------------------------------------------ +@- Initialise C variables +@------------------------ +@- Following labels are automatically generated by the linker. +@- RO: Read-only = the code +@- RW: Read Write = the data pre-initialized and zero-initialized. +@- ZI: Zero-Initialized. +@- Pre-initialization values are located after the code area in the image. +@- Zero-initialized datas are mapped after the pre-initialized. +@- Note on the Data position : +@- If using the ARMSDT, when no -rw-base option is used for the linker, the +@- data area is mapped after the code. You can map the data either in internal +@- SRAM ( -rw-base=0x40 or 0x34) or in external SRAM ( -rw-base=0x2000000 ). +@- Note also that to improve the code density, the pre_initialized data must +@- be limited to a minimum. +@------------------------------------------------------------------------------ +@ IMPORT |Image$$RO$$Limit| @ End of ROM code (=start of ROM data) +@ IMPORT |Image$$RW$$Base| @ Base of RAM to initialise +@ IMPORT |Image$$ZI$$Base| @ Base and limit of area +@ IMPORT |Image$$ZI$$Limit| @ to zero initialise + +@ ldr r0, =|Image$$RO$$Limit| @ Get pointer to ROM data +@ ldr r1, =|Image$$RW$$Base| @ and RAM copy + ldr r3, = __bss_start__ @ Zero init base => top of initialised data +@ cmp r0, r1 @ Check that they are different +@ beq NoRW +@LoopRw: cmp r1, r3 @ Copy init data +@ ldrcc r2, [r0], #4 +@ strcc r2, [r1], #4 +@ bcc LoopRw +NoRW: ldr r1, = __bss_end__ @ Top of zero init segment + mov r2, #0 +LoopZI: cmp r3, r1 @ Zero init + strcc r2, [r3], #4 + bcc LoopZI + + + +@------------------------------------------------------------------------------ +@- Branch on C code Main function (with interworking) +@---------------------------------------------------- +@- Branch must be performed by an interworking call as either an ARM or Thumb +@- main C function must be supported. This makes the code not position- +@- independant. A Branch with link would generate errors +@------------------------------------------------------------------------------ +@ IMPORT main + + ldr r0, =main + mov lr, pc + bx r0 + +@------------------------------------------------------------------------------ +@- Loop for ever +@--------------- +@- End of application. Normally, never occur. +@- Could jump on Software Reset ( B 0x0 ). +@------------------------------------------------------------------------------ +End: + b End + + .END diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/boot/boot_flash.S b/Bachelor/Mikroprozessorsysteme2/mi2/boot/boot_flash.S new file mode 100644 index 0000000..bddc854 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/boot/boot_flash.S @@ -0,0 +1,384 @@ +@****************************************************************************** +@* boot.S fr AT91EB63 +@* Es wurde die +@* AT91 Assembler Code Startup Sequence for C Code Applications Software +@* als Vorlage genutzt. +@* von: Manfred Pester +@* vom: 17.12.2003 +@------------------------------------------------------------------------------ + +#include "../h/aic.inc" +#include "../h/ebi.inc" + +@------------------------------------------------------------------------------ +@- Area Definition +@----------------- +@- Must be defined as function to put first in the code as it must be mapped +@- at SRAM. +@------------------------------------------------------------------------------ + +.section .text +.code 32 + +.global _start +@****************************************************************************** +@* Einsprungpunkt wird wohl auch die Adresse 0 RESET sein +@****************************************************************************** +_start: + +Reset: B InitReset @ reset +undefvec: B undefvec @ Undefined Instruction +swivec: B swivec @ Software Interrupt +pabtvec: B pabtvec @ Prefetch Abort +dabtvec: B dabtvec @ Data Abort +rsvdvec: B rsvdvec @ reserved +irqvec: B irqvec @ reserved +fiqvec: B fiqvec @ reserved + + +InitTableEBI: + .word EBI_CSR_0 + .word EBI_CSR_1 + .word EBI_CSR_2 + .word EBI_CSR_3 + .word EBI_CSR_4 + .word EBI_CSR_5 + .word EBI_CSR_6 + .word EBI_CSR_7 + .word 0x00000001 @ REMAP command + .word 0x00000006 @ 6 memory regions, standard read +PtEBIBase: + .word EBI_BASE @ EBI Base Address + + + +@------------------------------------------------------------------------------ +@- The reset handler before Remap +@-------------------------------- +@- From here, the code is executed from SRAM address +@------------------------------------------------------------------------------ +InitReset: + +@------------------------------------------------------------------------------ +@- Speed up the Boot sequence +@---------------------------- +@- After reset, the number os wait states on chip select 0 is 8. All AT91 +@- Evaluation Boards fits fast flash memories, so that the number of wait +@- states can be optimized to fast up the boot sequence. +@- ICE note :For ICE debug no need to set the EBI value these values already set +@- by the boot function. +@------------------------------------------------------------------------------ +@- Load System EBI Base address and CSR0 Init Value + ldr r0, PtEBIBase + ldr r1, [pc,#-(8+.-InitTableEBI)] @ values (relative) + +@- Speed up code execution by disabling wait state on Chip Select 0 + str r1, [r0] + +@------------------------------------------------------------------------------ +@- low level init +@---------------- +@ Call __low_level_init to perform initialization before initializing +@ AIC and calling main. +@---------------------------------------------------------------------- + +@ bl __low_level_init + + +@------------------------------------------------------------------------------ +@- Reset the Interrupt Controller +@-------------------------------- +@- Normally, the code is executed only if a reset has been actually performed. +@- So, the AIC initialization resumes at setting up the default vectors. +@------------------------------------------------------------------------------ +@- Load the AIC Base Address and the default handler addresses + + add r0, pc,#-(8+.-AicData) @ @ where to read values (relative) + ldmia r0, {r1-r4} + +@- Setup the Spurious Vector + str r4, [r1, #AIC_SPU] @ r4 = spurious handler + + +@- Set up the default interrupt handler vectors + str r2, [r1, #AIC_SVR] @ SVR[0] for FIQ + add r1, r1, #AIC_SVR + mov r0, #31 @ counter +LoopAic1: + str r3, [r1, r0, LSL #2] @ SVRs for IRQs + subs r0, r0, #1 @ do not save FIQ + bhi LoopAic1 + + b EndInitAic + +@- Default Interrupt Handlers +AicData: + .word AIC_BASE @ AIC Base Address +@------------------------------------------------------------------------------ +@- Default Interrupt Handler +@--------------------------- +@- These function are defined in the AT91 library. If you want to change this +@- you can redifine these function in your appication code +@------------------------------------------------------------------------------ + +PtDefaultHandler: + .word at91_default_fiq_handler + .word at91_default_irq_handler + .word at91_spurious_handler + +at91_default_fiq_handler: B at91_default_fiq_handler +at91_default_irq_handler: B at91_default_irq_handler +at91_spurious_handler: B at91_spurious_handler + +EndInitAic: + + +@****************************************************************************** +@* Setup Exception Vectors in internal RAM before Remap +@****************************************************************************** + b SetupRamVectors + +VectorTable: + ldr pc, [pc, #0x18] @ SoftReset + ldr pc, [pc, #0x18] @ UndefHandler + ldr pc, [pc, #0x18] @ SWIHandler + ldr pc, [pc, #0x18] @ PrefetchAbortHandler + ldr pc, [pc, #0x18] @ DataAbortHandler + nop @ Reserved + ldr pc, [pc,#-0xF20] @ IRQ : read the AIC + ldr pc, [pc,#-0xF20] @ FIQ : read the AIC + +@* There are only 5 offsets as the vectoring is used. + .word _SoftReset + .word _UndefHandler +_SWIadress: + .word SWIHandler + .word _PrefetchAbortHandler + .word _DataAbortHandler + +@* Vectoring Execution function run at absolut addresss +_SoftReset: b _SoftReset +_UndefHandler: b _UndefHandler +_SWIHandler: b _SWIHandler +_PrefetchAbortHandler: b _PrefetchAbortHandler +_DataAbortHandler: b _DataAbortHandler + +@------------------------------------------------------------------------------ +@- Setup Exception Vectors in Internal RAM before Remap +@------------------------------------------------------ +@- That's important to perform this operation before Remap in order to guarantee +@- that the core has valid vectors at any time during the remap operation. +@- Note: There are only 5 offsets as the vectoring is used. +@- ICE note : In this code only the start address value is changed if you use +@- without Semihosting. +@- Before Remap the internal RAM it's 0x300000 +@- After Remap the internal RAM it's 0x000000 +@- Remap it's already executed it's no possible to write to 0x300000. +@------------------------------------------------------------------------------ +@- Copy the ARM exception vectors + +RAM_BASE: + .word 0x300000 +SetupRamVectors: +@ mov r8, #RAM_BASE @ @ of the hard vector after remap in internal RAM 0x0 + ldr r8, [pc,#-(8+.-RAM_BASE)] @ values (relative) + + add r9, pc,#-(8+.-VectorTable) @ @ where to read values (relative) + ldmia r9!, {r0-r7} @ read 8 vectors + stmia r8!, {r0-r7} @ store them + + ldmia r9!, {r0-r4} @ read 5 absolute handler addresses + stmia r8!, {r0-r4} @ store them + +@* The RAM_BASE = 0x300000 it's specific for Boot from Flash + + RAM_BASE = 0x300000 + +@------------------------------------------------------------------------------ +@- Initialise the Memory Controller +@---------------------------------- +@- That's principaly the Remap Command. Actually, all the External Bus +@- Interface is configured with some instructions and the User Interface Image +@- as described above. The jump "mov pc, r12" could be unread as it is after +@- located after the Remap but actually it is thanks to the Arm core pipeline. +@- The IniTableEBI addressing must be relative . +@- The PtInitRemap must be absolute as the processor jumps at this address +@- immediatly after the Remap is performed. +@- Note also that the EBI base address is loaded in r11 by the "ldmia". +@- ICE note :For ICE debug these values already set by the boot function and the +@- Remap it's already executed it's no need to set still. +@------------------------------------------------------------------------------ +@- Copy the Image of the Memory Controller + sub r10, pc,#(8+.-InitTableEBI) @ get the address of the chip select register image + ldr r12, PtInitRemap @ get the real jump address ( after remap ) + +@- Copy Chip Select Register Image to Memory Controller and command remap + ldmia r10!, {r0-r9,r11} @ load the complete image and the EBI base + stmia r11!, {r0-r9} @ store the complete image with the remap command + +@- Jump to ROM at its new address + mov pc, r12 @ jump and break the pipeline + +PtInitRemap: + .word InitRemap @ address where to jump after REMAP + +@------------------------------------------------------------------------------ +@- The Reset Handler after Remap +@------------------------------- +@- From here, the code is continous execute from its link address. +@------------------------------------------------------------------------------ + +InitRemap: + +@-------------------------------- +@- ARM Core Mode and Status Bits +@-------------------------------- + +ARM_MODE_USER = 0x10 +ARM_MODE_FIQ = 0x11 +ARM_MODE_IRQ = 0x12 +ARM_MODE_SVC = 0x13 +ARM_MODE_ABORT = 0x17 +ARM_MODE_UNDEF = 0x1B +ARM_MODE_SYS = 0x1F + +I_BIT = 0x80 +F_BIT = 0x40 +T_BIT = 0x20 + +@------------------------------------------------------------------------------ +@- Stack Sizes Definition +@------------------------ +@- Interrupt Stack requires 3 words x 8 priority level x 4 bytes when using +@- the vectoring. This assume that the IRQ_ENTRY/IRQ_EXIT macro are used. +@- The Interrupt Stack must be adjusted depending on the interrupt handlers. +@- Fast Interrupt is the same than Interrupt without priority level. +@- Other stacks are defined by default to save one word each. +@- The System stack size is not defined and is limited by the free internal +@- SRAM. +@- User stack size is not defined and is limited by the free external SRAM. +@------------------------------------------------------------------------------ + +IRQ_STACK_SIZE = (3*8*4) @ 3 words per interrupt priority level +FIQ_STACK_SIZE = (3*4) @ 3 words +ABT_STACK_SIZE = (1*4) @ 1 word +UND_STACK_SIZE = (1*4) @ 1 word + +@------------------------------------------------------------------------------ +@- Top of Stack Definition +@------------------------- +@- Fast Interrupt, Interrupt, Abort, Undefined and Supervisor Stack are located +@- at the top of internal memory in order to speed the exception handling +@- context saving and restoring. +@- User (Application, C) Stack is located at the top of the external memory. +@------------------------------------------------------------------------------ +RAM_BASE = 0 +RAM_SIZE = (2*1024) +RAM_LIMIT = (RAM_BASE+RAM_SIZE) +EXT_SRAM_BASE = 0x02000000 +EXT_SRAM_SIZE = 0x00040000 @ 256Kbytes +EXT_SRAM_LIMIT = (EXT_SRAM_BASE+EXT_SRAM_SIZE) + +TOP_EXCEPTION_STACK = RAM_LIMIT @ Defined in part +TOP_APPLICATION_STACK = EXT_SRAM_LIMIT @ Defined in Target + +@------------------------------------------------------------------------------ +@- Setup the stack for each mode +@------------------------------- + ldr r0, =TOP_EXCEPTION_STACK + +@- Set up Fast Interrupt Mode and set FIQ Mode Stack + msr CPSR_c, #ARM_MODE_FIQ | I_BIT |F_BIT + mov r13, r0 @ Init stack FIQ + sub r0, r0, #FIQ_STACK_SIZE + +@- Set up Interrupt Mode and set IRQ Mode Stack + msr CPSR_c, #ARM_MODE_IRQ | I_BIT |F_BIT + mov r13, r0 @ Init stack IRQ + sub r0, r0, #IRQ_STACK_SIZE + +@- Set up Abort Mode and set Abort Mode Stack + msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT + mov r13, r0 @ Init stack Abort + sub r0, r0, #ABT_STACK_SIZE + +@- Set up Undefined Instruction Mode and set Undef Mode Stack + msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT + mov r13, r0 @ Init stack Undef + sub r0, r0, #UND_STACK_SIZE + +@- Set up Supervisor Mode and set Supervisor Mode Stack + msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT + mov r13, r0 @ Init stack Sup +@------------------------------------------------------------------------------ +@- Setup Application Operating Mode and Enable the interrupts +@------------------------------------------------------------ +@- System Mode is selected first and the stack is setup. This allows to prevent +@- any interrupt occurence while the User is not initialized. System Mode is +@- used as the interrupt enabling would be avoided from User Mode (CPSR cannot +@- be written while the core is in User Mode). +@------------------------------------------------------------------------------ + msr CPSR_c, #ARM_MODE_USER @ set User mode + ldr r13, =TOP_APPLICATION_STACK @ Init stack User + +@------------------------------------------------------------------------------ +@- Initialise C variables +@------------------------ +@- Following labels are automatically generated by the linker. +@- RO: Read-only = the code +@- RW: Read Write = the data pre-initialized and zero-initialized. +@- ZI: Zero-Initialized. +@- Pre-initialization values are located after the code area in the image. +@- Zero-initialized datas are mapped after the pre-initialized. +@- Note on the Data position : +@- If using the ARMSDT, when no -rw-base option is used for the linker, the +@- data area is mapped after the code. You can map the data either in internal +@- SRAM ( -rw-base=0x40 or 0x34) or in external SRAM ( -rw-base=0x2000000 ). +@- Note also that to improve the code density, the pre_initialized data must +@- be limited to a minimum. +@------------------------------------------------------------------------------ +@ IMPORT |Image$$RO$$Limit| @ End of ROM code (=start of ROM data) +@ IMPORT |Image$$RW$$Base| @ Base of RAM to initialise +@ IMPORT |Image$$ZI$$Base| @ Base and limit of area +@ IMPORT |Image$$ZI$$Limit| @ to zero initialise + +@ ldr r0, =|Image$$RO$$Limit| @ Get pointer to ROM data +@ ldr r1, =|Image$$RW$$Base| @ and RAM copy + ldr r3, = __bss_start__ @ Zero init base => top of initialised data +@ cmp r0, r1 @ Check that they are different +@ beq NoRW +@LoopRw: cmp r1, r3 @ Copy init data +@ ldrcc r2, [r0], #4 +@ strcc r2, [r1], #4 +@ bcc LoopRw +NoRW: ldr r1, = __bss_end__ @ Top of zero init segment + mov r2, #0 +LoopZI: cmp r3, r1 @ Zero init + strcc r2, [r3], #4 + bcc LoopZI + + + +@------------------------------------------------------------------------------ +@- Branch on C code Main function (with interworking) +@---------------------------------------------------- +@- Branch must be performed by an interworking call as either an ARM or Thumb +@- main C function must be supported. This makes the code not position- +@- independant. A Branch with link would generate errors +@------------------------------------------------------------------------------ +@ IMPORT main + + ldr r0, =main + mov lr, pc + bx r0 + +@------------------------------------------------------------------------------ +@- Loop for ever +@--------------- +@- End of application. Normally, never occur. +@- Could jump on Software Reset ( B 0x0 ). +@------------------------------------------------------------------------------ +End: + b End + + .END diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/boot/boot_ice.S b/Bachelor/Mikroprozessorsysteme2/mi2/boot/boot_ice.S new file mode 100644 index 0000000..2703ace --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/boot/boot_ice.S @@ -0,0 +1,457 @@ +@------------------------------------------------------------------------------ +@- ATMEL Microcontroller Software Support - ROUSSET - +@------------------------------------------------------------------------------ +@ The software is delivered "AS IS" without warranty or condition of any +@ kind, either express, implied or statutory. This includes without +@ limitation any warranty or condition with respect to merchantability or +@ fitness for any particular purpose, or against the infringements of +@ intellectual property rights of others. +@----------------------------------------------------------------------------- +@- File source : cstartup_ice.sboot.S +@- Object : Boot for simulate Final Application version to be +@- loaded in SRAM. Only change as the internal RAM address +@- and support the Semihosting +@- Compilation flag : SEMIHOSTING => use the semihosting facilities +@- +@- 1.0 17/09/02 GR : Creation +@------------------------------------------------------------------------------ + +#include "aic.inc" +#include "ebi.inc" + +@------------------------------------------------------------------------------ +@- Area Definition +@----------------- +@- Must be defined as function to put first in the code as it must be mapped +@- at SRAM. +@------------------------------------------------------------------------------ + + .text + +@------------------------------------------------------------------------------ +@- Semihosting support +@-------------------------------- +@- The C runtime library is the IO functions provided by the semihosting. +@- They are generally costly in code and can be used as the debugger mode (ICE) +@------------------------------------------------------------------------------ +@- Define "__main" to ensure that C runtime system is not linked + + .global _start +@------------------------------------------------------------------------------ +@- Define the entry point +@------------------------ +@- Note on the link address and the Remap command. +@- In order to guarantee that the non position-independant code (the ARM linker +@- armlink doesn't generate position-independant code) can work on the ARM, +@- it must be linked at address at which it expects to run. +@- In this startup example, we use RAM as base address. +@------------------------------------------------------------------------------ +_start: + +@------------------------------------------------------------------------------ +@- Exception vectors +@-------------------- +@- In the ICE function your board as run the boot code and initialize the remap +@- feature. but these code it's location independant and can be emulate the csartup_fash +@- fonctionnality. +@- These vectors are read at RAM address. in Flash mode these vectors are at 0 +@- They absolutely requires to be in relative addresssing mode in order to +@- guarantee a valid jump. For the moment, all are just looping (what may be +@- dangerous in a final system). If an exception occurs before remap, this +@- would result in an infinite loop. +@------------------------------------------------------------------------------ + +Reset: B InitReset @ reset +undefvec: B undefvec @ Undefined Instruction +swivec: B swivec @ Software Interrupt +pabtvec: B pabtvec @ Prefetch Abort +dabtvec: B dabtvec @ Data Abort +rsvdvec: B rsvdvec @ reserved +irqvec: B irqvec @ reserved +fiqvec: B fiqvec @ reserved + +@------------------------------------------------------------------------------ +@- Exception vectors ( after cstartup execution ) +@------------------------------------ +@- These vectors are read at RAM address after the remap command is performed in +@- the EBI. As they will be relocated at address 0x0 to be effective, a +@- relative addressing is forbidden. The only possibility to get an absolute +@- addressing for an ARM vector is to read a PC relative value at a defined +@- offset. It is easy to reserve the locations 0x20 to 0x3C (the 8 next +@- vectors) for storing the absolute exception handler address. +@- The AIC vectoring access vectors are saved in the interrupt and fast +@- interrupt ARM vectors. So, only 5 offsets are required ( reserved vector +@- offset is never used). +@- The provisory handler addresses are defined on infinite loop and can be +@- modified at any time. +@- Note also that the reset is only accessible by a jump from the application +@- to 0. It is an actual software reset. +@- As the 13 first location are used by the vectors, the read/write link +@- address must be defined from 0x34 if internal data mapping is required. +@- (use for that the option -rw- base=0x34 +@------------------------------------------------------------------------------ + +VectorTable: + ldr pc, [pc, #0x18] @ SoftReset + ldr pc, [pc, #0x18] @ UndefHandler + ldr pc, [pc, #0x18] @ SWIHandler + ldr pc, [pc, #0x18] @ PrefetchAbortHandler + ldr pc, [pc, #0x18] @ DataAbortHandler + nop @ Reserved + ldr pc, [pc,#-0xF20] @ IRQ : read the AIC + ldr pc, [pc,#-0xF20] @ FIQ : read the AIC + +@- There are only 5 offsets as the vectoring is used. + .word _SoftReset + .word _UndefHandler +_SWIadress: + .word SWIHandler + .word _PrefetchAbortHandler + .word _DataAbortHandler + +@- Vectoring Execution function run at absolut addresss +_SoftReset: b _SoftReset +_UndefHandler: b _UndefHandler +_SWIHandler: b _SWIHandler +_PrefetchAbortHandler: b _PrefetchAbortHandler +_DataAbortHandler: b _DataAbortHandler + + + +InitTableEBI: + .word EBI_CSR_0 + .word EBI_CSR_1 + .word EBI_CSR_2 + .word EBI_CSR_3 + .word EBI_CSR_4 + .word EBI_CSR_5 + .word EBI_CSR_6 + .word EBI_CSR_7 + .word 0x00000001 @ REMAP command + .word 0x00000006 @ 6 memory regions, standard read +PtEBIBase: + .word EBI_BASE @ EBI Base Address + +@------------------------------------------------------------------------------ +@- The reset handler before Remap +@-------------------------------- +@- From here, the code is executed from SRAM address +@------------------------------------------------------------------------------ +InitReset: + +@------------------------------------------------------------------------------ +@- Speed up the Boot sequence +@---------------------------- +@- After reset, the number os wait states on chip select 0 is 8. All AT91 +@- Evaluation Boards fits fast flash memories, so that the number of wait +@- states can be optimized to fast up the boot sequence. +@- ICE note :For ICE debug no need to set the EBI value these values already set +@- by the boot function. +@------------------------------------------------------------------------------ +@- Load System EBI Base address and CSR0 Init Value + ldr r0, PtEBIBase + ldr r1, [pc,#-(8+.-InitTableEBI)] @ values (relative) + +@- Speed up code execution by disabling wait state on Chip Select 0 + str r1, [r0] + +@------------------------------------------------------------------------------ +@- low level init +@---------------- +@ Call __low_level_init to perform initialization before initializing +@ AIC and calling main. +@---------------------------------------------------------------------- + +@ bl __low_level_init + + +@------------------------------------------------------------------------------ +@- Reset the Interrupt Controller +@-------------------------------- +@- Normally, the code is executed only if a reset has been actually performed. +@- So, the AIC initialization resumes at setting up the default vectors. +@------------------------------------------------------------------------------ +@- Load the AIC Base Address and the default handler addresses + + add r0, pc,#-(8+.-AicData) @ @ where to read values (relative) + + ldmia r0, {r1-r4} + +@- Setup the Spurious Vector + str r4, [r1, #AIC_SPU] @ r4 = spurious handler + + +@- ICE note : For ICE debug +@- Perform 8 End Of Interrupt Command to make sure AIC will not lock out nIRQ + mov r0, #8 +LoopAic0: + str r1, [r1, #AIC_EOICR] @ any value written + subs r0, r0, #1 + bhi LoopAic0 + +@- Reset Interrupts + mov r0, #0 + sub r0, r0, #1 @ all bits set + str r0, [r1, #AIC_IDCR] + str r0, [r1, #AIC_ICCR] + +@- Set up the default interrupt handler vectors + str r2, [r1, #AIC_SVR] @ SVR[0] for FIQ + add r1, r1, #AIC_SVR + mov r0, #31 @ counter +LoopAic1: + str r3, [r1, r0, LSL #2] @ SVRs for IRQs + subs r0, r0, #1 @ do not save FIQ + bhi LoopAic1 + + b EndInitAic + +@- Default Interrupt Handlers +AicData: + .word AIC_BASE @ AIC Base Address +@------------------------------------------------------------------------------ +@- Default Interrupt Handler +@--------------------------- +@- These function are defined in the AT91 library. If you want to change this +@- you can redifine these function in your appication code +@------------------------------------------------------------------------------ + +@ IMPORT at91_default_fiq_handler +@ IMPORT at91_default_irq_handler +@ IMPORT at91_spurious_handler +PtDefaultHandler: + .word at91_default_fiq_handler + .word at91_default_irq_handler + .word at91_spurious_handler + +at91_default_fiq_handler: B at91_default_fiq_handler +at91_default_irq_handler: B at91_default_irq_handler +at91_spurious_handler: B at91_spurious_handler + +EndInitAic: + +@------------------------------------------------------------------------------ +@- Setup Exception Vectors in Internal RAM before Remap +@------------------------------------------------------ +@- That's important to perform this operation before Remap in order to guarantee +@- that the core has valid vectors at any time during the remap operation. +@- Note: There are only 5 offsets as the vectoring is used. +@- ICE note : In this code only the start address value is changed if you use +@- without Semihosting. +@- Before Remap the internal RAM it's 0x300000 +@- After Remap the internal RAM it's 0x000000 +@- Remap it's already executed it's no possible to write to 0x300000. +@------------------------------------------------------------------------------ +@- Copy the ARM exception vectors + + + mov r0, #0x28 + add r1, pc,#-(8+.-Init_Vector) + str r1,[r0] + mov r0, #0x08 + add r1, pc,#-(8+.-VectorTable-8) + ldr r1,[r1] + str r1,[r0] + swi 0 +@ The RAM_BASE = 0 it's specific for ICE + + RAM_BASE = 0 +Init_Vector: + mov r8, #RAM_BASE @ @ of the hard vector after remap in internal RAM 0x0 + + add r9, pc,#-(8+.-VectorTable) @ @ where to read values (relative) + ldmia r9!, {r0-r7} @ read 8 vectors + + stmia r8!, {r0-r7} @ store them + + ldmia r9!, {r0-r4} @ read 5 absolute handler addresses + stmia r8!, {r0-r4} @ store them + +@------------------------------------------------------------------------------ +@- Initialise the Memory Controller +@---------------------------------- +@- That's principaly the Remap Command. Actually, all the External Bus +@- Interface is configured with some instructions and the User Interface Image +@- as described above. The jump "mov pc, r12" could be unread as it is after +@- located after the Remap but actually it is thanks to the Arm core pipeline. +@- The IniTableEBI addressing must be relative . +@- The PtInitRemap must be absolute as the processor jumps at this address +@- immediatly after the Remap is performed. +@- Note also that the EBI base address is loaded in r11 by the "ldmia". +@- ICE note :For ICE debug these values already set by the boot function and the +@- Remap it's already executed it's no need to set still. +@------------------------------------------------------------------------------ +@- Copy the Image of the Memory Controller + sub r10, pc,#(8+.-InitTableEBI) @ get the address of the chip select register image + ldr r12, PtInitRemap @ get the real jump address ( after remap ) + +@- Copy Chip Select Register Image to Memory Controller and command remap + ldmia r10!, {r0-r9,r11} @ load the complete image and the EBI base + stmia r11!, {r0-r9} @ store the complete image with the remap command + +@- Jump to ROM at its new address + mov pc, r12 @ jump and break the pipeline + +PtInitRemap: + .word InitRemap @ address where to jump after REMAP + +@------------------------------------------------------------------------------ +@- The Reset Handler after Remap +@------------------------------- +@- From here, the code is continous execute from its link address. +@------------------------------------------------------------------------------ + +InitRemap: + +@-------------------------------- +@- ARM Core Mode and Status Bits +@-------------------------------- + +ARM_MODE_USER = 0x10 +ARM_MODE_FIQ = 0x11 +ARM_MODE_IRQ = 0x12 +ARM_MODE_SVC = 0x13 +ARM_MODE_ABORT = 0x17 +ARM_MODE_UNDEF = 0x1B +ARM_MODE_SYS = 0x1F + +I_BIT = 0x80 +F_BIT = 0x40 +T_BIT = 0x20 + +@------------------------------------------------------------------------------ +@- Stack Sizes Definition +@------------------------ +@- Interrupt Stack requires 3 words x 8 priority level x 4 bytes when using +@- the vectoring. This assume that the IRQ_ENTRY/IRQ_EXIT macro are used. +@- The Interrupt Stack must be adjusted depending on the interrupt handlers. +@- Fast Interrupt is the same than Interrupt without priority level. +@- Other stacks are defined by default to save one word each. +@- The System stack size is not defined and is limited by the free internal +@- SRAM. +@- User stack size is not defined and is limited by the free external SRAM. +@------------------------------------------------------------------------------ + +IRQ_STACK_SIZE = (3*8*4) @ 3 words per interrupt priority level +FIQ_STACK_SIZE = (3*4) @ 3 words +ABT_STACK_SIZE = (1*4) @ 1 word +UND_STACK_SIZE = (1*4) @ 1 word + +@------------------------------------------------------------------------------ +@- Top of Stack Definition +@------------------------- +@- Fast Interrupt, Interrupt, Abort, Undefined and Supervisor Stack are located +@- at the top of internal memory in order to speed the exception handling +@- context saving and restoring. +@- User (Application, C) Stack is located at the top of the external memory. +@------------------------------------------------------------------------------ +RAM_BASE = 0 +RAM_SIZE = (2*1024) +RAM_LIMIT = (RAM_BASE+RAM_SIZE) +EXT_SRAM_BASE = 0x02000000 +EXT_SRAM_SIZE = 0x00040000 @ 256Kbytes +EXT_SRAM_LIMIT = (EXT_SRAM_BASE+EXT_SRAM_SIZE) + +TOP_EXCEPTION_STACK = RAM_LIMIT @ Defined in part +TOP_APPLICATION_STACK = EXT_SRAM_LIMIT @ Defined in Target + +@------------------------------------------------------------------------------ +@- Setup the stack for each mode +@------------------------------- + ldr r0, =TOP_EXCEPTION_STACK + +@- Set up Fast Interrupt Mode and set FIQ Mode Stack + msr CPSR_c, #ARM_MODE_FIQ | I_BIT |F_BIT + mov r13, r0 @ Init stack FIQ + sub r0, r0, #FIQ_STACK_SIZE + +@- Set up Interrupt Mode and set IRQ Mode Stack + msr CPSR_c, #ARM_MODE_IRQ | I_BIT |F_BIT + mov r13, r0 @ Init stack IRQ + sub r0, r0, #IRQ_STACK_SIZE + +@- Set up Abort Mode and set Abort Mode Stack + msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT + mov r13, r0 @ Init stack Abort + sub r0, r0, #ABT_STACK_SIZE + +@- Set up Undefined Instruction Mode and set Undef Mode Stack + msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT + mov r13, r0 @ Init stack Undef + sub r0, r0, #UND_STACK_SIZE + +@- Set up Supervisor Mode and set Supervisor Mode Stack + msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT + mov r13, r0 @ Init stack Sup +@------------------------------------------------------------------------------ +@- Setup Application Operating Mode and Enable the interrupts +@------------------------------------------------------------ +@- System Mode is selected first and the stack is setup. This allows to prevent +@- any interrupt occurence while the User is not initialized. System Mode is +@- used as the interrupt enabling would be avoided from User Mode (CPSR cannot +@- be written while the core is in User Mode). +@------------------------------------------------------------------------------ + msr CPSR_c, #ARM_MODE_USER @ set User mode + ldr r13, =TOP_APPLICATION_STACK @ Init stack User + +@------------------------------------------------------------------------------ +@- Initialise C variables +@------------------------ +@- Following labels are automatically generated by the linker. +@- RO: Read-only = the code +@- RW: Read Write = the data pre-initialized and zero-initialized. +@- ZI: Zero-Initialized. +@- Pre-initialization values are located after the code area in the image. +@- Zero-initialized datas are mapped after the pre-initialized. +@- Note on the Data position : +@- If using the ARMSDT, when no -rw-base option is used for the linker, the +@- data area is mapped after the code. You can map the data either in internal +@- SRAM ( -rw-base=0x40 or 0x34) or in external SRAM ( -rw-base=0x2000000 ). +@- Note also that to improve the code density, the pre_initialized data must +@- be limited to a minimum. +@------------------------------------------------------------------------------ +@ IMPORT |Image$$RO$$Limit| @ End of ROM code (=start of ROM data) +@ IMPORT |Image$$RW$$Base| @ Base of RAM to initialise +@ IMPORT |Image$$ZI$$Base| @ Base and limit of area +@ IMPORT |Image$$ZI$$Limit| @ to zero initialise + +@ ldr r0, =|Image$$RO$$Limit| @ Get pointer to ROM data +@ ldr r1, =|Image$$RW$$Base| @ and RAM copy + ldr r3, = __bss_start__ @ Zero init base => top of initialised data +@ cmp r0, r1 @ Check that they are different +@ beq NoRW +@LoopRw: cmp r1, r3 @ Copy init data +@ ldrcc r2, [r0], #4 +@ strcc r2, [r1], #4 +@ bcc LoopRw +NoRW: ldr r1, = __bss_end__ @ Top of zero init segment + mov r2, #0 +LoopZI: cmp r3, r1 @ Zero init + strcc r2, [r3], #4 + bcc LoopZI + + + +@------------------------------------------------------------------------------ +@- Branch on C code Main function (with interworking) +@---------------------------------------------------- +@- Branch must be performed by an interworking call as either an ARM or Thumb +@- main C function must be supported. This makes the code not position- +@- independant. A Branch with link would generate errors +@------------------------------------------------------------------------------ +@ IMPORT main + + ldr r0, =main + mov lr, pc + bx r0 + +@------------------------------------------------------------------------------ +@- Loop for ever +@--------------- +@- End of application. Normally, never occur. +@- Could jump on Software Reset ( B 0x0 ). +@------------------------------------------------------------------------------ +End: + b End + + .END diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/boot/c_startup.s b/Bachelor/Mikroprozessorsysteme2/mi2/boot/c_startup.s new file mode 100644 index 0000000..2e2d3ec --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/boot/c_startup.s @@ -0,0 +1,514 @@ +@------------------------------------------------------------------------------
+@- ATMEL Microcontroller Software Support - ROUSSET -
+@------------------------------------------------------------------------------
+@ The software is delivered "AS IS" without warranty or condition of any
+@ kind, either express, implied or statutory. This includes without
+@ limitation any warranty or condition with respect to merchantability or
+@ fitness for any particular purpose, or against the infringements of
+@ intellectual property rights of others.
+@-----------------------------------------------------------------------------
+@- File source : cstartup_ice.s
+@- Object : Boot for simulate Final Application version to be
+@- loaded in SRAM. Only change as the internal RAM address
+@- and support the Semihosting
+@- Compilation flag : SEMIHOSTING => use the semihosting facilities
+@-
+@- 1.0 06/04/00 JPP : Creation
+@- 1.1 18/08/00 JCZ : Over-comment and optimize
+@- 1.2 25/10/00 JPP : Global for including
+@------------------------------------------------------------------------------
+
+@------------------------------------------------------------------------------
+@- Area Definition
+@-----------------
+@- Must be defined as function to put first in the code as it must be mapped
+@- at SRAM.
+@------------------------------------------------------------------------------
+@ .section reset, CODE, READONLY, INTERWORK
+
+@------------------------------------------------------------------------------
+@- Semihosting support
+@--------------------------------
+@- The C runtime library is the IO functions provided by the semihosting.
+@- They are generally costly in code and can be used as the debugger mode (ICE)
+@------------------------------------------------------------------------------
+@- Define "__main" to ensure that C runtime system is not linked
+@ EXPORT __main
+.global __gccmain
+.global _start
+@------------------------------------------------------------------------------
+@- Define the entry point
+@------------------------
+@- Note on the link address and the Remap command.
+@- In order to guarantee that the non position-independant code (the ARM linker
+@- armlink doesn't generate position-independant code) can work on the ARM,
+@- it must be linked at address at which it expects to run.
+@- In this startup example, we use RAM as base address.
+@------------------------------------------------------------------------------
+_start:
+
+@------------------------------------------------------------------------------
+@- Exception vectors
+@--------------------
+@- In the ICE function your board as run the boot code and initialize the remap
+@- feature. but these code it's location independant and can be emulate the csartup_fash
+@- fonctionnality.
+@- These vectors are read at RAM address. in Flash mode these vectors are at 0
+@- They absolutely requires to be in relative addresssing mode in order to
+@- guarantee a valid jump. For the moment, all are just looping (what may be
+@- dangerous in a final system). If an exception occurs before remap, this
+@- would result in an infinite loop.
+@------------------------------------------------------------------------------
+Reset: B InitReset @ reset
+undefvec: B undefvec @ Undefined Instruction
+swivec: B swivec @ Software Interrupt
+pabtvec: B pabtvec @ Prefetch Abort
+dabtvec: B dabtvec @ Data Abort
+rsvdvec: B rsvdvec @ reserved
+irqvec: B irqvec @ reserved
+fiqvec: B fiqvec @ reserved
+
+@------------------------------------------------------------------------------
+@- Exception vectors ( after cstartup execution )
+@------------------------------------
+@- These vectors are read at RAM address after the remap command is performed in
+@- the EBI. As they will be relocated at address 0x0 to be effective, a
+@- relative addressing is forbidden. The only possibility to get an absolute
+@- addressing for an ARM vector is to read a PC relative value at a defined
+@- offset. It is easy to reserve the locations 0x20 to 0x3C (the 8 next
+@- vectors) for storing the absolute exception handler address.
+@- The AIC vectoring access vectors are saved in the interrupt and fast
+@- interrupt ARM vectors. So, only 5 offsets are required ( reserved vector
+@- offset is never used).
+@- The provisory handler addresses are defined on infinite loop and can be
+@- modified at any time.
+@- Note also that the reset is only accessible by a jump from the application
+@- to 0. It is an actual software reset.
+@- As the 13 first location are used by the vectors, the read/write link
+@- address must be defined from 0x34 if internal data mapping is required.
+@- (use for that the option -rw- base=0x34
+@------------------------------------------------------------------------------
+VectorTable:
+ ldr pc, [pc, #0x18] @ SoftReset
+ ldr pc, [pc, #0x18] @ UndefHandler
+ ldr pc, [pc, #0x18] @ SWIHandler
+ ldr pc, [pc, #0x18] @ PrefetchAbortHandler
+ ldr pc, [pc, #0x18] @ DataAbortHandler
+ nop @ Reserved
+ ldr pc, [pc,#-0xF20] @ IRQ : read the AIC
+ ldr pc, [pc,#-0xF20] @ FIQ : read the AIC
+
+@- There are only 5 offsets as the vectoring is used.
+ .word SoftReset
+ .word UndefHandler
+ .word SWIHandler
+ .word PrefetchAbortHandler
+ .word DataAbortHandler
+
+@- Vectoring Execution function run at absolut addresss
+SoftReset: b SoftReset
+UndefHandler: b UndefHandler
+SWIHandler: b SWIHandler
+PrefetchAbortHandler: b PrefetchAbortHandler
+DataAbortHandler: b DataAbortHandler
+
+@------------------------------------------------------------------------------
+@- EBI Initialization Data
+@-------------------------
+@- The EBI values depend to target choice , Clock, and memories access time.
+@- Yous must be define these values in include file
+@- The EBI User Interface Image which is copied by the boot.
+@- The EBI_CSR_x are defined in the target and hardware depend.
+@- That's hardware! Details in the Electrical Datasheet of the AT91 device.
+@- EBI Base Address is added at the end for commodity in copy code.
+@- ICE note :For ICE debug no need to set the EBI value these values already set
+@- by the boot function.
+@------------------------------------------------------------------------------
+FLASH_BASE = 0x1000000
+EXT_SRAM_BASE = 0x2000000
+EBI_BASE = 0xFFE00000 @- External Bus Interface
+
+EBI_CSR_0 = (FLASH_BASE | 0x2529) @ 0x01000000, 16MB, 2 tdf, 16 bits, 2 WS
+EBI_CSR_1 = (EXT_SRAM_BASE | 0x2121) @ 0x02000000, 16MB, 0 hold, 16 bits, 1 WS
+EBI_CSR_2 = 0x20000000 @ unused
+EBI_CSR_3 = 0x30000000 @ unused
+EBI_CSR_4 = 0x40000000 @ unused
+EBI_CSR_5 = 0x50000000 @ unused
+EBI_CSR_6 = 0x60000000 @ unused
+EBI_CSR_7 = 0x70000000 @ unused
+
+InitTableEBI:
+ .word EBI_CSR_0
+ .word EBI_CSR_1
+ .word EBI_CSR_2
+ .word EBI_CSR_3
+ .word EBI_CSR_4
+ .word EBI_CSR_5
+ .word EBI_CSR_6
+ .word EBI_CSR_7
+ .word 0x00000001 @ REMAP command
+ .word 0x00000006 @ 6 memory regions, standard read
+PtEBIBase:
+ .word EBI_BASE @ EBI Base Address
+
+@------------------------------------------------------------------------------
+@- The reset handler before Remap
+@--------------------------------
+@- From here, the code is executed from SRAM address
+@------------------------------------------------------------------------------
+InitReset:
+
+@------------------------------------------------------------------------------
+@- Speed up the Boot sequence
+@----------------------------
+@- After reset, the number os wait states on chip select 0 is 8. All AT91
+@- Evaluation Boards fits fast flash memories, so that the number of wait
+@- states can be optimized to fast up the boot sequence.
+@- ICE note :For ICE debug no need to set the EBI value these values already set
+@- by the boot function.
+@------------------------------------------------------------------------------
+@- Load System EBI Base address and CSR0 Init Value
+ ldr r0, PtEBIBase
+ ldr r1, [pc,#-(8+.-InitTableEBI)] @ values (relative)
+
+@- Speed up code execution by disabling wait state on Chip Select 0
+ str r1, [r0]
+
+@------------------------------------------------------------------------------
+@- low level init
+@----------------
+@ Call __low_level_init to perform initialization before initializing
+@ AIC and calling main.
+@----------------------------------------------------------------------
+
+@ bl __low_level_init
+
+@------------------------------------------
+@- AIC User Interface Structure Definition
+@------------------------------------------
+
+AIC_SMR = 0 @- Source Mode Register
+AIC_SVR = 0x80 @- Source Vector Register
+AIC_IVR = 0x100 @- IRQ Vector Register
+AIC_FVR = 0x104 @- FIQ Vector Register
+AIC_ISR = 0x108 @- Interrupt Status Register
+AIC_IPR = 0x10c @- Interrupt Pending Register
+AIC_IMR = 0x110 @- Interrupt Mask Register
+AIC_CISR = 0x114 @- Core Interrupt Status Register
+@ = 0x118 @- Reserved 0
+@ = 0x11c @- Reserved 1
+AIC_IECR = 0x120 @- Interrupt Enable Command Register
+AIC_IDCR = 0x124 @- Interrupt Disable Command Register
+AIC_ICCR = 0x128 @- Interrupt Clear Command Register
+AIC_ISCR = 0x12c @- Interrupt Set Command Register
+AIC_EOICR = 0x130 @- of Interrupt Command Register
+AIC_SPU = 0x134 @- Spurious Vector Register
+
+@---------------------------------------------
+@- AIC_SMR[]: Interrupt Source Mode Registers
+@---------------------------------------------
+
+AIC_PRIOR = 0x07 @- Priority
+
+AIC_SRCTYPE = 0x60 @- Source Type Definition
+AIC_SRCTYPE_INT_LEVEL_SENSITIVE = 0x00 @- Level Sensitive
+AIC_SRCTYPE_INT_EDGE_TRIGGERED = 0x20 @- Edge Triggered
+AIC_SRCTYPE_EXT_LOW_LEVEL = 0x00 @- Low Level
+AIC_SRCTYPE_EXT_NEGATIVE_EDGE = 0x20 @- Negative Edge
+AIC_SRCTYPE_EXT_HIGH_LEVEL = 0x40 @- High Level
+AIC_SRCTYPE_EXT_POSITIVE_EDGE = 0x60 @- Positive Edge
+
+@--------------------------------------
+@- AIC_ISR: Interrupt Status Register
+@--------------------------------------
+
+AIC_IRQID = 0x1F @- Current source interrupt
+
+@-------------------------------------------
+@- AIC_CISR: Interrupt Core Status Register
+@-------------------------------------------
+
+AIC_NFIQ = 0x01 @- Core FIQ Status
+AIC_NIRQ = 0x02 @- Core IRQ Status
+
+@--------------------------------------------
+@- Advanced Interrupt COntroller BAse Address
+@--------------------------------------------
+
+AIC_BASE = 0xFFFFF000
+
+@------------------------------------------------------------------------------
+@- Reset the Interrupt Controller
+@--------------------------------
+@- Normally, the code is executed only if a reset has been actually performed.
+@- So, the AIC initialization resumes at setting up the default vectors.
+@------------------------------------------------------------------------------
+@- Load the AIC Base Address and the default handler addresses
+ add r0, pc,#-(8+.-AicData) @ @ where to read values (relative)
+
+ ldmia r0, {r1-r4}
+
+@- Setup the Spurious Vector
+ str r4, [r1, #AIC_SPU] @ r4 = spurious handler
+
+
+@- ICE note : For ICE debug
+@- Perform 8 End Of Interrupt Command to make sure AIC will not lock out nIRQ
+ mov r0, #8
+LoopAic0:
+ str r1, [r1, #AIC_EOICR] @ any value written
+ subs r0, r0, #1
+ bhi LoopAic0
+
+@- Set up the default interrupt handler vectors
+ str r2, [r1, #AIC_SVR] @ SVR[0] for FIQ
+ add r1, r1, #AIC_SVR
+ mov r0, #31 @ counter
+LoopAic1:
+ str r3, [r1, r0, LSL #2] @ SVRs for IRQs
+ subs r0, r0, #1 @ do not save FIQ
+ bhi LoopAic1
+
+ b EndInitAic
+
+@- Default Interrupt Handlers
+AicData:
+ .word AIC_BASE @ AIC Base Address
+@------------------------------------------------------------------------------
+@- Default Interrupt Handler
+@---------------------------
+@- These function are defined in the AT91 library. If you want to change this
+@- you can redifine these function in your appication code
+@------------------------------------------------------------------------------
+
+@ IMPORT at91_default_fiq_handler
+@ IMPORT at91_default_irq_handler
+@ IMPORT at91_spurious_handler
+PtDefaultHandler:
+ .word at91_default_fiq_handler
+ .word at91_default_irq_handler
+ .word at91_spurious_handler
+
+at91_default_fiq_handler: B at91_default_fiq_handler
+at91_default_irq_handler: B at91_default_irq_handler
+at91_spurious_handler: B at91_spurious_handler
+
+EndInitAic:
+
+@------------------------------------------------------------------------------
+@- Setup Exception Vectors in Internal RAM before Remap
+@------------------------------------------------------
+@- That's important to perform this operation before Remap in order to guarantee
+@- that the core has valid vectors at any time during the remap operation.
+@- Note: There are only 5 offsets as the vectoring is used.
+@- ICE note : In this code only the start address value is changed if you use
+@- without Semihosting.
+@- Before Remap the internal RAM it's 0x300000
+@- After Remap the internal RAM it's 0x000000
+@- Remap it's already executed it's no possible to write to 0x300000.
+@------------------------------------------------------------------------------
+@- Copy the ARM exception vectors
+
+@ The RAM_BASE = 0 it's specific for ICE
+
+ RAM_BASE = 0
+
+ mov r8,#RAM_BASE @ @ of the hard vector after remap in internal RAM 0x0
+
+ add r9, pc,#-(8+.-VectorTable) @ @ where to read values (relative)
+ ldmia r9!, {r0-r7} @ read 8 vectors
+
+ stmia r8!, {r0-r7} @ store them
+
+ ldmia r9!, {r0-r4} @ read 5 absolute handler addresses
+ stmia r8!, {r0-r4} @ store them
+
+@------------------------------------------------------------------------------
+@- Initialise the Memory Controller
+@----------------------------------
+@- That's principaly the Remap Command. Actually, all the External Bus
+@- Interface is configured with some instructions and the User Interface Image
+@- as described above. The jump "mov pc, r12" could be unread as it is after
+@- located after the Remap but actually it is thanks to the Arm core pipeline.
+@- The IniTableEBI addressing must be relative .
+@- The PtInitRemap must be absolute as the processor jumps at this address
+@- immediatly after the Remap is performed.
+@- Note also that the EBI base address is loaded in r11 by the "ldmia".
+@- ICE note :For ICE debug these values already set by the boot function and the
+@- Remap it's already executed it's no need to set still.
+@------------------------------------------------------------------------------
+@- Copy the Image of the Memory Controller
+ sub r10, pc,#(8+.-InitTableEBI) @ get the address of the chip select register image
+ ldr r12, PtInitRemap @ get the real jump address ( after remap )
+
+@- Copy Chip Select Register Image to Memory Controller and command remap
+ ldmia r10!, {r0-r9,r11} @ load the complete image and the EBI base
+ stmia r11!, {r0-r9} @ store the complete image with the remap command
+
+@- Jump to ROM at its new address
+ mov pc, r12 @ jump and break the pipeline
+
+PtInitRemap:
+ .word InitRemap @ address where to jump after REMAP
+
+@------------------------------------------------------------------------------
+@- The Reset Handler after Remap
+@-------------------------------
+@- From here, the code is continous execute from its link address.
+@------------------------------------------------------------------------------
+InitRemap:
+
+
+@--------------------------------
+@- ARM Core Mode and Status Bits
+@--------------------------------
+
+ARM_MODE_USER = 0x10
+ARM_MODE_FIQ = 0x11
+ARM_MODE_IRQ = 0x12
+ARM_MODE_SVC = 0x13
+ARM_MODE_ABORT = 0x17
+ARM_MODE_UNDEF = 0x1B
+ARM_MODE_SYS = 0x1F
+
+I_BIT = 0x80
+F_BIT = 0x40
+T_BIT = 0x20
+
+@------------------------------------------------------------------------------
+@- Stack Sizes Definition
+@------------------------
+@- Interrupt Stack requires 3 words x 8 priority level x 4 bytes when using
+@- the vectoring. This assume that the IRQ_ENTRY/IRQ_EXIT macro are used.
+@- The Interrupt Stack must be adjusted depending on the interrupt handlers.
+@- Fast Interrupt is the same than Interrupt without priority level.
+@- Other stacks are defined by default to save one word each.
+@- The System stack size is not defined and is limited by the free internal
+@- SRAM.
+@- User stack size is not defined and is limited by the free external SRAM.
+@------------------------------------------------------------------------------
+
+IRQ_STACK_SIZE = (3*8*4) @ 3 words per interrupt priority level
+FIQ_STACK_SIZE = (3*4) @ 3 words
+ABT_STACK_SIZE = (1*4) @ 1 word
+UND_STACK_SIZE = (1*4) @ 1 word
+
+@------------------------------------------------------------------------------
+@- Top of Stack Definition
+@-------------------------
+@- Fast Interrupt, Interrupt, Abort, Undefined and Supervisor Stack are located
+@- at the top of internal memory in order to speed the exception handling
+@- context saving and restoring.
+@- User (Application, C) Stack is located at the top of the external memory.
+@------------------------------------------------------------------------------
+RAM_BASE = 0
+RAM_SIZE = (2*1024)
+RAM_LIMIT = (RAM_BASE+RAM_SIZE)
+EXT_SRAM_BASE = 0x02000000
+EXT_SRAM_SIZE = 0x00040000 @ 256Kbytes
+EXT_SRAM_LIMIT = (EXT_SRAM_BASE+EXT_SRAM_SIZE)
+
+TOP_EXCEPTION_STACK = RAM_LIMIT @ Defined in part
+TOP_APPLICATION_STACK = EXT_SRAM_LIMIT @ Defined in Target
+
+@------------------------------------------------------------------------------
+@- Setup the stack for each mode
+@-------------------------------
+ ldr r0, =TOP_EXCEPTION_STACK
+
+@- Set up Fast Interrupt Mode and set FIQ Mode Stack
+ msr CPSR_c, #ARM_MODE_FIQ | I_BIT |F_BIT
+ mov r13, r0 @ Init stack FIQ
+ sub r0, r0, #FIQ_STACK_SIZE
+
+@- Set up Interrupt Mode and set IRQ Mode Stack
+ msr CPSR_c, #ARM_MODE_IRQ | I_BIT |F_BIT
+ mov r13, r0 @ Init stack IRQ
+ sub r0, r0, #IRQ_STACK_SIZE
+
+@- Set up Abort Mode and set Abort Mode Stack
+ msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT
+ mov r13, r0 @ Init stack Abort
+ sub r0, r0, #ABT_STACK_SIZE
+
+@- Set up Undefined Instruction Mode and set Undef Mode Stack
+ msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT
+ mov r13, r0 @ Init stack Undef
+ sub r0, r0, #UND_STACK_SIZE
+
+@- Set up Supervisor Mode and set Supervisor Mode Stack
+ msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT
+ mov r13, r0 @ Init stack Sup
+
+@------------------------------------------------------------------------------
+@- Setup Application Operating Mode and Enable the interrupts
+@------------------------------------------------------------
+@- System Mode is selected first and the stack is setup. This allows to prevent
+@- any interrupt occurence while the User is not initialized. System Mode is
+@- used as the interrupt enabling would be avoided from User Mode (CPSR cannot
+@- be written while the core is in User Mode).
+@------------------------------------------------------------------------------
+ msr CPSR_c, #ARM_MODE_USER @ set User mode
+ ldr r13, =TOP_APPLICATION_STACK @ Init stack User
+
+@------------------------------------------------------------------------------
+@- Initialise C variables
+@------------------------
+@- Following labels are automatically generated by the linker.
+@- RO: Read-only = the code
+@- RW: Read Write = the data pre-initialized and zero-initialized.
+@- ZI: Zero-Initialized.
+@- Pre-initialization values are located after the code area in the image.
+@- Zero-initialized datas are mapped after the pre-initialized.
+@- Note on the Data position :
+@- If using the ARMSDT, when no -rw-base option is used for the linker, the
+@- data area is mapped after the code. You can map the data either in internal
+@- SRAM ( -rw-base=0x40 or 0x34) or in external SRAM ( -rw-base=0x2000000 ).
+@- Note also that to improve the code density, the pre_initialized data must
+@- be limited to a minimum.
+@------------------------------------------------------------------------------
+@ IMPORT |Image$$RO$$Limit| @ End of ROM code (=start of ROM data)
+@ IMPORT |Image$$RW$$Base| @ Base of RAM to initialise
+@ IMPORT |Image$$ZI$$Base| @ Base and limit of area
+@ IMPORT |Image$$ZI$$Limit| @ to zero initialise
+
+@ ldr r0, =|Image$$RO$$Limit| @ Get pointer to ROM data
+@ ldr r1, =|Image$$RW$$Base| @ and RAM copy
+@ ldr r3, =|Image$$ZI$$Base| @ Zero init base => top of initialised data
+@ cmp r0, r1 @ Check that they are different
+@ beq NoRW
+@LoopRw: cmp r1, r3 @ Copy init data
+@ ldrcc r2, [r0], #4
+@ strcc r2, [r1], #4
+@ bcc LoopRw
+@NoRW: ldr r1, =|Image$$ZI$$Limit| @ Top of zero init segment
+@ mov r2, #0
+@LoopZI: cmp r3, r1 @ Zero init
+@ strcc r2, [r3], #4
+@ bcc LoopZI
+
+
+
+@------------------------------------------------------------------------------
+@- Branch on C code Main function (with interworking)
+@----------------------------------------------------
+@- Branch must be performed by an interworking call as either an ARM or Thumb
+@- main C function must be supported. This makes the code not position-
+@- independant. A Branch with link would generate errors
+@------------------------------------------------------------------------------
+@ IMPORT main
+
+ ldr r0, =main
+ mov lr, pc
+ bx r0
+
+@------------------------------------------------------------------------------
+@- Loop for ever
+@---------------
+@- End of application. Normally, never occur.
+@- Could jump on Software Reset ( B 0x0 ).
+@------------------------------------------------------------------------------
+End:
+ b End
+
+ .END
diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/boot/ebi.inc b/Bachelor/Mikroprozessorsysteme2/mi2/boot/ebi.inc new file mode 100644 index 0000000..c4287f0 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/boot/ebi.inc @@ -0,0 +1,25 @@ +@------------------------------------------------------------------------------ +@- EBI Initialization Data +@------------------------- +@- The EBI values depend to target choice , Clock, and memories access time. +@- Yous must be define these values in include file +@- The EBI User Interface Image which is copied by the boot. +@- The EBI_CSR_x are defined in the target and hardware depend. +@- That's hardware! Details in the Electrical Datasheet of the AT91 device. +@- EBI Base Address is added at the end for commodity in copy code. +@- ICE note :For ICE debug no need to set the EBI value these values already set +@- by the boot function. +@------------------------------------------------------------------------------ +FLASH_BASE = 0x1000000 +EXT_SRAM_BASE = 0x2000000 +EBI_BASE = 0xFFE00000 @- External Bus Interface + +EBI_CSR_0 = (FLASH_BASE | 0x2529) @ 0x01000000, 16MB, 2 tdf, 16 bits, 2 WS +EBI_CSR_1 = (EXT_SRAM_BASE | 0x2121) @ 0x02000000, 16MB, 0 hold, 16 bits, 1 WS +EBI_CSR_2 = 0x20000000 @ unused +EBI_CSR_3 = 0x30000000 @ unused +EBI_CSR_4 = 0x40000000 @ unused +EBI_CSR_5 = 0x50000000 @ unused +EBI_CSR_6 = 0x60000000 @ unused +EBI_CSR_7 = 0x70000000 @ unused + diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/boot/swi.S b/Bachelor/Mikroprozessorsysteme2/mi2/boot/swi.S new file mode 100644 index 0000000..6a4f2e3 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/boot/swi.S @@ -0,0 +1,12 @@ + .global SWIHandler + .text +SWIHandler: + + movs pc, lr + +SWIJumpTable: + +.end + + + diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/Termin2Aufgabe2.c b/Bachelor/Mikroprozessorsysteme2/mi2/h/Termin2Aufgabe2.c new file mode 100644 index 0000000..24171af --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/Termin2Aufgabe2.c @@ -0,0 +1,35 @@ +// Lsung zu Termin2 +// Aufgabe 1 +// von: Manfred Pester +// vom: 27.07.2003 +// + +#define PIOB_PER ((volatile unsigned int *) 0xFFFF0000) +#define PIOB_OER ((volatile unsigned int *) 0xFFFF0010) +#define PIOB_SODR ((volatile unsigned int *) 0xFFFF0030) +#define PIOB_CODR ((volatile unsigned int *) 0xFFFF0034) + +#define PMC_SCER ((volatile unsigned int *) 0xFFFF4000) +#define PMC_SCDR ((volatile unsigned int *) 0xFFFF4004) +#define PMC_SCSR ((volatile unsigned int *) 0xFFFF4008) +#define PMC_PCER ((volatile unsigned int *) 0xFFFF4010) +#define PMC_PCDR ((volatile unsigned int *) 0xFFFF4014) +#define PMC_PCSR ((volatile unsigned int *) 0xFFFF4018) + + +int main(void) +{ + + *PMC_PCER = 0x4000; // Peripheral Clock fr PIOB einschalten + + *PIOB_PER = 0x0100; // Enable Register 8 LED's und Taster an PB3 + *PIOB_OER = 0x0100; // Output Enable Register 8 LED's sind aus + + while(1) + { + *PIOB_SODR = 0x0100; // Set Output Data Register LED's sind aus + *PIOB_CODR = 0x0100; // Clear Output Data Register LED's leuchten + } + + return 0; +} diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/Termin2Aufgabe2.h b/Bachelor/Mikroprozessorsysteme2/mi2/h/Termin2Aufgabe2.h new file mode 100644 index 0000000..670a0a9 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/Termin2Aufgabe2.h @@ -0,0 +1,38 @@ +// Headerfile fr Termin2 + +#ifndef Termin2 +#define Termin2 + +// Register von PIOB +#define PIOB_PER ((volatile unsigned int *) 0xFFFF0000) +#define PIOB_OER ((volatile unsigned int *) 0xFFFF0010) +#define PIOB_SODR ((volatile unsigned int *) 0xFFFF0030) +#define PIOB_CODR ((volatile unsigned int *) 0xFFFF0034) +#define PIOB_PDSR ((volatile unsigned int *) 0xFFFF003C) + +// Leuchtdioden des AT91EB63 +#define LED1 0x0100 // PIOB8 +#define LED2 0x0200 // PIOB9 +#define LED3 0x0400 // PIOB10 +#define LED4 0x0800 // PIOB11 +#define LED5 0x1000 // PIOB12 +#define LED6 0x2000 // PIOB13 +#define LED7 0x4000 // PIOB14 +#define LED8 0x8000 // PIOB15 +// Taster SW1-3 an PIOB des AT91EB63 +#define SW1 0x08 // PIOB3 +#define SW2 0x10 // PIOB4 +#define SW3 0x20 // PIOB5 +// Taster SW4 an PIOA des AT91EB63 +#define SW4 0x200 // PIOA9 + + +// Register vom PMC +#define PMC_SCER ((volatile unsigned int *) 0xFFFF4000) +#define PMC_SCDR ((volatile unsigned int *) 0xFFFF4004) +#define PMC_SCSR ((volatile unsigned int *) 0xFFFF4008) +#define PMC_PCER ((volatile unsigned int *) 0xFFFF4010) +#define PMC_PCDR ((volatile unsigned int *) 0xFFFF4014) +#define PMC_PCSR ((volatile unsigned int *) 0xFFFF4018) + +#endif // Termin2 diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/aic.h b/Bachelor/Mikroprozessorsysteme2/mi2/h/aic.h new file mode 100644 index 0000000..8a5d2bd --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/aic.h @@ -0,0 +1,99 @@ +//---------------------------------------------------------------------------- +// File Name : aic.h +// Object : Advanced Interrupt Controller Definition File. +// +// 1.0 27/10/02 GR : Creation +//---------------------------------------------------------------------------- + +#ifndef aic_h +#define aic_h + +#include "std_c.h" + +/*-----------------------------------------*/ +/* AIC User Interface Structure Definition */ +/*-----------------------------------------*/ + +typedef struct +{ + at91_reg AIC_SMR[32] ; /* Source Mode Register */ + at91_reg AIC_SVR[32] ; /* Source Vector Register */ + at91_reg AIC_IVR ; /* IRQ Vector Register */ + at91_reg AIC_FVR ; /* FIQ Vector Register */ + at91_reg AIC_ISR ; /* Interrupt Status Register */ + at91_reg AIC_IPR ; /* Interrupt Pending Register */ + at91_reg AIC_IMR ; /* Interrupt Mask Register */ + at91_reg AIC_CISR ; /* Core Interrupt Status Register */ + at91_reg reserved0 ; + at91_reg reserved1 ; + at91_reg AIC_IECR ; /* Interrupt Enable Command Register */ + at91_reg AIC_IDCR ; /* Interrupt Disable Command Register */ + at91_reg AIC_ICCR ; /* Interrupt Clear Command Register */ + at91_reg AIC_ISCR ; /* Interrupt Set Command Register */ + at91_reg AIC_EOICR ; /* End of Interrupt Command Register */ + at91_reg AIC_SPU ; /* Spurious Vector Register */ +} StructAIC ; + +/*--------------------------------------------*/ +/* AIC_SMR[]: Interrupt Source Mode Registers */ +/*--------------------------------------------*/ + +#define AIC_PRIOR 0x07 /* Priority */ + +#define AIC_SRCTYPE 0x60 /* Source Type Definition */ + +/* Internal Interrupts */ +#define AIC_SRCTYPE_INT_LEVEL_SENSITIVE 0x00 /* Level Sensitive */ +#define AIC_SRCTYPE_INT_EDGE_TRIGGERED 0x20 /* Edge Triggered */ + +/* External Interrupts */ +#define AIC_SRCTYPE_EXT_LOW_LEVEL 0x00 /* Low Level */ +#define AIC_SRCTYPE_EXT_NEGATIVE_EDGE 0x20 /* Negative Edge */ +#define AIC_SRCTYPE_EXT_HIGH_LEVEL 0x40 /* High Level */ +#define AIC_SRCTYPE_EXT_POSITIVE_EDGE 0x60 /* Positive Edge */ + +/*------------------------------------*/ +/* AIC_ISR: Interrupt Status Register */ +/*------------------------------------*/ + +#define AIC_IRQID 0x1F /* Current source interrupt */ + +/*------------------------------------------*/ +/* AIC_CISR: Interrupt Core Status Register */ +/*------------------------------------------*/ + +#define AIC_NFIQ 0x01 /* Core FIQ Status */ +#define AIC_NIRQ 0x02 /* Core IRQ Status */ + +/*-------------------------------------*/ +/* Peripheral and Interrupt Identifier */ +/*-------------------------------------*/ + +#define FIQ_ID 0 /* Fast Interrupt */ +#define SWIRQ_ID 1 /* Soft Interrupt (generated by the AIC) */ +#define US0_ID 2 /* USART Channel 0 */ +#define US1_ID 3 /* USART Channel 1 */ +#define US2_ID 4 /* USART Channel 2 */ +#define SPI_ID 5 /* SPI */ +#define TC0_ID 6 /* Timer Channel 0 */ +#define TC1_ID 7 /* Timer Channel 1 */ +#define TC2_ID 8 /* Timer Channel 2 */ +#define TC3_ID 9 /* Timer Channel 3 */ +#define TC4_ID 10 /* Timer Channel 4 */ +#define TC5_ID 11 /* Timer Channel 5 */ +#define WD_ID 12 /* Watchdog */ +#define PIOA_ID 13 /* Parallel I/O Controller A */ +#define PIOB_ID 14 /* Parallel I/O Controller B */ + +#define IRQ3_ID 28 /* External interrupt 3 */ +#define IRQ2_ID 29 /* External interrupt 2 */ +#define IRQ1_ID 30 /* External interrupt 1 */ +#define IRQ0_ID 31 /* External interrupt 0 */ + +/*-------------------------------*/ +/* Advanced Interrupt Controller */ +/*-------------------------------*/ + +#define AIC_BASE ((StructAIC *)0xFFFFF000) + +#endif /* aic_h */ diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/aic.inc b/Bachelor/Mikroprozessorsysteme2/mi2/h/aic.inc new file mode 100644 index 0000000..6638c20 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/aic.inc @@ -0,0 +1,66 @@ +@---------------------------------------------------------------------------- +@ File Name : aic.inc +@ Object : Advanced Interrupt Controller Header File. +@ +@ 1.0 27/20/02 GR : Creation +@---------------------------------------------------------------------------- + +#ifndef pmc_inc +#define pmc_inc + +@------------------------------------------ +@- AIC User Interface Structure Definition +@------------------------------------------ + +AIC_SMR = 0 @- Source Mode Register +AIC_SVR = 0x80 @- Source Vector Register +AIC_IVR = 0x100 @- IRQ Vector Register +AIC_FVR = 0x104 @- FIQ Vector Register +AIC_ISR = 0x108 @- Interrupt Status Register +AIC_IPR = 0x10c @- Interrupt Pending Register +AIC_IMR = 0x110 @- Interrupt Mask Register +AIC_CISR = 0x114 @- Core Interrupt Status Register +@ = 0x118 @- Reserved 0 +@ = 0x11c @- Reserved 1 +AIC_IECR = 0x120 @- Interrupt Enable Command Register +AIC_IDCR = 0x124 @- Interrupt Disable Command Register +AIC_ICCR = 0x128 @- Interrupt Clear Command Register +AIC_ISCR = 0x12c @- Interrupt Set Command Register +AIC_EOICR = 0x130 @- of Interrupt Command Register +AIC_SPU = 0x134 @- Spurious Vector Register + +@--------------------------------------------- +@- AIC_SMR[]: Interrupt Source Mode Registers +@--------------------------------------------- + +AIC_PRIOR = 0x07 @- Priority + +AIC_SRCTYPE = 0x60 @- Source Type Definition +AIC_SRCTYPE_INT_LEVEL_SENSITIVE = 0x00 @- Level Sensitive +AIC_SRCTYPE_INT_EDGE_TRIGGERED = 0x20 @- Edge Triggered +AIC_SRCTYPE_EXT_LOW_LEVEL = 0x00 @- Low Level +AIC_SRCTYPE_EXT_NEGATIVE_EDGE = 0x20 @- Negative Edge +AIC_SRCTYPE_EXT_HIGH_LEVEL = 0x40 @- High Level +AIC_SRCTYPE_EXT_POSITIVE_EDGE = 0x60 @- Positive Edge + +@-------------------------------------- +@- AIC_ISR: Interrupt Status Register +@-------------------------------------- + +AIC_IRQID = 0x1F @- Current source interrupt + +@------------------------------------------- +@- AIC_CISR: Interrupt Core Status Register +@------------------------------------------- + +AIC_NFIQ = 0x01 @- Core FIQ Status +AIC_NIRQ = 0x02 @- Core IRQ Status + +@-------------------------------------------- +@- Advanced Interrupt COntroller BAse Address +@-------------------------------------------- + +AIC_BASE = 0xFFFFF000 + +#endif + diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/ebi.inc b/Bachelor/Mikroprozessorsysteme2/mi2/h/ebi.inc new file mode 100644 index 0000000..d9ac97d --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/ebi.inc @@ -0,0 +1,36 @@ +@---------------------------------------------------------------------------- +@ File Name : ebi.inc +@ Object : Power Management Controller Header File. +@ +@ 1.0 27/10/02 GR : Creation +@---------------------------------------------------------------------------- + +#ifndef ebi_inc +#define ebi_inc + +@------------------------------------------------------------------------------ +@- EBI Initialization Data +@------------------------- +@- The EBI values depend to target choice , Clock, and memories access time. +@- Yous must be define these values in include file +@- The EBI User Interface Image which is copied by the boot. +@- The EBI_CSR_x are defined in the target and hardware depend. +@- That's hardware! Details in the Electrical Datasheet of the AT91 device. +@- EBI Base Address is added at the end for commodity in copy code. +@- ICE note :For ICE debug no need to set the EBI value these values already set +@- by the boot function. +@------------------------------------------------------------------------------ +FLASH_BASE = 0x1000000 +EXT_SRAM_BASE = 0x2000000 +EBI_BASE = 0xFFE00000 @- External Bus Interface + +EBI_CSR_0 = (FLASH_BASE | 0x2529) @ 0x01000000, 16MB, 2 tdf, 16 bits, 2 WS +EBI_CSR_1 = (EXT_SRAM_BASE | 0x2121) @ 0x02000000, 16MB, 0 hold, 16 bits, 1 WS +EBI_CSR_2 = 0x20000000 @ unused +EBI_CSR_3 = 0x30000000 @ unused +EBI_CSR_4 = 0x40000000 @ unused +EBI_CSR_5 = 0x50000000 @ unused +EBI_CSR_6 = 0x60000000 @ unused +EBI_CSR_7 = 0x70000000 @ unused + +#endif diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/pio.h b/Bachelor/Mikroprozessorsysteme2/mi2/h/pio.h new file mode 100644 index 0000000..b95084c --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/pio.h @@ -0,0 +1,123 @@ +//---------------------------------------------------------------------------- +// File Name : pio.h +// Object : Parallel I/O Header File +// +//* 1.0 27/10/02 GR : Creation +//---------------------------------------------------------------------------- + +#ifndef pio_h +#define pio_h + +#include "std_c.h" + +/*------------------------------------------------------------*/ +/* User Interface Parallel I/O Interface Structure Definition */ +/*------------------------------------------------------------*/ + +typedef struct +{ + at91_reg PIO_PER ; /* PIO Enable Register */ + at91_reg PIO_PDR ; /* PIO Disable Register */ + at91_reg PIO_PSR ; /* PIO Status Register */ + at91_reg Reserved0 ; + at91_reg PIO_OER ; /* Output Enable Register */ + at91_reg PIO_ODR ; /* Output Disable Register */ + at91_reg PIO_OSR ; /* Output Status Register */ + at91_reg Reserved1 ; + at91_reg PIO_IFER ; /* Input Filter Enable Register */ + at91_reg PIO_IFDR ; /* Input Filter Disable Register */ + at91_reg PIO_IFSR ; /* Input Filter Status Register */ + at91_reg Reserved2 ; + at91_reg PIO_SODR ; /* Set Output Data Register */ + at91_reg PIO_CODR ; /* Clear Output Data Register */ + at91_reg PIO_ODSR ; /* Output Data Status Register */ + at91_reg PIO_PDSR ; /* Pin Data Status Register */ + at91_reg PIO_IER ; /* Interrupt Enable Register */ + at91_reg PIO_IDR ; /* Interrupt Disable Register */ + at91_reg PIO_IMR ; /* Interrupt Mask Register */ + at91_reg PIO_ISR ; /* Interrupt Status Register */ + at91_reg PIO_MDER ; /* Multi Driver Enable Register */ + at91_reg PIO_MDDR ; /* Multi Driver Disable Register */ + at91_reg PIO_MDSR ; /* Multi Driver Status Register */ +} StructPIO ; + +#define PIOB_BASE ((StructPIO *) 0xFFFF0000) /* Parallel I/O Controller B */ +#define PIOA_BASE ((StructPIO *) 0xFFFEC000) /* Parallel I/O Controller A */ + +/* PIO Controller A */ +#define PIOTCLK3 0 /* Timer 3 Clock signal */ +#define PIOTIOA3 1 /* Timer 3 Signal A */ +#define PIOTIOB3 2 /* Timer 3 Signal B */ + +#define PIOTCLK4 3 /* Timer 4 Clock signal */ +#define PIOTIOA4 4 /* Timer 4 Signal A */ +#define PIOTIOB4 5 /* Timer 4 Signal B */ + +#define PIOTCLK5 6 /* Timer 5 Clock signal */ +#define PIOTIOA5 7 /* Timer 5 Signal A */ +#define PIOTIOB5 8 /* Timer 5 Signal B */ + +#define PIOIRQ0 9 /* External Interrupt 0 */ +#define PIOIRQ1 10 /* External Interrupt 1 */ +#define PIOIRQ2 11 /* External Interrupt 2 */ +#define PIOIRQ3 12 /* External Interrupt 3 */ +#define PIOFIQ 13 /* Fast Interrupt */ + +#define PIOSCK0 14 /* USART 0 signal */ +#define PIOTXD0 15 /* USART 0 transmit data */ +#define PIORXD0 16 /* USART 0 receive data */ + +#define PIOSCK1 17 /* USART 1 clock signal */ +#define PIOTXD1 18 /* USART 1 transmit data */ +#define PIORXD1 19 /* USART 1 receive data */ + +#define PIOSCK2 20 /* USART 2 clock signal */ +#define PIOTXD2 21 /* USART 2 transmit data */ +#define PIORXD2 22 /* USART 2 receive data */ + +#define PIOSPCK 23 /* SPI clock signal */ +#define PIOMISO 24 /* SPI Master In Slave */ +#define PIOMOSI 25 /* SPI Master Out Slave */ +#define PIONPCS0 26 /* SPI Peripheral Chip Select 0 */ +#define PIONSS PIONPCS0 +#define PIONPCS1 27 /* SPI Peripheral Chip Select 1 */ +#define PIONPCS2 28 /* SPI Peripheral Chip Select 2 */ +#define PIONPCS3 29 /* SPI Peripheral Chip Select 3 */ + +/* PIO Controller B */ +#define PIOTCLK0 19 /* Timer 0 Clock signal input */ +#define PIOTIOA0 20 /* Timer 0 Signal A */ +#define PIOTIOB0 21 /* Timer 0 Signal B */ + +#define PIOTCLK1 22 /* Timer 1 Clock signal */ +#define PIOTIOA1 23 /* Timer 1 Signal A */ +#define PIOTIOB1 24 /* Timer 1 Signal B */ + +#define PIOTCLK2 25 /* Timer 2 Clock signal */ +#define PIOTIOA2 26 /* Timer 2 Signal A */ +#define PIOTIOB2 27 /* Timer 2 Signal B */ + +#define PIOMCKO 17 /* Master Clock Output */ + +#define PIOBMS 18 /* Boot Mode Select */ + +#define PIOMPI_NOE 0 /* MPI output enable */ +#define PIOMPI_NLB 1 /* MPI lower byte select */ +#define PIOMPI_NUB 2 /* MPI upper byte select */ + +#define LED1 (1<<8) /* LED 1 (linke LED) */ +#define LED2 (1<<9) /* LED 2 */ +#define LED3 (1<<10) /* LED 3 */ +#define LED4 (1<<11) /* LED 4 */ +#define LED5 (1<<12) /* LED 5 */ +#define LED6 (1<<13) /* LED 6 */ +#define LED7 (1<<14) /* LED 7 */ +#define LED8 (1<<15) /* LED 8 */ +#define ALL_LEDS (LED1|LED2|LED3|LED4|LED5|LED6|LED7|LED8) + +#define KEY1 (1<<3) /* TASTE 1 (linke Taste) auf PB3 */ +#define KEY2 (1<<4) /* TASTE 2 auf PB4 */ +#define KEY3 (1<<5) /* TASTE 3 auf PB5 */ +#define KEY4 (1<<9) /* TASTE 4 auf PA9/IRQ0 */ +#define ALL_KEYS (KEY1|KEY2|KEY3) +#endif /* pio_h */ diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/pio.inc b/Bachelor/Mikroprozessorsysteme2/mi2/h/pio.inc new file mode 100644 index 0000000..e694e7a --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/pio.inc @@ -0,0 +1,120 @@ +@---------------------------------------------------------------------------- +@ File Name : pio.inc +@ Object : Parallel I/O Header File +@ +@ 1.0 27/10/02 GR : Creation +@---------------------------------------------------------------------------- + +#ifndef pio_inc +#define pio_inc + + +@------------------------------------------------------------*/ +@ User Interface Parallel I/O Interface Structure Definition */ +@------------------------------------------------------------*/ + +PIO_PER = 0x0 @ PIO Enable Register +PIO_PDR = 0x4 @ PIO Disable Register +PIO_PSR = 0x8 @ PIO Status Register + @ Reserved 0xC +PIO_OER = 0x10 @ Output Enable Register +PIO_ODR = 0x14 @ Output Disable Register +PIO_OSR = 0x18 @ Output Status Register + @ Reserved 0x1C +PIO_IFER = 0x20 @ Input Filter Enable Register +PIO_IFDR = 0x24 @ Input Filter Disable Register +PIO_IFSR = 0x28 @ Input Filter Status Register + @ Reserved 0x2C +PIO_SODR = 0x30 @ Set Output Data Register +PIO_CODR = 0x34 @ Clear Output Data Register +PIO_ODSR = 0x38 @ Output Data Status Register +PIO_PDSR = 0x3C @ Pin Data Status Register +PIO_IER = 0x40 @ Interrupt Enable Register +PIO_IDR = 0x44 @ Interrupt Disable Register +PIO_IMR = 0x48 @ Interrupt Mask Register +PIO_ISR = 0x4C @ Interrupt Status Register +PIO_MDER = 0x50 @ Multi Driver Enable Register +PIO_MDDR = 0x54 @ Multi Driver Disable Register +PIO_MDSR = 0x58 @ Multi Driver Status Register + @ Reserved 0x5C + +PIOB_BASE = 0xFFFF0000 @ Parallel I/O Controller B +PIOA_BASE = 0xFFFEC000 @ Parallel I/O Controller A + +@ PIO Controller A +PIOTCLK3 = 0 @ Timer 3 Clock signal +PIOTIOA3 = 1 @ Timer 3 Signal A +PIOTIOB3 = 2 @ Timer 3 Signal B + +PIOTCLK4 = 3 @ Timer 4 Clock signal +PIOTIOA4 = 4 @ Timer 4 Signal A +PIOTIOB4 = 5 @ Timer 4 Signal B + +PIOTCLK5 = 6 @ Timer 5 Clock signal +PIOTIOA5 = 7 @ Timer 5 Signal A +PIOTIOB5 = 8 @ Timer 5 Signal B + +PIOIRQ0 = 9 @ External Interrupt 0 +PIOIRQ1 = 10 @ External Interrupt 1 +PIOIRQ2 = 11 @ External Interrupt 2 +PIOIRQ3 = 12 @ External Interrupt 3 +PIOFIQ = 13 @ Fast Interrupt + +PIOSCK0 = 14 @ USART 0 signal +PIOTXD0 = 15 @ USART 0 transmit data +PIORXD0 = 16 @ USART 0 receive data + +PIOSCK1 = 17 @ USART 1 clock signal +PIOTXD1 = 18 @ USART 1 transmit data +PIORXD1 = 19 @ USART 1 receive data + +PIOSCK2 = 20 @ USART 2 clock signal +PIOTXD2 = 21 @ USART 2 transmit data +PIORXD2 = 22 @ USART 2 receive data + +PIOSPCK = 23 @ SPI clock signal +PIOMISO = 24 @ SPI Master In Slave +PIOMOSI = 25 @ SPI Master Out Slave +PIONPCS0 = 26 @ SPI Peripheral Chip Select 0 +PIONSS = PIONPCS0 +PIONPCS1 = 27 @ SPI Peripheral Chip Select 1 +PIONPCS2 = 28 @ SPI Peripheral Chip Select 2 +PIONPCS3 = 29 @ SPI Peripheral Chip Select 3 + +@ PIO Controller B +PIOTCLK0 = 19 @ Timer 0 Clock signal input +PIOTIOA0 = 20 @ Timer 0 Signal A +PIOTIOB0 = 21 @ Timer 0 Signal B + +PIOTCLK1 = 22 @ Timer 1 Clock signal +PIOTIOA1 = 23 @ Timer 1 Signal A +PIOTIOB1 = 24 @ Timer 1 Signal B + +PIOTCLK2 = 25 @ Timer 2 Clock signal +PIOTIOA2 = 26 @ Timer 2 Signal A +PIOTIOB2 = 27 @ Timer 2 Signal B + +PIOMCKO = 17 @ Master Clock Output + +PIOBMS = 18 @ Boot Mode Select + +PIOMPI_NOE = 0 @ MPI output enable +PIOMPI_NLB = 1 @ MPI lower byte select +PIOMPI_NUB = 2 @ MPI upper byte select + +LED1 = (1<<8) @ LED 1 (linke LED) +LED2 = (1<<9) @ LED 2 +LED3 = (1<<10) @ LED 3 +LED4 = (1<<11) @ LED 4 +LED5 = (1<<12) @ LED 5 +LED6 = (1<<13) @ LED 6 +LED7 = (1<<14) @ LED 7 +LED8 = (1<<15) @ LED 8 +ALL_LEDS = (LED1|LED2|LED3|LED4|LED5|LED6|LED7|LED8) + +KEY1 = (1<<3) @ TASTE 1 (linke Taste) auf PB3 +KEY2 = (1<<4) @ TASTE 2 auf PB4 +KEY3 = (1<<5) @ TASTE 3 auf PB5 +KEY4 = (1<<9) @ TASTE 4 auf PA9/IRQ0 +ALL_KEYS = (KEY1|KEY2|KEY3) +#endif diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/pmc.h b/Bachelor/Mikroprozessorsysteme2/mi2/h/pmc.h new file mode 100644 index 0000000..4a7ab8b --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/pmc.h @@ -0,0 +1,42 @@ +//---------------------------------------------------------------------------- +// File Name : pmc.h +// Object : Power Management Controller Header File. +// +// 1.0 27/10/02 GR : Creation +//---------------------------------------------------------------------------- +#ifndef pmc_h +#define pmc_h + +#include "std_c.h" + +/*--------------------------------------------------*/ +/* Power Management Controller Structure Definition */ +/*--------------------------------------------------*/ + +typedef struct +{ + at91_reg PMC_SCER ; /* System Clock Enable Register */ + at91_reg PMC_SCDR ; /* System Clock Disable Register */ + at91_reg PMC_SCSR ; /* System Clock Status Register */ + at91_reg Reserved0 ; + at91_reg PMC_PCER ; /* Peripheral Clock Enable Register */ + at91_reg PMC_PCDR ; /* Peripheral Clock Disable Register */ + at91_reg PMC_PCSR ; /* Peripheral Clock Status Register */ +} StructPMC ; + +/*-----------------------------------------------*/ +/* Power Saving Control Register Bits Definition */ +/*-----------------------------------------------*/ + +#define PMC_ARM7DIS 0x1 +#define PMC_US0 0x4 +#define PMC_PCSR_ALL 0xffff + +/*------------------------------------------*/ +/* Power Management Controller Base Address */ +/*------------------------------------------*/ + +#define PMC_BASE (( StructPMC *) 0xFFFF4000) + + +#endif /* pmc_h */ diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/pmc.inc b/Bachelor/Mikroprozessorsysteme2/mi2/h/pmc.inc new file mode 100644 index 0000000..f58d547 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/pmc.inc @@ -0,0 +1,47 @@ +@---------------------------------------------------------------------------- +@ File Name : pmc.inc +@ Object : Power Management Controller Header File. +@ +@ 1.0 27/10/02 GR : Creation +@---------------------------------------------------------------------------- +#ifndef pmc_inc +#define pmc_inc + +@-------------------------------------------------- +@ Power Management Controller Structure Definition +@-------------------------------------------------- + +PMC_SCER = 0x0 @ System Clock Enable Register +PMC_SCDR = 0x4 @ System Clock Disable Register +PMC_SCSR = 0x8 @ System Clock Status Register +@ Reserved +PMC_PCER = 0x10 @ Peripheral Clock Enable Register +PMC_PCDR = 0x14 @ Peripheral Clock Disable Register +PMC_PCSR = 0x18 @ Peripheral Clock Status Register + +@----------------------------------------------- +@ Power Saving Control Register Bits Definition +@----------------------------------------------- + +PMC_ARM7DIS = 0x1 +PMC_US0 = (1<<2) +PMC_US1 = (1<<3) +PMC_US2 = (1<<4) +PMC_TC0 = (1<<6) +PMC_TC1 = (1<<7) +PMC_TC2 = (1<<8) +PMC_TC3 = (1<<9) +PMC_TC4 = (1<<10) +PMC_TC5 = (1<<11) +PMC_PIOA = (1<<13) +PMC_PIOB = (1<<14) +PMC_PCSR_ALL = 0xffff + +@------------------------------------------ +@ Power Management Controller Base Address +@------------------------------------------ + +PMC_BASE = 0xFFFF4000 + + +#endif diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/ser_io.h b/Bachelor/Mikroprozessorsysteme2/mi2/h/ser_io.h new file mode 100644 index 0000000..8bf3eb5 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/ser_io.h @@ -0,0 +1,18 @@ +//*---------------------------------------------------------------------------- +//* File Name : ser_io.h +//* Object : Standard C Header File +//* +//* 1.0 27/10/02 GR : Creation +//*---------------------------------------------------------------------------- + +#ifndef ser_io_h +#define ser_io_h + +void putchar(int); +unsigned char getchar(void); +void init_ser(void); +void puts(char*); +unsigned int gets(char*,int); +unsigned int getpw(char*,int); + +#endif /* ser_io_h */ diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/std_c.h b/Bachelor/Mikroprozessorsysteme2/mi2/h/std_c.h new file mode 100644 index 0000000..b55e229 --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/std_c.h @@ -0,0 +1,30 @@ +//*---------------------------------------------------------------------------- +//* File Name : std_c.h +//* Object : Standard C Header File +//* +//* 1.0 27/10/02 GR : Creation +//*---------------------------------------------------------------------------- + +#ifndef std_c_h +#define std_c_h + +/*----------------*/ +/* Standard types */ +/*----------------*/ + +typedef unsigned int u_int ; +typedef unsigned short u_short ; +typedef unsigned char u_char ; + + +/* AT91 Register type */ +typedef volatile unsigned int at91_reg ; + +/*----------------*/ +/* Boolean values */ +/*----------------*/ + +#define TRUE 1 +#define FALSE 0 + +#endif /* std_c_h */ diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/tc.h b/Bachelor/Mikroprozessorsysteme2/mi2/h/tc.h new file mode 100644 index 0000000..19cc48b --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/tc.h @@ -0,0 +1,306 @@ +//----------------------------------------------------------------------------- +// File Name : tc.h +// Object : Timer Counter Header File +// +// 1.0 27/10/02 GR : Creation +//----------------------------------------------------------------------------- + +#ifndef tc_h +#define tc_h + +#include "std_c.h" + +/*-------------------------------------------*/ +/* Timer User Interface Structure Definition */ +/*-------------------------------------------*/ + +typedef struct +{ + at91_reg TC_CCR ; /* Control Register */ + at91_reg TC_CMR ; /* Mode Register */ + at91_reg Reserved0 ; + at91_reg Reserved1 ; + at91_reg TC_CV ; /* Counter value */ + at91_reg TC_RA ; /* Register A */ + at91_reg TC_RB ; /* Register B */ + at91_reg TC_RC ; /* Register C */ + at91_reg TC_SR ; /* Status Register */ + at91_reg TC_IER ; /* Interrupt Enable Register */ + at91_reg TC_IDR ; /* Interrupt Disable Register */ + at91_reg TC_IMR ; /* Interrupt Mask Register */ + at91_reg Reserved2 ; + at91_reg Reserved3 ; + at91_reg Reserved4 ; + at91_reg Reserved5 ; +} StructTC ; + +#define NB_TC_CHANNEL 3 + +typedef struct +{ + StructTC TC[NB_TC_CHANNEL] ; + at91_reg TC_BCR ; /* Block Control Register */ + at91_reg TC_BMR ; /* Block Mode Register */ +} StructTCBlock ; + +/*--------------------------------------------------------*/ +/* TC_CCR: Timer Counter Control Register Bits Definition */ +/*--------------------------------------------------------*/ +#define TC_CLKEN 0x1 +#define TC_CLKDIS 0x2 +#define TC_SWTRG 0x4 + +/*-----------------------------------------------------*/ +/* TC_CMR: Timer Counter Mode Register Bits Definition */ +/*-----------------------------------------------------*/ + +/*-----------------*/ +/* Clock Selection */ +/*-----------------*/ +#define TC_CLKS 0x7 +#define TC_CLKS_MCK2 0x0 +#define TC_CLKS_MCK8 0x1 +#define TC_CLKS_MCK32 0x2 +#define TC_CLKS_MCK128 0x3 +#define TC_CLKS_MCK1024 0x4 +#define TC_CLKS_XC0 0x5 +#define TC_CLKS_XC1 0x6 +#define TC_CLKS_XC2 0x7 + +/*-----------------*/ +/* Clock Inversion */ +/*-----------------*/ +#define TC_CLKI 0x8 + +/*------------------------*/ +/* Burst Signal Selection */ +/*------------------------*/ +#define TC_BURST 0x30 +#define TC_BURST_NONE 0x0 +#define TC_BUSRT_XC0 0x10 +#define TC_BURST_XC1 0x20 +#define TC_BURST_XC2 0x30 + +/*------------------------------------------------------*/ +/* Capture Mode : Counter Clock Stopped with RB Loading */ +/*------------------------------------------------------*/ +#define TC_LDBSTOP 0x40 + +/*-------------------------------------------------------*/ +/* Waveform Mode : Counter Clock Stopped with RC Compare */ +/*-------------------------------------------------------*/ +#define TC_CPCSTOP 0x40 + +/*-------------------------------------------------------*/ +/* Capture Mode : Counter Clock Disabled with RB Loading */ +/*--------------------------------------------------------*/ +#define TC_LDBDIS 0x80 + +/*--------------------------------------------------------*/ +/* Waveform Mode : Counter Clock Disabled with RC Compare */ +/*--------------------------------------------------------*/ +#define TC_CPCDIS 0x80 + +/*------------------------------------------------*/ +/* Capture Mode : External Trigger Edge Selection */ +/*------------------------------------------------*/ +#define TC_ETRGEDG 0x300 +#define TC_ETRGEDG_EDGE_NONE 0x0 +#define TC_ETRGEDG_RISING_EDGE 0x100 +#define TC_ETRGEDG_FALLING_EDGE 0x200 +#define TC_ETRGEDG_BOTH_EDGE 0x300 + +/*-----------------------------------------------*/ +/* Waveform Mode : External Event Edge Selection */ +/*-----------------------------------------------*/ +#define TC_EEVTEDG 0x300 +#define TC_EEVTEDG_EDGE_NONE 0x0 +#define TC_EEVTEDG_RISING_EDGE 0x100 +#define TC_EEVTEDG_FALLING_EDGE 0x200 +#define TC_EEVTEDG_BOTH_EDGE 0x300 + +/*--------------------------------------------------------*/ +/* Capture Mode : TIOA or TIOB External Trigger Selection */ +/*--------------------------------------------------------*/ +#define TC_ABETRG 0x400 +#define TC_ABETRG_TIOB 0x0 +#define TC_ABETRG_TIOA 0x400 + +/*------------------------------------------*/ +/* Waveform Mode : External Event Selection */ +/*------------------------------------------*/ +#define TC_EEVT 0xC00 +#define TC_EEVT_TIOB 0x0 +#define TC_EEVT_XC0 0x400 +#define TC_EEVT_XC1 0x800 +#define TC_EEVT_XC2 0xC00 + +/*--------------------------------------------------*/ +/* Waveform Mode : Enable Trigger on External Event */ +/*--------------------------------------------------*/ +#define TC_ENETRG 0x1000 + +/*----------------------------------*/ +/* RC Compare Enable Trigger Enable */ +/*----------------------------------*/ +#define TC_CPCTRG 0x4000 + +/*----------------*/ +/* Mode Selection */ +/*----------------*/ +#define TC_WAVE 0x8000 +#define TC_CAPT 0x0 + +/*-------------------------------------*/ +/* Capture Mode : RA Loading Selection */ +/*-------------------------------------*/ +#define TC_LDRA 0x30000 +#define TC_LDRA_EDGE_NONE 0x0 +#define TC_LDRA_RISING_EDGE 0x10000 +#define TC_LDRA_FALLING_EDGE 0x20000 +#define TC_LDRA_BOTH_EDGE 0x30000 + +/*-------------------------------------------*/ +/* Waveform Mode : RA Compare Effect on TIOA */ +/*-------------------------------------------*/ +#define TC_ACPA 0x30000 +#define TC_ACPA_OUTPUT_NONE 0x0 +#define TC_ACPA_SET_OUTPUT 0x10000 +#define TC_ACPA_CLEAR_OUTPUT 0x20000 +#define TC_ACPA_TOGGLE_OUTPUT 0x30000 + +/*-------------------------------------*/ +/* Capture Mode : RB Loading Selection */ +/*-------------------------------------*/ +#define TC_LDRB 0xC0000 +#define TC_LDRB_EDGE_NONE 0x0 +#define TC_LDRB_RISING_EDGE 0x40000 +#define TC_LDRB_FALLING_EDGE 0x80000 +#define TC_LDRB_BOTH_EDGE 0xC0000 + +/*-------------------------------------------*/ +/* Waveform Mode : RC Compare Effect on TIOA */ +/*-------------------------------------------*/ +#define TC_ACPC 0xC0000 +#define TC_ACPC_OUTPUT_NONE 0x0 +#define TC_ACPC_SET_OUTPUT 0x40000 +#define TC_ACPC_CLEAR_OUTPUT 0x80000 +#define TC_ACPC_TOGGLE_OUTPUT 0xC0000 + +/*-----------------------------------------------*/ +/* Waveform Mode : External Event Effect on TIOA */ +/*-----------------------------------------------*/ +#define TC_AEEVT 0x300000 +#define TC_AEEVT_OUTPUT_NONE 0x0 +#define TC_AEEVT_SET_OUTPUT 0x100000 +#define TC_AEEVT_CLEAR_OUTPUT 0x200000 +#define TC_AEEVT_TOGGLE_OUTPUT 0x300000 + +/*-------------------------------------------------*/ +/* Waveform Mode : Software Trigger Effect on TIOA */ +/*-------------------------------------------------*/ +#define TC_ASWTRG 0xC00000 +#define TC_ASWTRG_OUTPUT_NONE 0x0 +#define TC_ASWTRG_SET_OUTPUT 0x400000 +#define TC_ASWTRG_CLEAR_OUTPUT 0x800000 +#define TC_ASWTRG_TOGGLE_OUTPUT 0xC00000 + +/*-------------------------------------------*/ +/* Waveform Mode : RB Compare Effect on TIOB */ +/*-------------------------------------------*/ +#define TC_BCPB 0x1000000 +#define TC_BCPB_OUTPUT_NONE 0x0 +#define TC_BCPB_SET_OUTPUT 0x1000000 +#define TC_BCPB_CLEAR_OUTPUT 0x2000000 +#define TC_BCPB_TOGGLE_OUTPUT 0x3000000 + +/*-------------------------------------------*/ +/* Waveform Mode : RC Compare Effect on TIOB */ +/*-------------------------------------------*/ +#define TC_BCPC 0xC000000 +#define TC_BCPC_OUTPUT_NONE 0x0 +#define TC_BCPC_SET_OUTPUT 0x4000000 +#define TC_BCPC_CLEAR_OUTPUT 0x8000000 +#define TC_BCPC_TOGGLE_OUTPUT 0xC000000 + +/*-----------------------------------------------*/ +/* Waveform Mode : External Event Effect on TIOB */ +/*-----------------------------------------------*/ +#define TC_BEEVT 0x10000000 +#define TC_BEEVT_OUTPUT_NONE 0x0 +#define TC_BEEVT_SET_OUTPUT 0x40000000 +#define TC_BEEVT_CLEAR_OUTPUT 0x80000000 +#define TC_BEEVT_TOGGLE_OUTPUT 0xC0000000 + +/*- -----------------------------------------------*/ +/* Waveform Mode : Software Trigger Effect on TIOB */ +/*-------------------------------------------------*/ +#define TC_BSWTRG 0xC0000000 +#define TC_BSWTRG_OUTPUT_NONE 0x0 +#define TC_BSWTRG_SET_OUTPUT 0x40000000 +#define TC_BSWTRG_CLEAR_OUTPUT 0x80000000 +#define TC_BSWTRG_TOGGLE_OUTPUT 0xC0000000 + +/*-----------------------------------------------*/ +/* TC_SR: Timer Counter Status Register Bits Definition */ +/*-----------------------------------------------*/ + +#define TC_COVFS 0x1 /* Counter Overflow Status */ +#define TC_LOVRS 0x2 /* Load Overrun Status */ +#define TC_CPAS 0x4 /* RA Compare Status */ +#define TC_CPBS 0x8 /* RB Compare Status */ +#define TC_CPCS 0x10 /* RC Compare Status */ +#define TC_LDRAS 0x20 /* RA Loading Status */ +#define TC_LDRBS 0x40 /* RB Loading Status */ +#define TC_ETRGS 0x80 /* External Trigger Status */ +#define TC_CLKSTA 0x10000 /* Clock Status */ +#define TC_MTIOA 0x20000 /* TIOA Mirror */ +#define TC_MTIOB 0x40000 /* TIOB Status */ + +/*------------------------------------------------------*/ +/* TC_BCR: Timer Counter Block Control Register Bits Definition */ +/*------------------------------------------------------*/ + +#define TC_SYNC 0x1 /* Synchronisation Trigger */ + +/*---------------------------------------------------*/ +/* TC_BMR: Timer Counter Block Mode Register Bits Definition */ +/*---------------------------------------------------*/ +#define TC_TC0XC0S 0x3 /* External Clock Signal 0 Selection */ +#define TC_TCLK0XC0 0x0 +#define TC_NONEXC0 0x1 +#define TC_TIOA1XC0 0x2 +#define TC_TIOA2XC0 0x3 + +#define TC_TC1XC1S 0xC /* External Clock Signal 1 Selection */ +#define TC_TCLK1XC1 0x0 +#define TC_NONEXC1 0x4 +#define TC_TIOA0XC1 0x8 +#define TC_TIOA2XC1 0xC + +#define TC_TC2XC2S 0x30 /* External Clock Signal 2 Selection */ +#define TC_TCLK2XC2 0x0 +#define TC_NONEXC2 0x10 +#define TC_TIOA0XC2 0x20 +#define TC_TIOA1XC2 0x30 + +/*-----------------------*/ +/* Peripheral Memory Map */ +/*-----------------------*/ + +#define TCB0_BASE ((StructTC *)0xFFFD0000) /* Channels 0, 1, 2 */ +#define TCB1_BASE ((StructTC *)0xFFFD0040) /* Channels 0, 1, 2 */ +#define TCB2_BASE ((StructTC *)0xFFFD0080) /* Channels 0, 1, 2 */ +#define TC0_BCR ((at91_reg *)0xFFFD00C0) +#define TC0_BMR ((at91_reg *)0xFFFD00C4) + + +#define TCB3_BASE ((StructTC *)0xFFFD4000) /* Channels 3, 4, 5 */ +#define TCB4_BASE ((StructTC *)0xFFFD4040) /* Channels 0, 1, 2 */ +#define TCB5_BASE ((StructTC *)0xFFFD4080) /* Channels 0, 1, 2 */ +#define TC1_BCR ((at91_reg *)0xFFFD40C0) +#define TC1_BMR ((at91_reg *)0xFFFD40C4) + + +#endif /* tc_h */ + diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/usart.h b/Bachelor/Mikroprozessorsysteme2/mi2/h/usart.h new file mode 100644 index 0000000..d96656d --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/usart.h @@ -0,0 +1,120 @@ +//*----------------------------------------------------------------------------- +//* File Name : usart.h +//* Object : USART Header File. +//* +//* 1.0 27/10/02 GR : Creation +//*---------------------------------------------------------------------------- + +#ifndef usart_h +#define usart_h + +#include "std_c.h" + + +/*-------------------------------------------*/ +/* USART User Interface Structure Definition */ +/*-------------------------------------------*/ + +typedef struct +{ + at91_reg US_CR ; /* Control Register */ + at91_reg US_MR ; /* Mode Register */ + at91_reg US_IER ; /* Interrupt Enable Register */ + at91_reg US_IDR ; /* Interrupt Disable Register */ + at91_reg US_IMR ; /* Interrupt Mask Register */ + at91_reg US_CSR ; /* Channel Status Register */ + at91_reg US_RHR ; /* Receive Holding Register */ + at91_reg US_THR ; /* Transmit Holding Register */ + at91_reg US_BRGR ; /* Baud Rate Generator Register */ + at91_reg US_RTOR ; /* Receiver Timeout Register */ + at91_reg US_TTGR ; /* Transmitter Time-guard Register */ + at91_reg Reserved ; + at91_reg US_RPR ; /* Receiver Pointer Register */ + at91_reg US_RCR ; /* Receiver Counter Register */ + at91_reg US_TPR ; /* Transmitter Pointer Register */ + at91_reg US_TCR ; /* Transmitter Counter Register */ +} StructUSART ; + +/*--------------------------*/ +/* US_CR : Control Register */ +/*--------------------------*/ + +#define US_RSTRX 0x0004 /* Reset Receiver */ +#define US_RSTTX 0x0008 /* Reset Transmitter */ +#define US_RXEN 0x0010 /* Receiver Enable */ +#define US_RXDIS 0x0020 /* Receiver Disable */ +#define US_TXEN 0x0040 /* Transmitter Enable */ +#define US_TXDIS 0x0080 /* Transmitter Disable */ +#define US_RSTSTA 0x0100 /* Reset Status Bits */ +#define US_STTBRK 0x0200 /* Start Break */ +#define US_STPBRK 0x0400 /* Stop Break */ +#define US_STTTO 0x0800 /* Start Time-out */ +#define US_SENDA 0x1000 /* Send Address */ + +/*-----------------------*/ +/* US_MR : Mode Register */ +/*-----------------------*/ + +#define US_CLKS 0x0030 /* Clock Selection */ +#define US_CLKS_MCK 0x00 /* Master Clock */ +#define US_CLKS_MCK8 0x10 /* Master Clock divided by 8 */ +#define US_CLKS_SCK 0x20 /* External Clock */ +#define US_CLKS_SLCK 0x30 /* Slow Clock */ + +#define US_CHRL 0x00C0 /* Byte Length */ +#define US_CHRL_5 0x00 /* 5 bits */ +#define US_CHRL_6 0x40 /* 6 bits */ +#define US_CHRL_7 0x80 /* 7 bits */ +#define US_CHRL_8 0xC0 /* 8 bits */ + +#define US_SYNC 0x0100 /* Synchronous Mode Enable */ + +#define US_PAR 0x0E00 /* Parity Mode */ +#define US_PAR_EVEN 0x00 /* Even Parity */ +#define US_PAR_ODD 0x200 /* Odd Parity */ +#define US_PAR_SPACE 0x400 /* Space Parity to 0 */ +#define US_PAR_MARK 0x600 /* Marked Parity to 1 */ +#define US_PAR_NO 0x800 /* No Parity */ +#define US_PAR_MULTIDROP 0xC00 /* Multi-drop Mode */ + +#define US_NBSTOP 0x3000 /* Stop Bit Number */ +#define US_NBSTOP_1 0x0000 /* 1 Stop Bit */ +#define US_NBSTOP_1_5 0x1000 /* 1.5 Stop Bits */ +#define US_NBSTOP_2 0x2000 /* 2 Stop Bits */ + +#define US_CHMODE 0xC000 /* Channel Mode */ +#define US_CHMODE_NORMAL 0x0000 /* Normal Mode */ +#define US_CHMODE_AUTOMATIC_ECHO 0x4000 /* Automatic Echo */ +#define US_CHMODE_LOCAL_LOOPBACK 0x8000 /* Local Loopback */ +#define US_CHMODE_REMOTE_LOOPBACK 0xC000 /* Remote Loopback */ + +#define US_MODE9 0x20000 /* 9 Bit Mode */ + +#define US_CLKO 0x40000 /* Baud Rate Output Enable */ + + +/*---------------------------------------------------------------*/ +/* US_IER, US_IDR, US_IMR, US_IMR: Status and Interrupt Register */ +/*---------------------------------------------------------------*/ + +#define US_RXRDY 0x001 /* Receiver Ready */ +#define US_TXRDY 0x002 /* Transmitter Ready */ +#define US_RXBRK 0x004 /* Receiver Break */ +#define US_ENDRX 0x008 /* End of Receiver PDC Transfer */ +#define US_ENDTX 0x010 /* End of Transmitter PDC Transfer */ +#define US_OVRE 0x020 /* Overrun Error */ +#define US_FRAME 0x040 /* Framing Error */ +#define US_PARE 0x080 /* Parity Error */ +#define US_TIMEOUT 0x100 /* Receiver Timeout */ +#define US_TXEMPTY 0x200 /* Transmitter Empty */ + +#define US_MASK_IRQ_TX (US_TXRDY | US_ENDTX | US_TXEMPTY) +#define US_MASK_IRQ_RX (US_RXRDY | US_ENDRX | US_TIMEOUT) +#define US_MASK_IRQ_ERROR (US_PARE | US_FRAME | US_OVRE | US_RXBRK) + + +#define USART2 ((StructUSART*)0xFFFC8000) /* USART 2 */ +#define USART1 ((StructUSART*)0xFFFC4000) /* USART 1 */ +#define USART0 ((StructUSART*)0xFFFC0000) /* USART 0 */ + +#endif /* usart_h */ diff --git a/Bachelor/Mikroprozessorsysteme2/mi2/h/usart.inc b/Bachelor/Mikroprozessorsysteme2/mi2/h/usart.inc new file mode 100644 index 0000000..7cc4b5f --- /dev/null +++ b/Bachelor/Mikroprozessorsysteme2/mi2/h/usart.inc @@ -0,0 +1,115 @@ +@*----------------------------------------------------------------------------- +@* File Name : usart.inc +@* Object : USART Header File. +@* +@* 1.0 01/04/00 : Creation +@*---------------------------------------------------------------------------- + +#ifndef usart_inc +#define usart_inc + + +@------------------------------------------- +@ USART User Interface Structure Definition +@------------------------------------------- + +US_CR = 0x0 @ Control Register +US_MR = 0x4 @ Mode Register +US_IER = 0x8 @ Interrupt Enable Register +US_IDR = 0xc @ Interrupt Disable Register +US_IMR = 0x10 @ Interrupt Mask Register +US_CSR = 0x14 @ Channel Status Register +US_RHR = 0x18 @ Receive Holding Register +US_THR = 0x1c @ Transmit Holding Register +US_BRGR = 0x20 @ Baud Rate Generator Register +US_RTOR = 0x24 @ Receiver Timeout Register +US_TTGR = 0x28 @ Transmitter Time-guard Register + @ Reserved +US_RPR = 0x30 @ Receiver Pointer Register +US_RCR = 0x34 @ Receiver Counter Register +US_TPR = 0x38 @ Transmitter Pointer Register +US_TCR = 0x3c @ Transmitter Counter Register + +@-------------------------- +@ US_CR : Control Register +@-------------------------- + +US_RSTRX = 0x0004 @ Reset Receiver +US_RSTTX = 0x0008 @ Reset Transmitter +US_RXEN = 0x0010 @ Receiver Enable +US_RXDIS = 0x0020 @ Receiver Disable +US_TXEN = 0x0040 @ Transmitter Enable +US_TXDIS = 0x0080 @ Transmitter Disable +US_RSTSTA = 0x0100 @ Reset Status Bits +US_STTBRK = 0x0200 @ Start Break +US_STPBRK = 0x0400 @ Stop Break +US_STTTO = 0x0800 @ Start Time-out +US_SENDA = 0x1000 @ Send Address + +@----------------------- +@ US_MR : Mode Register +@----------------------- + +US_CLKS = 0x0030 @ Clock Selection +US_CLKS_MCK = 0x00 @ Master Clock +US_CLKS_MCK8 = 0x10 @ Master Clock divided by 8 +US_CLKS_SCK = 0x20 @ External Clock +US_CLKS_SLCK = 0x30 @ Slow Clock + +US_CHRL = 0x00C0 @ Byte Length +US_CHRL_5 = 0x00 @ 5 bits +US_CHRL_6 = 0x40 @ 6 bits +US_CHRL_7 = 0x80 @ 7 bits +US_CHRL_8 = 0xC0 @ 8 bits + +US_SYNC = 0x0100 @ Synchronous Mode Enable + +US_PAR = 0x0E00 @ Parity Mode +US_PAR_EVEN = 0x00 @ Even Parity +US_PAR_ODD = 0x200 @ Odd Parity +US_PAR_SPACE = 0x400 @ Space Parity to 0 +US_PAR_MARK = 0x600 @ Marked Parity to 1 +US_PAR_NO = 0x800 @ No Parity +US_PAR_MULTIDROP = 0xC00 @ Multi-drop Mode + +US_NBSTOP = 0x3000 @ Stop Bit Number +US_NBSTOP_1 = 0x0000 @ 1 Stop Bit +US_NBSTOP_1_5 = 0x1000 @ 1.5 Stop Bits +US_NBSTOP_2 = 0x2000 @ 2 Stop Bits + +US_CHMODE = 0xC000 @ Channel Mode +US_CHMODE_NORMAL = 0x0000 @ Normal Mode +US_CHMODE_AUTOMATIC_ECHO = 0x4000 @ Automatic Echo +US_CHMODE_LOCAL_LOOPBACK = 0x8000 @ Local Loopback +US_CHMODE_REMOTE_LOOPBACK = 0xC000 @ Remote Loopback + +US_MODE9 = 0x20000 @ 9 Bit Mode + +US_CLKO = 0x40000 @ Baud Rate Output Enable + + +@--------------------------------------------------------------- +@ US_IER, US_IDR, US_IMR, US_IMR: Status and Interrupt Register +@--------------------------------------------------------------- + +US_RXRDY = 0x001 @ Receiver Ready +US_TXRDY = 0x002 @ Transmitter Ready +US_RXBRK = 0x004 @ Receiver Break +US_ENDRX = 0x008 @ End of Receiver PDC Transfer +US_ENDTX = 0x010 @ End of Transmitter PDC Transfer +US_OVRE = 0x020 @ Overrun Error +US_FRAME = 0x040 @ Framing Error +US_PARE = 0x080 @ Parity Error +US_TIMEOUT = 0x100 @ Receiver Timeout +US_TXEMPTY = 0x200 @ Transmitter Empty + +US_MASK_IRQ_TX = (US_TXRDY | US_ENDTX | US_TXEMPTY) +US_MASK_IRQ_RX = (US_RXRDY | US_ENDRX | US_TIMEOUT) +US_MASK_IRQ_ERROR = (US_PARE | US_FRAME | US_OVRE | US_RXBRK) + + +USART2_BASE = 0xFFFC8000 @ USART 2 +USART1_BASE = 0xFFFC4000 @ USART 1 +USART0_BASE = 0xFFFC0000 @ USART 0 + +#endif |